[Intel-SIG] GNR PMU fixes and new platform Clearwater Forest PMU support · Pull Request !494 · OpenCloudOS/OpenCloudOS-Kernel

upstream commits:
GNR:
6d642735cdb6,perf/x86/intel/uncore: Support more units on Granite Rapids,2025-01-10 18:16:50,Kan Liang <kan.liang@linux.intel.com>,v6.14-rc1
3f710be02ea6,perf/x86/intel/uncore: Clean up func_id,2025-01-10 18:16:50,Kan Liang <kan.liang@linux.intel.com>,v6.14-rc1

ClearWater Forest:
CWF events:
e415c1493fa1,perf vendor events: Add Clearwaterforest events,2025-02-12 19:54:38,Ian Rogers <irogers@google.com>,v6.15-rc1,v6.15-rc1

CWF uncore:
fca24bf2b6b6,perf/x86/intel/uncore: Support customized MMIO map size,2025-07-09 13:40:19,Kan Liang <kan.liang@linux.intel.com>,v6.17-rc1,v6.17-rc1
cf002dafedd0,perf/x86/intel/uncore: Support MSR portal for discovery tables,2025-07-09 13:40:19,Kan Liang <kan.liang@linux.intel.com>,v6.17-rc1,v6.17-rc1
b6ccddd6fe1f,perf/x86/intel/uncore: Add Clearwater Forest support,2024-12-17 17:47:23,Kan Liang <kan.liang@linux.intel.com>,v6.13-rc5,v6.13-rc5
9828a1cff456,perf/x86/intel/uncore: Switch to new Intel CPU model defines,2024-04-29 10:30:39,Tony Luck <tony.luck@intel.com>,v6.10-rc1

CWF core:
3e830f657f69,perf/x86: Optimize the is_x86_event,2025-04-25 14:55:22,Kan Liang <kan.liang@linux.intel.com>,v6.16-rc1,v6.16-rc1
efd448540e62,perf/x86/intel: Check the X86 leader for ACR group,2025-04-25 14:55:22,Kan Liang <kan.liang@linux.intel.com>,v6.16-rc1,v6.16-rc1
e9988ad7b174,perf/x86/intel: Check the X86 leader for pebs_counter_event_group,2025-04-25 14:55:19,Kan Liang <kan.liang@linux.intel.com>,v6.15-rc5,v6.15-rc5
75aea4b0656e,perf/x86/intel: Only check the group flag for X86 leader,2025-04-25 14:55:19,Kan Liang <kan.liang@linux.intel.com>,v6.15-rc5,v6.15-rc5
25c623f41438,perf/x86/intel: Parse CPUID archPerfmonExt leaves for non-hybrid CPUs,2025-04-17 14:21:24,Dapeng Mi <dapeng1.mi@linux.intel.com>,v6.16-rc1,v6.16-rc1
48d66c89dce1,perf/x86/intel: Add PMU support for Clearwater Forest,2025-04-17 14:21:23,Dapeng Mi <dapeng1.mi@linux.intel.com>,v6.16-rc1,v6.16-rc1
a5f5e1238f4f,perf/x86/intel: Don't clear perf metrics overflow bit unconditionally,2025-04-17 14:19:07,Dapeng Mi <dapeng1.mi@linux.intel.com>,v6.15-rc3,v6.15-rc3
ec980e4facef,perf/x86/intel: Support auto counter reload,2025-04-08 20:55:49,Kan Liang <kan.liang@linux.intel.com>,v6.16-rc1,v6.16-rc1
1856c6c2f841,perf/x86/intel: Add CPUID enumeration for the auto counter reload,2025-04-08 20:55:49,Kan Liang <kan.liang@linux.intel.com>,v6.16-rc1,v6.16-rc1
c9449c8506a5,perf: Extend the bit width of the arch-specific flag,2025-04-08 20:55:49,Kan Liang <kan.liang@linux.intel.com>,v6.16-rc1,v6.16-rc1
0a6557938d8f,perf/x86/intel: Track the num of events needs late setup,2025-04-08 20:55:48,Kan Liang <kan.liang@linux.intel.com>,v6.16-rc1,v6.16-rc1
4dfe3232cc04,perf/x86: Add dynamic constraint,2025-04-08 20:55:48,Kan Liang <kan.liang@linux.intel.com>,v6.16-rc1,v6.16-rc1
47a973fd7563,perf/x86/intel: Fix ARCH_PERFMON_NUM_COUNTER_LEAF,2025-02-08 15:47:25,Kan Liang <kan.liang@linux.intel.com>,v6.14-rc3
e02e9b0374c3,perf/x86/intel: Support PEBS counters snapshotting,2025-02-05 10:29:45,Kan Liang <kan.liang@linux.intel.com>,v6.15-rc1,v6.15-rc1
0e45818ec189,perf/x86/intel: Support RDPMC metrics clear mode,2024-12-20 15:31:22,Kan Liang <kan.liang@linux.intel.com>,v6.14-rc1,v6.14-rc1
b8c3a2502a20,perf/x86/intel/ds: Add PEBS format 6,2024-12-17 17:47:23,Kan Liang <kan.liang@linux.intel.com>,v6.13-rc5,v6.13-rc5
ae55e308bde2,perf/x86/intel/ds: Simplify the PEBS records processing for adaptive PEBS,2024-12-02 12:01:34,Kan Liang <kan.liang@linux.intel.com>,v6.14-rc1,v6.14-rc1
3c00ed344cef,perf/x86/intel/ds: Factor out functions for PEBS records processing,2024-12-02 12:01:34,Kan Liang <kan.liang@linux.intel.com>,v6.14-rc1,v6.14-rc1
7087bfb0adc9,perf/x86/intel/ds: Clarify adaptive PEBS processing,2024-12-02 12:01:34,Kan Liang <kan.liang@linux.intel.com>,v6.14-rc1,v6.14-rc1
149fd4712bcd,perf/x86/intel: Support Perfmon MSRs aliasing,2024-07-04 16:00:40,Kan Liang <kan.liang@linux.intel.com>,v6.11-rc1,v6.11-rc1
dce0c74d2d18,perf/x86/intel: Support PERFEVTSEL extension,2024-07-04 16:00:40,Kan Liang <kan.liang@linux.intel.com>,v6.11-rc1,v6.11-rc1
e8fb5d6e7658,perf/x86: Add config_mask to represent EVENTSEL bitmask,2024-07-04 16:00:39,Kan Liang <kan.liang@linux.intel.com>,v6.11-rc1,v6.11-rc1
608f6976c309,perf/x86/intel: Support new data source for Lunar Lake,2024-07-04 16:00:38,Kan Liang <kan.liang@linux.intel.com>,v6.11-rc1,v6.11-rc1
090262439f66,perf/x86/intel: Rename model-specific pebs_latency_data functions,2024-07-04 16:00:38,Kan Liang <kan.liang@linux.intel.com>,v6.11-rc1,v6.11-rc1
a932aa0e868f,perf/x86: Add Lunar Lake and Arrow Lake support,2024-07-04 16:00:37,Kan Liang <kan.liang@linux.intel.com>,v6.11-rc1,v6.11-rc1
722e42e45c2f,perf/x86: Support counter mask,2024-07-04 16:00:36,Kan Liang <kan.liang@linux.intel.com>,v6.11-rc1,v6.11-rc1
a23eb2fc1d81,perf/x86/intel: Support the PEBS event mask,2024-07-04 16:00:36,Kan Liang <kan.liang@linux.intel.com>,v6.11-rc1,v6.11-rc1
d142df13f357,perf/x86/intel: Switch to new Intel CPU model defines,2024-05-28 10:59:02,Tony Luck <tony.luck@intel.com>,v6.11-rc1

TEST RESULT - all pass
## uncore test ##

ls /sys/devices/*
/sys/devices/uncore_b2cmi_0:
/sys/devices/uncore_b2cmi_1:
/sys/devices/uncore_b2cmi_10:
/sys/devices/uncore_b2cmi_11:
/sys/devices/uncore_b2cmi_2:
/sys/devices/uncore_b2cmi_3:
/sys/devices/uncore_b2cmi_4:
/sys/devices/uncore_b2cmi_5:
/sys/devices/uncore_b2cmi_6:
/sys/devices/uncore_b2cmi_7:
/sys/devices/uncore_b2cmi_8:
/sys/devices/uncore_b2cmi_9:
/sys/devices/uncore_b2cxl_0:
/sys/devices/uncore_b2cxl_1:
/sys/devices/uncore_b2cxl_10:
/sys/devices/uncore_b2cxl_11:
/sys/devices/uncore_b2cxl_12:
/sys/devices/uncore_b2cxl_13:
/sys/devices/uncore_b2cxl_14:
/sys/devices/uncore_b2cxl_15:
/sys/devices/uncore_b2cxl_2:
/sys/devices/uncore_b2cxl_3:
/sys/devices/uncore_b2cxl_4:
/sys/devices/uncore_b2cxl_5:
/sys/devices/uncore_b2cxl_6:
/sys/devices/uncore_b2cxl_7:
/sys/devices/uncore_b2cxl_8:
/sys/devices/uncore_b2cxl_9:
/sys/devices/uncore_b2hot_0:
/sys/devices/uncore_b2hot_1:
/sys/devices/uncore_b2hot_10:
/sys/devices/uncore_b2hot_11:
/sys/devices/uncore_b2hot_12:
/sys/devices/uncore_b2hot_13:
/sys/devices/uncore_b2hot_14:
/sys/devices/uncore_b2hot_15:
/sys/devices/uncore_b2hot_16:
/sys/devices/uncore_b2hot_17:
/sys/devices/uncore_b2hot_18:
/sys/devices/uncore_b2hot_19:
/sys/devices/uncore_b2hot_2:
/sys/devices/uncore_b2hot_3:
/sys/devices/uncore_b2hot_4:
/sys/devices/uncore_b2hot_5:
/sys/devices/uncore_b2hot_6:
/sys/devices/uncore_b2hot_7:
/sys/devices/uncore_b2hot_8:
/sys/devices/uncore_b2hot_9:
/sys/devices/uncore_b2upi_0:
/sys/devices/uncore_b2upi_1:
/sys/devices/uncore_b2upi_2:
/sys/devices/uncore_b2upi_3:
/sys/devices/uncore_b2upi_4:
/sys/devices/uncore_b2upi_5:
/sys/devices/uncore_cha_0:
/sys/devices/uncore_cha_1:
/sys/devices/uncore_cha_10:
/sys/devices/uncore_cha_11:
/sys/devices/uncore_cha_12:
/sys/devices/uncore_cha_13:
/sys/devices/uncore_cha_14:
/sys/devices/uncore_cha_15:
/sys/devices/uncore_cha_16:
/sys/devices/uncore_cha_17:
/sys/devices/uncore_cha_18:
/sys/devices/uncore_cha_19:
/sys/devices/uncore_cha_2:
/sys/devices/uncore_cha_20:
/sys/devices/uncore_cha_21:
/sys/devices/uncore_cha_22:
/sys/devices/uncore_cha_23:
/sys/devices/uncore_cha_24:
/sys/devices/uncore_cha_25:
/sys/devices/uncore_cha_26:
/sys/devices/uncore_cha_27:
/sys/devices/uncore_cha_28:
/sys/devices/uncore_cha_29:
/sys/devices/uncore_cha_3:
/sys/devices/uncore_cha_30:
/sys/devices/uncore_cha_31:
/sys/devices/uncore_cha_32:
/sys/devices/uncore_cha_33:
/sys/devices/uncore_cha_34:
/sys/devices/uncore_cha_35:
/sys/devices/uncore_cha_36:
/sys/devices/uncore_cha_37:
/sys/devices/uncore_cha_38:
/sys/devices/uncore_cha_39:
/sys/devices/uncore_cha_4:
/sys/devices/uncore_cha_40:
/sys/devices/uncore_cha_41:
/sys/devices/uncore_cha_42:
/sys/devices/uncore_cha_43:
/sys/devices/uncore_cha_44:
/sys/devices/uncore_cha_45:
/sys/devices/uncore_cha_46:
/sys/devices/uncore_cha_47:
/sys/devices/uncore_cha_48:
/sys/devices/uncore_cha_49:
/sys/devices/uncore_cha_5:
/sys/devices/uncore_cha_50:
/sys/devices/uncore_cha_51:
/sys/devices/uncore_cha_52:
/sys/devices/uncore_cha_53:
/sys/devices/uncore_cha_54:
/sys/devices/uncore_cha_55:
/sys/devices/uncore_cha_56:
/sys/devices/uncore_cha_57:
/sys/devices/uncore_cha_58:
/sys/devices/uncore_cha_59:
/sys/devices/uncore_cha_6:
/sys/devices/uncore_cha_60:
/sys/devices/uncore_cha_61:
/sys/devices/uncore_cha_62:
/sys/devices/uncore_cha_63:
/sys/devices/uncore_cha_64:
/sys/devices/uncore_cha_65:
/sys/devices/uncore_cha_7:
/sys/devices/uncore_cha_8:
/sys/devices/uncore_cha_9:
/sys/devices/uncore_cxlcm_16:
/sys/devices/uncore_cxlcm_18:
/sys/devices/uncore_cxlcm_2:
/sys/devices/uncore_cxlcm_4:
/sys/devices/uncore_cxlcm_6:
/sys/devices/uncore_cxlcm_8:
/sys/devices/uncore_cxldp_17:
/sys/devices/uncore_cxldp_19:
/sys/devices/uncore_cxldp_3:
/sys/devices/uncore_cxldp_5:
/sys/devices/uncore_cxldp_7:
/sys/devices/uncore_cxldp_9:
/sys/devices/uncore_iio_1:
/sys/devices/uncore_iio_11:
/sys/devices/uncore_iio_12:
/sys/devices/uncore_iio_14:
/sys/devices/uncore_iio_2:
/sys/devices/uncore_iio_3:
/sys/devices/uncore_iio_4:
/sys/devices/uncore_iio_5:
/sys/devices/uncore_iio_6:
/sys/devices/uncore_iio_9:
/sys/devices/uncore_iio_free_running_0:
/sys/devices/uncore_iio_free_running_1:
/sys/devices/uncore_iio_free_running_10:
/sys/devices/uncore_iio_free_running_11:
/sys/devices/uncore_iio_free_running_12:
/sys/devices/uncore_iio_free_running_13:
/sys/devices/uncore_iio_free_running_14:
/sys/devices/uncore_iio_free_running_2:
/sys/devices/uncore_iio_free_running_3:
/sys/devices/uncore_iio_free_running_4:
/sys/devices/uncore_iio_free_running_5:
/sys/devices/uncore_iio_free_running_6:
/sys/devices/uncore_iio_free_running_7:
/sys/devices/uncore_iio_free_running_8:
/sys/devices/uncore_iio_free_running_9:
/sys/devices/uncore_imc:
/sys/devices/uncore_irp_1:
/sys/devices/uncore_irp_11:
/sys/devices/uncore_irp_12:
/sys/devices/uncore_irp_14:
/sys/devices/uncore_irp_2:
/sys/devices/uncore_irp_3:
/sys/devices/uncore_irp_4:
/sys/devices/uncore_irp_5:
/sys/devices/uncore_irp_6:
/sys/devices/uncore_irp_9:
/sys/devices/uncore_mdf_sbo_0:
/sys/devices/uncore_mdf_sbo_1:
/sys/devices/uncore_mdf_sbo_10:
/sys/devices/uncore_mdf_sbo_11:
/sys/devices/uncore_mdf_sbo_12:
/sys/devices/uncore_mdf_sbo_13:
/sys/devices/uncore_mdf_sbo_14:
/sys/devices/uncore_mdf_sbo_15:
/sys/devices/uncore_mdf_sbo_16:
/sys/devices/uncore_mdf_sbo_17:
/sys/devices/uncore_mdf_sbo_18:
/sys/devices/uncore_mdf_sbo_19:
/sys/devices/uncore_mdf_sbo_2:
/sys/devices/uncore_mdf_sbo_20:
/sys/devices/uncore_mdf_sbo_21:
/sys/devices/uncore_mdf_sbo_22:
/sys/devices/uncore_mdf_sbo_23:
/sys/devices/uncore_mdf_sbo_24:
/sys/devices/uncore_mdf_sbo_25:
/sys/devices/uncore_mdf_sbo_26:
/sys/devices/uncore_mdf_sbo_27:
/sys/devices/uncore_mdf_sbo_28:
/sys/devices/uncore_mdf_sbo_29:
/sys/devices/uncore_mdf_sbo_3:
/sys/devices/uncore_mdf_sbo_30:
/sys/devices/uncore_mdf_sbo_31:
/sys/devices/uncore_mdf_sbo_32:
/sys/devices/uncore_mdf_sbo_33:
/sys/devices/uncore_mdf_sbo_34:
/sys/devices/uncore_mdf_sbo_35:
/sys/devices/uncore_mdf_sbo_36:
/sys/devices/uncore_mdf_sbo_37:
/sys/devices/uncore_mdf_sbo_38:
/sys/devices/uncore_mdf_sbo_39:
/sys/devices/uncore_mdf_sbo_4:
/sys/devices/uncore_mdf_sbo_40:
/sys/devices/uncore_mdf_sbo_41:
/sys/devices/uncore_mdf_sbo_42:
/sys/devices/uncore_mdf_sbo_43:
/sys/devices/uncore_mdf_sbo_44:
/sys/devices/uncore_mdf_sbo_45:
/sys/devices/uncore_mdf_sbo_46:
/sys/devices/uncore_mdf_sbo_47:
/sys/devices/uncore_mdf_sbo_48:
/sys/devices/uncore_mdf_sbo_49:
/sys/devices/uncore_mdf_sbo_5:
/sys/devices/uncore_mdf_sbo_50:
/sys/devices/uncore_mdf_sbo_51:
/sys/devices/uncore_mdf_sbo_52:
/sys/devices/uncore_mdf_sbo_53:
/sys/devices/uncore_mdf_sbo_54:
/sys/devices/uncore_mdf_sbo_55:
/sys/devices/uncore_mdf_sbo_56:
/sys/devices/uncore_mdf_sbo_57:
/sys/devices/uncore_mdf_sbo_58:
/sys/devices/uncore_mdf_sbo_59:
/sys/devices/uncore_mdf_sbo_6:
/sys/devices/uncore_mdf_sbo_60:
/sys/devices/uncore_mdf_sbo_61:
/sys/devices/uncore_mdf_sbo_62:
/sys/devices/uncore_mdf_sbo_63:
/sys/devices/uncore_mdf_sbo_64:
/sys/devices/uncore_mdf_sbo_65:
/sys/devices/uncore_mdf_sbo_66:
/sys/devices/uncore_mdf_sbo_67:
/sys/devices/uncore_mdf_sbo_68:
/sys/devices/uncore_mdf_sbo_69:
/sys/devices/uncore_mdf_sbo_7:
/sys/devices/uncore_mdf_sbo_70:
/sys/devices/uncore_mdf_sbo_71:
/sys/devices/uncore_mdf_sbo_72:
/sys/devices/uncore_mdf_sbo_73:
/sys/devices/uncore_mdf_sbo_74:
/sys/devices/uncore_mdf_sbo_75:
/sys/devices/uncore_mdf_sbo_76:
/sys/devices/uncore_mdf_sbo_77:
/sys/devices/uncore_mdf_sbo_78:
/sys/devices/uncore_mdf_sbo_79:
/sys/devices/uncore_mdf_sbo_8:
/sys/devices/uncore_mdf_sbo_9:
/sys/devices/uncore_pciex16_2:
/sys/devices/uncore_pciex16_3:
/sys/devices/uncore_pciex16_8:
/sys/devices/uncore_pciex16_9:
/sys/devices/uncore_pciex8:
/sys/devices/uncore_pcu_0:
/sys/devices/uncore_pcu_1:
/sys/devices/uncore_pcu_2:
/sys/devices/uncore_pcu_3:
/sys/devices/uncore_pcu_4:
/sys/devices/uncore_ubox:
/sys/devices/uncore_upi_0:
/sys/devices/uncore_upi_1:
/sys/devices/uncore_upi_2:
/sys/devices/uncore_upi_3:
/sys/devices/uncore_upi_4:
/sys/devices/uncore_upi_5:
./perf stat -e uncore_upi/event=0x1/,uncore_cha/event=0x1/,uncore_imc/event=0x1/ -a sleep 1

Performance counter stats for 'system wide':

10,432,220,068      uncore_upi/event=0x1/
    75,878,604,600      uncore_cha/event=0x1/
       840,576,348      uncore_imc/event=0x1/

1.002999881 seconds time elapsed

## core test ##

./perf stat -a sleep 1

Performance counter stats for 'system wide':

392,913.63 msec cpu-clock                        #  384.673 CPUs utilized
             1,345      context-switches                 #    3.423 /sec
               386      cpu-migrations                   #    0.982 /sec
                85      page-faults                      #    0.216 /sec
       816,854,365      cycles                           #    0.002 GHz
       214,062,498      instructions                     #    0.26  insn per cycle
        45,335,327      branches                         #  115.382 K/sec
           992,884      branch-misses                    #    2.19% of all branches

1.021422273 seconds time elapsed

./perf record -e instructions -Iax,bx -b -c 100000 sleep 1
[ perf record: Woken up 1 times to write data ]
[ perf record: Captured and wrote 0.040 MB perf.data (17 samples) ]
 ./perf record -e branches -Iax,bx -b -c 10000 sleep 1
[ perf record: Woken up 1 times to write data ]
[ perf record: Captured and wrote 0.053 MB perf.data (39 samples) ]

## event test ##

./perf stat -e LONGEST_LAT_CACHE.MISS,LONGEST_LAT_CACHE.REFERENCE -a sleep 1

Performance counter stats for 'system wide':

770,872      LONGEST_LAT_CACHE.MISS
        10,448,146      LONGEST_LAT_CACHE.REFERENCE

1.019260018 seconds time elapsed

./perf record -e instructions -Iax,bx -b -c 100000 sleep 1
[ perf record: Woken up 1 times to write data ]
[ perf record: Captured and wrote 0.036 MB perf.data (17 samples) ]
 ./perf record -e branches -Iax,bx -b -c 10000 sleep 1
[ perf record: Woken up 1 times to write data ]
[ perf record: Captured and wrote 0.054 MB perf.data (39 samples) ]

类型	指派人员	状态
审查	chinaljp030 刘诗	已完成 (0/0人)
测试	chinaljp030 刘诗	已完成 (0/0人)

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