diff --git a/1000-arch-support-loongarch64-platform.patch b/1000-arch-support-loongarch64-platform.patch new file mode 100644 index 0000000000000000000000000000000000000000..ba22b3de6e435b82e4ac81247266e24cec2c85ae --- /dev/null +++ b/1000-arch-support-loongarch64-platform.patch @@ -0,0 +1,128 @@ +From 4b04fbef561c02ee9a7f3a868f0c8a544bce3bf0 Mon Sep 17 00:00:00 2001 +From: Liwei Ge +Date: Fri, 9 Sep 2022 17:08:06 +0800 +Subject: [PATCH 1000/1001] arch: support loongarch64 platform + +--- + libdwelf/dwelf_elf_e_machine_string.c | 3 +- + libelf/elf.h | 68 ++++++++++++++++++++++++++- + src/elflint.c | 2 +- + 3 files changed, 70 insertions(+), 3 deletions(-) + +diff --git a/libdwelf/dwelf_elf_e_machine_string.c b/libdwelf/dwelf_elf_e_machine_string.c +index 387648e..21f2756 100644 +--- a/libdwelf/dwelf_elf_e_machine_string.c ++++ b/libdwelf/dwelf_elf_e_machine_string.c +@@ -396,7 +396,8 @@ dwelf_elf_e_machine_string (int machine) + return "BPF"; + case EM_CSKY: + return "C-SKY"; +- ++ case EM_LOONGARCH: ++ return "LoongArch"; + case EM_ALPHA: + return "Alpha"; + +diff --git a/libelf/elf.h b/libelf/elf.h +index 8e3e618..30bdda8 100644 +--- a/libelf/elf.h ++++ b/libelf/elf.h +@@ -357,8 +357,9 @@ typedef struct + + #define EM_BPF 247 /* Linux BPF -- in-kernel virtual machine */ + #define EM_CSKY 252 /* C-SKY */ ++#define EM_LOONGARCH 258 /* LoongArch */ + +-#define EM_NUM 253 ++#define EM_NUM 259 + + /* Old spellings/synonyms. */ + +@@ -4034,6 +4035,71 @@ enum + #define R_NDS32_TLS_TPOFF 102 + #define R_NDS32_TLS_DESC 119 + ++/* LoongArch ELF Flags */ ++#define EF_LARCH_ABI 0x07 ++#define EF_LARCH_ABI_LP64D 0x03 ++ ++/* LoongArch specific dynamic relocations */ ++#define R_LARCH_NONE 0 ++#define R_LARCH_32 1 ++#define R_LARCH_64 2 ++#define R_LARCH_RELATIVE 3 ++#define R_LARCH_COPY 4 ++#define R_LARCH_JUMP_SLOT 5 ++#define R_LARCH_TLS_DTPMOD32 6 ++#define R_LARCH_TLS_DTPMOD64 7 ++#define R_LARCH_TLS_DTPREL32 8 ++#define R_LARCH_TLS_DTPREL64 9 ++#define R_LARCH_TLS_TPREL32 10 ++#define R_LARCH_TLS_TPREL64 11 ++#define R_LARCH_IRELATIVE 12 ++ ++/* Reserved for future relocs that the dynamic linker must understand. */ ++ ++/* used by the static linker for relocating .text. */ ++#define R_LARCH_MARK_LA 20 ++#define R_LARCH_MARK_PCREL 21 ++#define R_LARCH_SOP_PUSH_PCREL 22 ++#define R_LARCH_SOP_PUSH_ABSOLUTE 23 ++#define R_LARCH_SOP_PUSH_DUP 24 ++#define R_LARCH_SOP_PUSH_GPREL 25 ++#define R_LARCH_SOP_PUSH_TLS_TPREL 26 ++#define R_LARCH_SOP_PUSH_TLS_GOT 27 ++#define R_LARCH_SOP_PUSH_TLS_GD 28 ++#define R_LARCH_SOP_PUSH_PLT_PCREL 29 ++#define R_LARCH_SOP_ASSERT 30 ++#define R_LARCH_SOP_NOT 31 ++#define R_LARCH_SOP_SUB 32 ++#define R_LARCH_SOP_SL 33 ++#define R_LARCH_SOP_SR 34 ++#define R_LARCH_SOP_ADD 35 ++#define R_LARCH_SOP_AND 36 ++#define R_LARCH_SOP_IF_ELSE 37 ++#define R_LARCH_SOP_POP_32_S_10_5 38 ++#define R_LARCH_SOP_POP_32_U_10_12 39 ++#define R_LARCH_SOP_POP_32_S_10_12 40 ++#define R_LARCH_SOP_POP_32_S_10_16 41 ++#define R_LARCH_SOP_POP_32_S_10_16_S2 42 ++#define R_LARCH_SOP_POP_32_S_5_20 43 ++#define R_LARCH_SOP_POP_32_S_0_5_10_16_S2 44 ++#define R_LARCH_SOP_POP_32_S_0_10_10_16_S2 45 ++#define R_LARCH_SOP_POP_32_U 46 ++ ++/* used by the static linker for relocating non .text. */ ++#define R_LARCH_ADD8 47 ++#define R_LARCH_ADD16 48 ++#define R_LARCH_ADD24 49 ++#define R_LARCH_ADD32 50 ++#define R_LARCH_ADD64 51 ++#define R_LARCH_SUB8 52 ++#define R_LARCH_SUB16 53 ++#define R_LARCH_SUB24 54 ++#define R_LARCH_SUB32 55 ++#define R_LARCH_SUB64 56 ++#define R_LARCH_GNU_VTINHERIT 57 ++#define R_LARCH_GNU_VTENTRY 58 ++ ++ + /* ARCompact/ARCv2 specific relocs. */ + #define R_ARC_NONE 0x0 + #define R_ARC_8 0x1 +diff --git a/src/elflint.c b/src/elflint.c +index ef7725c..e5f64cf 100644 +--- a/src/elflint.c ++++ b/src/elflint.c +@@ -330,7 +330,7 @@ static const int valid_e_machine[] = + EM_CRIS, EM_JAVELIN, EM_FIREPATH, EM_ZSP, EM_MMIX, EM_HUANY, EM_PRISM, + EM_AVR, EM_FR30, EM_D10V, EM_D30V, EM_V850, EM_M32R, EM_MN10300, + EM_MN10200, EM_PJ, EM_OPENRISC, EM_ARC_A5, EM_XTENSA, EM_ALPHA, +- EM_TILEGX, EM_TILEPRO, EM_AARCH64, EM_BPF, EM_RISCV, EM_CSKY ++ EM_TILEGX, EM_TILEPRO, EM_AARCH64, EM_BPF, EM_RISCV, EM_CSKY, EM_LOONGARCH + }; + #define nvalid_e_machine \ + (sizeof (valid_e_machine) / sizeof (valid_e_machine[0])) +-- +2.27.0 + diff --git a/1001-backends-add-loongarch-support.patch b/1001-backends-add-loongarch-support.patch new file mode 100644 index 0000000000000000000000000000000000000000..5b41acd24a913aec58a609ad282d49c1e3769994 --- /dev/null +++ b/1001-backends-add-loongarch-support.patch @@ -0,0 +1,1120 @@ +From 0b8705e04e66aaf56c6ba258f9c05c5993834fae Mon Sep 17 00:00:00 2001 +From: Liwei Ge +Date: Tue, 13 Sep 2022 18:00:10 +0800 +Subject: [PATCH 1001/1001] backends: add loongarch support + +--- + backends/Makefile.am | 8 +- + backends/Makefile.in | 39 +++++++- + backends/loongarch_cfi.c | 77 +++++++++++++++ + backends/loongarch_init.c | 78 +++++++++++++++ + backends/loongarch_initreg.c | 98 +++++++++++++++++++ + backends/loongarch_regs.c | 154 ++++++++++++++++++++++++++++++ + backends/loongarch_reloc.def | 93 ++++++++++++++++++ + backends/loongarch_retval.c | 179 +++++++++++++++++++++++++++++++++++ + backends/loongarch_symbol.c | 121 +++++++++++++++++++++++ + backends/loongarch_unwind.c | 85 +++++++++++++++++ + libebl/eblopenbackend.c | 2 + + 11 files changed, 929 insertions(+), 5 deletions(-) + create mode 100644 backends/loongarch_cfi.c + create mode 100644 backends/loongarch_init.c + create mode 100644 backends/loongarch_initreg.c + create mode 100644 backends/loongarch_regs.c + create mode 100644 backends/loongarch_reloc.def + create mode 100644 backends/loongarch_retval.c + create mode 100644 backends/loongarch_symbol.c + create mode 100644 backends/loongarch_unwind.c + +diff --git a/backends/Makefile.am b/backends/Makefile.am +index 62916c9..9cb45c0 100644 +--- a/backends/Makefile.am ++++ b/backends/Makefile.am +@@ -37,7 +37,7 @@ AM_CPPFLAGS += -I$(top_srcdir)/libebl -I$(top_srcdir)/libasm \ + noinst_LIBRARIES = libebl_backends.a libebl_backends_pic.a + + modules = i386 sh x86_64 ia64 alpha arm aarch64 sparc ppc ppc64 s390 \ +- m68k bpf riscv csky ++ m68k bpf riscv csky loongarch + + i386_SRCS = i386_init.c i386_symbol.c i386_corenote.c i386_cfi.c \ + i386_retval.c i386_regs.c i386_auxv.c \ +@@ -58,6 +58,10 @@ alpha_SRCS = alpha_init.c alpha_symbol.c alpha_retval.c alpha_regs.c \ + arm_SRCS = arm_init.c arm_symbol.c arm_regs.c arm_corenote.c \ + arm_auxv.c arm_attrs.c arm_retval.c arm_cfi.c arm_initreg.c + ++loongarch_SRCS = loongarch_init.c loongarch_symbol.c loongarch_regs.c \ ++ loongarch_cfi.c loongarch_initreg.c loongarch_retval.c \ ++ loongarch_unwind.c ++ + aarch64_SRCS = aarch64_init.c aarch64_regs.c aarch64_symbol.c \ + aarch64_corenote.c aarch64_retval.c aarch64_cfi.c \ + aarch64_initreg.c aarch64_unwind.c +@@ -98,7 +102,7 @@ csky_SRCS = csky_attrs.c csky_init.c csky_symbol.c csky_cfi.c \ + libebl_backends_a_SOURCES = $(i386_SRCS) $(sh_SRCS) $(x86_64_SRCS) \ + $(ia64_SRCS) $(alpha_SRCS) $(arm_SRCS) \ + $(aarch64_SRCS) $(sparc_SRCS) $(ppc_SRCS) \ +- $(ppc64_SRCS) $(s390_SRCS) \ ++ $(ppc64_SRCS) $(s390_SRCS) $(loongarch_SRCS) \ + $(m68k_SRCS) $(bpf_SRCS) $(riscv_SRCS) $(csky_SRCS) + + libebl_backends_pic_a_SOURCES = +diff --git a/backends/Makefile.in b/backends/Makefile.in +index 7028fb0..e115b9a 100644 +--- a/backends/Makefile.in ++++ b/backends/Makefile.in +@@ -170,12 +170,16 @@ am__objects_14 = riscv_init.$(OBJEXT) riscv_symbol.$(OBJEXT) \ + am__objects_15 = csky_attrs.$(OBJEXT) csky_init.$(OBJEXT) \ + csky_symbol.$(OBJEXT) csky_cfi.$(OBJEXT) csky_regs.$(OBJEXT) \ + csky_initreg.$(OBJEXT) csky_corenote.$(OBJEXT) ++am__objects_16 = loongarch_init.$(OBJEXT) loongarch_symbol.$(OBJEXT) \ ++ loongarch_initreg.$(OBJEXT) loongarch_regs.$(OBJEXT) \ ++ loongarch_cfi.$(OBJEXT) loongarch_retval.$(OBJEXT) \ ++ loongarch_unwind.$(OBJEXT) + am_libebl_backends_a_OBJECTS = $(am__objects_1) $(am__objects_2) \ + $(am__objects_3) $(am__objects_4) $(am__objects_5) \ + $(am__objects_6) $(am__objects_7) $(am__objects_8) \ + $(am__objects_9) $(am__objects_10) $(am__objects_11) \ + $(am__objects_12) $(am__objects_13) $(am__objects_14) \ +- $(am__objects_15) ++ $(am__objects_15) $(am__objects_16) + libebl_backends_a_OBJECTS = $(am_libebl_backends_a_OBJECTS) + libebl_backends_pic_a_AR = $(AR) $(ARFLAGS) + libebl_backends_pic_a_LIBADD = +@@ -207,6 +211,10 @@ am__depfiles_remade = ./$(DEPDIR)/aarch64_cfi.Po \ + ./$(DEPDIR)/arm_corenote.Po ./$(DEPDIR)/arm_init.Po \ + ./$(DEPDIR)/arm_initreg.Po ./$(DEPDIR)/arm_regs.Po \ + ./$(DEPDIR)/arm_retval.Po ./$(DEPDIR)/arm_symbol.Po \ ++ ./$(DEPDIR)/loongarch_init.Po ./$(DEPDIR)/loongarch_symbol.Po \ ++ ./$(DEPDIR)/loongarch_regs.Po ./$(DEPDIR)/loongarch_initreg.Po \ ++ ./$(DEPDIR)/loongarch_cfi.Po loongarch_retval.Po \ ++ ./$(DEPDIR)/loongarch_unwind.Po \ + ./$(DEPDIR)/bpf_init.Po ./$(DEPDIR)/bpf_regs.Po \ + ./$(DEPDIR)/bpf_symbol.Po ./$(DEPDIR)/csky_attrs.Po \ + ./$(DEPDIR)/csky_cfi.Po ./$(DEPDIR)/csky_corenote.Po \ +@@ -518,7 +526,7 @@ textrel_msg = echo "WARNING: TEXTREL found in '$@'" + textrel_check = if $(READELF) -d $@ | fgrep -q TEXTREL; then $(textrel_found); fi + noinst_LIBRARIES = libebl_backends.a libebl_backends_pic.a + modules = i386 sh x86_64 ia64 alpha arm aarch64 sparc ppc ppc64 s390 \ +- m68k bpf riscv csky ++ m68k bpf riscv csky loongarch + + i386_SRCS = i386_init.c i386_symbol.c i386_corenote.c i386_cfi.c \ + i386_retval.c i386_regs.c i386_auxv.c \ +@@ -536,6 +544,10 @@ alpha_SRCS = alpha_init.c alpha_symbol.c alpha_retval.c alpha_regs.c \ + arm_SRCS = arm_init.c arm_symbol.c arm_regs.c arm_corenote.c \ + arm_auxv.c arm_attrs.c arm_retval.c arm_cfi.c arm_initreg.c + ++loongarch_SRCS = loongarch_init.c loongarch_symbol.c loongarch_regs.c \ ++ loongarch_cfi.c loongarch_initreg.c loongarch_retval.c \ ++ loongarch_unwind.c ++ + aarch64_SRCS = aarch64_init.c aarch64_regs.c aarch64_symbol.c \ + aarch64_corenote.c aarch64_retval.c aarch64_cfi.c \ + aarch64_initreg.c aarch64_unwind.c +@@ -575,7 +587,7 @@ csky_SRCS = csky_attrs.c csky_init.c csky_symbol.c csky_cfi.c \ + libebl_backends_a_SOURCES = $(i386_SRCS) $(sh_SRCS) $(x86_64_SRCS) \ + $(ia64_SRCS) $(alpha_SRCS) $(arm_SRCS) \ + $(aarch64_SRCS) $(sparc_SRCS) $(ppc_SRCS) \ +- $(ppc64_SRCS) $(s390_SRCS) \ ++ $(ppc64_SRCS) $(s390_SRCS) $(loongarch_SRCS)\ + $(m68k_SRCS) $(bpf_SRCS) $(riscv_SRCS) $(csky_SRCS) + + libebl_backends_pic_a_SOURCES = +@@ -660,6 +672,13 @@ distclean-compile: + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/arm_regs.Po@am__quote@ # am--include-marker + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/arm_retval.Po@am__quote@ # am--include-marker + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/arm_symbol.Po@am__quote@ # am--include-marker ++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/loongarch_init.Po@am__quote@ # am--include-marker ++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/loongarch_symbol.Po@am__quote@ # am--include-marker ++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/loongarch_regs.Po@am__quote@ # am--include-marker ++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/loongarch_initreg.Po@am__quote@ # am--include-marker ++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/loongarch_cfi.Po@am__quote@ # am--include-marker ++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/loongarch_retval.Po@am__quote@ # am--include-marker ++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/loongarch_unwind.Po@am__quote@ # am--include-marker + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/bpf_init.Po@am__quote@ # am--include-marker + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/bpf_regs.Po@am__quote@ # am--include-marker + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/bpf_symbol.Po@am__quote@ # am--include-marker +@@ -916,6 +935,13 @@ distclean: distclean-am + -rm -f ./$(DEPDIR)/arm_regs.Po + -rm -f ./$(DEPDIR)/arm_retval.Po + -rm -f ./$(DEPDIR)/arm_symbol.Po ++ -rm -f ./$(DEPDIR)/loongarch_init.Po ++ -rm -f ./$(DEPDIR)/loongarch_symbol.Po ++ -rm -f ./$(DEPDIR)/loongarch_regs.Po ++ -rm -f ./$(DEPDIR)/loongarch_initreg.Po ++ -rm -f ./$(DEPDIR)/loongarch_cfi.Po ++ -rm -f ./$(DEPDIR)/loongarch_retval.Po ++ -rm -f ./$(DEPDIR)/loongarch_unwind.Po + -rm -f ./$(DEPDIR)/bpf_init.Po + -rm -f ./$(DEPDIR)/bpf_regs.Po + -rm -f ./$(DEPDIR)/bpf_symbol.Po +@@ -1070,6 +1096,13 @@ maintainer-clean: maintainer-clean-am + -rm -f ./$(DEPDIR)/arm_regs.Po + -rm -f ./$(DEPDIR)/arm_retval.Po + -rm -f ./$(DEPDIR)/arm_symbol.Po ++ -rm -f ./$(DEPDIR)/loongarch_init.Po ++ -rm -f ./$(DEPDIR)/loongarch_symbol.Po ++ -rm -f ./$(DEPDIR)/loongarch_initreg.Po ++ -rm -f ./$(DEPDIR)/loongarch_regs.Po ++ -rm -f ./$(DEPDIR)/loongarch_cfi.Po ++ -rm -f ./$(DEPDIR)/loongarch_retval.Po ++ -rm -f ./$(DEPDIR)/loongarch_unwind.Po + -rm -f ./$(DEPDIR)/bpf_init.Po + -rm -f ./$(DEPDIR)/bpf_regs.Po + -rm -f ./$(DEPDIR)/bpf_symbol.Po +diff --git a/backends/loongarch_cfi.c b/backends/loongarch_cfi.c +new file mode 100644 +index 0000000..568e230 +--- /dev/null ++++ b/backends/loongarch_cfi.c +@@ -0,0 +1,77 @@ ++/* LoongArch specific backend library. ++ * ++ * Copyright (C) 2022 OpenAnolis community LoongArch SIG. ++ * ++ * Author: Liwei Ge ++ * ++ */ ++ ++/* ++ This file is free software; you can redistribute it and/or modify ++ it under the terms of either ++ ++ * the GNU Lesser General Public License as published by the Free ++ Software Foundation; either version 3 of the License, or (at ++ your option) any later version ++ ++ or ++ ++ * the GNU General Public License as published by the Free ++ Software Foundation; either version 2 of the License, or (at ++ your option) any later version ++ ++ or both in parallel, as here. ++ ++ elfutils is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received copies of the GNU General Public License and ++ the GNU Lesser General Public License along with this program. If ++ not, see . ++*/ ++ ++#ifdef HAVE_CONFIG_H ++# include ++#endif ++ ++#include ++ ++#define BACKEND loongarch_ ++#include "libebl_CPU.h" ++ ++int ++loongarch_abi_cfi (Ebl *ebl __attribute__ ((unused)), Dwarf_CIE *abi_info) ++{ ++ static const uint8_t abi_cfi[] = ++ { ++ /* stack pointer r3, $sp */ ++ DW_CFA_def_cfa, ULEB128_7(3), ULEB128_7(0), ++ DW_CFA_val_offset, ULEB128_7(3), ULEB128_7(0), ++ ++#define SV(n) DW_CFA_same_value, ULEB128_7 (n) ++ /* The return address register contains the return address setup by caller. */ ++ SV(1), ++ ++ /* Callee-saved registers r23 - r31 */ ++ SV(23), SV(24), SV(25), SV(26), SV(27), SV(28), SV(29), SV(30), ++ SV(31), ++ ++ /* Frame pointer r22, $fp */ ++ SV(22), ++ ++ /* Callee-saved registers f24 - f31*/ ++ SV(56), SV(57), SV(58), SV(59), SV(60), SV(61), SV(62), SV(63), ++#undef SV ++ }; ++ ++ abi_info->initial_instructions = abi_cfi; ++ abi_info->initial_instructions_end = &abi_cfi[sizeof abi_cfi]; ++ ++ abi_info->data_alignment_factor = -4; ++ /* Return address r1, $ra */ ++ abi_info->return_address_register = 1; ++ ++ return 0; ++} +diff --git a/backends/loongarch_init.c b/backends/loongarch_init.c +new file mode 100644 +index 0000000..350da40 +--- /dev/null ++++ b/backends/loongarch_init.c +@@ -0,0 +1,78 @@ ++/* LoongArch specific backend library. ++ * ++ * Copyright (C) 2022 OpenAnolis community LoongArch SIG. ++ * ++ * Author: Liwei Ge ++ * ++ */ ++ ++/* ++ This file is free software; you can redistribute it and/or modify ++ it under the terms of either ++ ++ * the GNU Lesser General Public License as published by the Free ++ Software Foundation; either version 3 of the License, or (at ++ your option) any later version ++ ++ or ++ ++ * the GNU General Public License as published by the Free ++ Software Foundation; either version 2 of the License, or (at ++ your option) any later version ++ ++ or both in parallel, as here. ++ ++ elfutils is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received copies of the GNU General Public License and ++ the GNU Lesser General Public License along with this program. If ++ not, see . ++*/ ++ ++#ifdef HAVE_CONFIG_H ++# include ++#endif ++ ++#define BACKEND loongarch_ ++#define RELOC_PREFIX R_LARCH_ ++#include "libebl_CPU.h" ++ ++/* This defines the common reloc hooks based on loongarch_reloc.def. */ ++#include "common-reloc.c" ++ ++ ++Ebl * ++loongarch_init (Elf *elf __attribute__ ((unused)), ++ GElf_Half machine __attribute__ ((unused)), ++ Ebl *eh) ++{ ++ loongarch_init_reloc (eh); ++ ++ HOOK (eh, machine_flag_check); ++ HOOK (eh, check_special_symbol); ++ HOOK (eh, reloc_simple_type); ++ HOOK (eh, return_value_location); ++ HOOK (eh, set_initial_registers_tid); ++ HOOK (eh, register_info); ++ HOOK (eh, abi_cfi); ++ HOOK (eh, unwind); ++ ++ /* ++ This is FIRST_PSEUDO_REGISTER in GCC, since DWARF_FRAME_REGISTERS ++ is not explicitly defined. ++ ++ Number of hardware registers. We have: ++ - 32 integer registers ++ - 32 floating point registers ++ - 8 condition code registers ++ - 2 fake registers: ++ - ARG_POINTER_REGNUM ++ - FRAME_POINTER_REGNUM ++ */ ++ eh->frame_nregs = 74; ++ ++ return eh; ++} +diff --git a/backends/loongarch_initreg.c b/backends/loongarch_initreg.c +new file mode 100644 +index 0000000..0b8a562 +--- /dev/null ++++ b/backends/loongarch_initreg.c +@@ -0,0 +1,98 @@ ++/* LoongArch specific backend library. ++ * ++ * Copyright (C) 2022 OpenAnolis community LoongArch SIG. ++ * ++ * Author: Liwei Ge ++ * ++ */ ++ ++/* ++ This file is free software; you can redistribute it and/or modify ++ it under the terms of either ++ ++ * the GNU Lesser General Public License as published by the Free ++ Software Foundation; either version 3 of the License, or (at ++ your option) any later version ++ ++ or ++ ++ * the GNU General Public License as published by the Free ++ Software Foundation; either version 2 of the License, or (at ++ your option) any later version ++ ++ or both in parallel, as here. ++ ++ elfutils is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received copies of the GNU General Public License and ++ the GNU Lesser General Public License along with this program. If ++ not, see . ++*/ ++ ++#ifdef HAVE_CONFIG_H ++# include ++#endif ++ ++#include "system.h" ++#include ++#if defined(__loongarch__) && defined(__linux__) ++# include ++# include ++# include ++# include ++#endif ++ ++#define BACKEND loongarch_ ++#include "libebl_CPU.h" ++ ++bool ++loongarch_set_initial_registers_tid(pid_t tid __attribute__ ((unused)), ++ ebl_tid_registers_t *setfunc __attribute__ ((unused)), ++ void *arg __attribute__ ((unused))) ++{ ++ ++#if !defined __loongarch__ || !defined __linux__ ++ return false; ++#else ++ ++ /* General registers. */ ++ struct user_regs_struct gregs; ++ struct iovec iovec; ++ iovec.iov_base = &gregs; ++ iovec.iov_len = sizeof (gregs); ++ if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec) != 0) ++ return false; ++ ++ /* r0 is constant 0. */ ++ Dwarf_Word zero = 0; ++ if (! setfunc (0, 1, &zero, arg)) ++ return false; ++ ++ /* r1 - r31 */ ++ if (! setfunc (1, 32, (Dwarf_Word *) &gregs.gpr[0], arg)) ++ return false; ++ ++ /* PC. */ ++ if (! setfunc (-1, 1, (Dwarf_Word *) &gregs.pc, arg)) ++ return false; ++ ++ struct user_fp_state fregs; ++ iovec.iov_base = &fregs; ++ iovec.iov_len = sizeof (fregs); ++ if (ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec) != 0) ++ return false; ++ ++ Dwarf_Word dwarf_fregs[32]; ++ for (int r = 0; r < 32; r++) ++ dwarf_fregs[r] = fregs.fpr[r] & 0xFFFFFFFF; ++ ++ if (! setfunc (32, 32, dwarf_fregs, arg)) ++ return false; ++ ++ return true; ++ ++#endif ++} +diff --git a/backends/loongarch_regs.c b/backends/loongarch_regs.c +new file mode 100644 +index 0000000..e504db3 +--- /dev/null ++++ b/backends/loongarch_regs.c +@@ -0,0 +1,154 @@ ++/* LoongArch specific backend library. ++ * ++ * Copyright (C) 2022 OpenAnolis community LoongArch SIG. ++ * ++ * Author: Liwei Ge ++ * ++ */ ++ ++/* ++ This file is free software; you can redistribute it and/or modify ++ it under the terms of either ++ ++ * the GNU Lesser General Public License as published by the Free ++ Software Foundation; either version 3 of the License, or (at ++ your option) any later version ++ ++ or ++ ++ * the GNU General Public License as published by the Free ++ Software Foundation; either version 2 of the License, or (at ++ your option) any later version ++ ++ or both in parallel, as here. ++ ++ elfutils is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received copies of the GNU General Public License and ++ the GNU Lesser General Public License along with this program. If ++ not, see . ++*/ ++ ++#ifdef HAVE_CONFIG_H ++# include ++#endif ++ ++#include ++#include ++#include ++ ++#define BACKEND loongarch_ ++#include "libebl_CPU.h" ++ ++ssize_t ++loongarch_register_info (Ebl *ebl __attribute__ ((unused)), ++ int regno, char *name, size_t namelen, ++ const char **prefix, const char **setname, ++ int *bits, int *type) ++{ ++ ++ if (name == NULL) ++ return 128; ++ ++ *prefix = ""; ++ if (regno < 32) ++ { ++ *setname = "integer"; ++ *type = DW_ATE_signed; ++ *bits = ebl->class == ELFCLASS64 ? 64 : 32; ++ } ++ else ++ { ++ *setname = "FPU"; ++ *type = DW_ATE_float; ++ *bits = 64; ++ } ++ ++ switch (regno) ++ { ++ case 0: ++ return stpcpy (name, "zero") + 1 - name; ++ case 1: ++ return stpcpy (name, "ra") + 1 - name; ++ case 2: ++ return stpcpy (name, "tp") + 1 - name; ++ case 3: ++ return stpcpy (name, "sp") + 1 - name; ++ ++ case 4 ... 11: ++ name[0] = 'a'; ++ name[1] = regno - 4 + '0'; ++ namelen = 2; ++ break; ++ ++ case 12 ... 20: ++ name[0] = 't'; ++ name[1] = regno - 12 + '0'; ++ namelen = 2; ++ break; ++ ++ case 21: ++ name[0] = 'u'; ++ name[1] = '0'; ++ namelen = 2; ++ break; ++ ++ case 22: ++ name[0] = 'f'; ++ name[1] = 'p'; ++ namelen = 2; ++ break; ++ ++ case 23 ... 31: ++ name[0] = 's'; ++ name[1] = regno - 23 + '0'; ++ namelen = 2; ++ break; ++ ++ case 32 ... 39: ++ name[0] = 'f'; ++ name[1] = 'a'; ++ name[2] = regno - 32 + '0'; ++ namelen = 3; ++ break; ++ ++ case 40 ... 49: ++ name[0] = 'f'; ++ name[1] = 't'; ++ name[2] = regno - 40 + '0'; ++ namelen = 3; ++ break; ++ case 50 ... 55: ++ name[0] = 'f'; ++ name[1] = 't'; ++ name[2] = '1'; ++ name[3] = regno - 50 + '0'; ++ namelen = 3; ++ break; ++ ++ case 56 ... 63: ++ name[0] = 'f'; ++ name[1] = 's'; ++ name[2] = regno - 56 + '0'; ++ namelen = 3; ++ break; ++ ++ case 64 ... 71: ++ name[0] = 'f'; ++ name[1] = 'c'; ++ name[2] = 'c'; ++ name[3] = regno - 64 + '0'; ++ namelen = 3; ++ break; ++ ++ default: ++ *setname = NULL; ++ return 0; ++ } ++ ++ name[namelen++] = '\0'; ++ return namelen; ++} +diff --git a/backends/loongarch_reloc.def b/backends/loongarch_reloc.def +new file mode 100644 +index 0000000..24bd1d6 +--- /dev/null ++++ b/backends/loongarch_reloc.def +@@ -0,0 +1,93 @@ ++/* LoongArch specific backend library. ++ * ++ * Copyright (C) 2022 OpenAnolis community LoongArch SIG. ++ * ++ * Author: Liwei Ge ++ * ++ */ ++ ++/* ++ This file is free software; you can redistribute it and/or modify ++ it under the terms of either ++ ++ * the GNU Lesser General Public License as published by the Free ++ Software Foundation; either version 3 of the License, or (at ++ your option) any later version ++ ++ or ++ ++ * the GNU General Public License as published by the Free ++ Software Foundation; either version 2 of the License, or (at ++ your option) any later version ++ ++ or both in parallel, as here. ++ ++ elfutils is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received copies of the GNU General Public License and ++ the GNU Lesser General Public License along with this program. If ++ not, see . ++*/ ++ ++/* LoongArch specific dynamic relocations */ ++RELOC_TYPE (NONE, REL|EXEC|DYN) ++RELOC_TYPE (32, REL|EXEC|DYN) ++RELOC_TYPE (64, REL|EXEC|DYN) ++RELOC_TYPE (RELATIVE, EXEC|DYN) ++RELOC_TYPE (COPY, EXEC|DYN) ++RELOC_TYPE (JUMP_SLOT, EXEC|DYN) ++RELOC_TYPE (TLS_DTPMOD32, EXEC|DYN) ++RELOC_TYPE (TLS_DTPMOD64, EXEC|DYN) ++RELOC_TYPE (TLS_DTPREL32, EXEC|DYN) ++RELOC_TYPE (TLS_DTPREL64, EXEC|DYN) ++RELOC_TYPE (TLS_TPREL32, EXEC|DYN) ++RELOC_TYPE (TLS_TPREL64, EXEC|DYN) ++RELOC_TYPE (IRELATIVE, EXEC|DYN) ++ ++ ++/* used by the static linker for relocating .text. */ ++RELOC_TYPE (MARK_LA, REL) ++RELOC_TYPE (MARK_PCREL, REL) ++RELOC_TYPE (SOP_PUSH_PCREL, REL) ++RELOC_TYPE (SOP_PUSH_ABSOLUTE, REL) ++RELOC_TYPE (SOP_PUSH_DUP, REL) ++RELOC_TYPE (SOP_PUSH_GPREL, REL) ++RELOC_TYPE (SOP_PUSH_TLS_TPREL, REL) ++RELOC_TYPE (SOP_PUSH_TLS_GOT, REL) ++RELOC_TYPE (SOP_PUSH_TLS_GD, REL) ++RELOC_TYPE (SOP_PUSH_PLT_PCREL, REL) ++RELOC_TYPE (SOP_ASSERT, REL) ++RELOC_TYPE (SOP_NOT, REL) ++RELOC_TYPE (SOP_SUB, REL) ++RELOC_TYPE (SOP_SL, REL) ++RELOC_TYPE (SOP_SR, REL) ++RELOC_TYPE (SOP_ADD, REL) ++RELOC_TYPE (SOP_AND, REL) ++RELOC_TYPE (SOP_IF_ELSE, REL) ++ ++RELOC_TYPE (SOP_POP_32_S_10_5, REL) ++RELOC_TYPE (SOP_POP_32_U_10_12, REL) ++RELOC_TYPE (SOP_POP_32_S_10_12, REL) ++RELOC_TYPE (SOP_POP_32_S_10_16, REL) ++RELOC_TYPE (SOP_POP_32_S_10_16_S2, REL) ++RELOC_TYPE (SOP_POP_32_S_5_20, REL) ++RELOC_TYPE (SOP_POP_32_S_0_5_10_16_S2, REL) ++RELOC_TYPE (SOP_POP_32_S_0_10_10_16_S2, REL) ++RELOC_TYPE (SOP_POP_32_U, REL) ++ ++/* used by the static linker for relocating non .text. */ ++RELOC_TYPE (ADD8, REL) ++RELOC_TYPE (ADD16, REL) ++RELOC_TYPE (ADD24, REL) ++RELOC_TYPE (ADD32, REL) ++RELOC_TYPE (ADD64, REL) ++RELOC_TYPE (SUB8, REL) ++RELOC_TYPE (SUB16, REL) ++RELOC_TYPE (SUB24, REL) ++RELOC_TYPE (SUB32, REL) ++RELOC_TYPE (SUB64, REL) ++RELOC_TYPE (GNU_VTINHERIT, REL) ++RELOC_TYPE (GNU_VTENTRY, REL) +diff --git a/backends/loongarch_retval.c b/backends/loongarch_retval.c +new file mode 100644 +index 0000000..6b345c8 +--- /dev/null ++++ b/backends/loongarch_retval.c +@@ -0,0 +1,179 @@ ++/* LoongArch specific backend library. ++ * ++ * Copyright (C) 2022 OpenAnolis community LoongArch SIG. ++ * ++ * Author: Liwei Ge ++ * ++ */ ++ ++/* ++ This file is free software; you can redistribute it and/or modify ++ it under the terms of either ++ ++ * the GNU Lesser General Public License as published by the Free ++ Software Foundation; either version 3 of the License, or (at ++ your option) any later version ++ ++ or ++ ++ * the GNU General Public License as published by the Free ++ Software Foundation; either version 2 of the License, or (at ++ your option) any later version ++ ++ or both in parallel, as here. ++ ++ elfutils is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received copies of the GNU General Public License and ++ the GNU Lesser General Public License along with this program. If ++ not, see . ++*/ ++ ++#ifdef HAVE_CONFIG_H ++# include ++#endif ++ ++#include ++#include ++ ++#define BACKEND loongarch_ ++#include "libebl_CPU.h" ++ ++static int ++dwarf_bytesize_aux (Dwarf_Die *die, Dwarf_Word *sizep) ++{ ++ int bits; ++ if (((bits = 8 * dwarf_bytesize (die)) < 0 ++ && (bits = dwarf_bitsize (die)) < 0) ++ || bits % 8 != 0) ++ return -1; ++ ++ *sizep = bits / 8; ++ return 0; ++} ++ ++/* r4 - r5, $a0 - $a1 Argument registers / return value registers */ ++static int ++pass_by_ref (const Dwarf_Op **locp) ++{ ++ static const Dwarf_Op loc[] = { { .atom = DW_OP_reg4 } }; ++ *locp = loc; ++ ++ return 1; ++} ++ ++static int ++pass_in_gpr (const Dwarf_Op **locp, Dwarf_Word size) ++{ ++ static const Dwarf_Op loc[] = ++ { ++ { .atom = DW_OP_reg4 }, { .atom = DW_OP_piece, .number = 8 }, ++ { .atom = DW_OP_reg5 }, { .atom = DW_OP_piece, .number = 8 } ++ }; ++ *locp = loc; ++ ++ return size <= 8 ? 1 : 4; ++} ++ ++/* r32 - r33, $fa0 - $fa1 Argument registers / return value registers */ ++static int ++pass_in_fpr (const Dwarf_Op **locp, Dwarf_Word size) ++{ ++ static const Dwarf_Op loc[] = ++ { ++ { .atom = DW_OP_regx, .number = 32 }, ++ { .atom = DW_OP_piece, .number = 8 }, ++ { .atom = DW_OP_regx, .number = 33 }, ++ { .atom = DW_OP_piece, .number = 8 } ++ }; ++ *locp = loc; ++ ++ return size <= 8 ? 1 : 4; ++} ++ ++int ++loongarch_return_value_location (Dwarf_Die *functypedie, const Dwarf_Op **locp) ++{ ++ /* Start with the function's type, and get the DW_AT_type attribute, ++ which is the type of the return value. */ ++ Dwarf_Die typedie; ++ int tag = dwarf_peeled_die_type (functypedie, &typedie); ++ if (tag <= 0) ++ return tag; ++ ++ Dwarf_Word size = (Dwarf_Word)-1; ++ ++ if (tag == DW_TAG_structure_type || tag == DW_TAG_union_type ++ || tag == DW_TAG_class_type || tag == DW_TAG_array_type) ++ { ++ if (dwarf_aggregate_size (&typedie, &size) < 0) ++ return -1; ++ ++ if (size > 16) ++ return pass_by_ref(locp); ++ else ++ return pass_in_gpr(locp, size); ++ } ++ ++ if (tag == DW_TAG_base_type ++ || tag == DW_TAG_pointer_type || tag == DW_TAG_ptr_to_member_type) ++ { ++ if (dwarf_bytesize_aux (&typedie, &size) < 0) ++ { ++ if (tag == DW_TAG_pointer_type || tag == DW_TAG_ptr_to_member_type) ++ size = 8; ++ else ++ return -1; ++ } ++ ++ Dwarf_Attribute attr_mem; ++ if (tag == DW_TAG_base_type) ++ { ++ Dwarf_Word encoding; ++ if (dwarf_formudata (dwarf_attr_integrate (&typedie, DW_AT_encoding, &attr_mem), ++ &encoding) != 0) ++ return -1; ++ ++ switch (encoding) ++ { ++ case DW_ATE_boolean: ++ case DW_ATE_signed: ++ case DW_ATE_unsigned: ++ case DW_ATE_unsigned_char: ++ case DW_ATE_signed_char: ++ return pass_in_gpr(locp, size); ++ ++ case DW_ATE_float: ++ switch (size) ++ { ++ case 4: /* single */ ++ case 8: /* double */ ++ return pass_in_fpr (locp, size); ++ case 16: ++ return pass_by_ref (locp); ++ default: ++ return -2; ++ } ++ case DW_ATE_complex_float: ++ switch (size) ++ { ++ case 8: /* single */ ++ case 16: /* double */ ++ return pass_in_fpr (locp, size); ++ case 32: ++ return pass_by_ref (locp); ++ default: ++ return -2; ++ } ++ } ++ } ++ else ++ return pass_in_gpr(locp, size); ++ } ++ ++ *locp = NULL; ++ return 0; ++} +diff --git a/backends/loongarch_symbol.c b/backends/loongarch_symbol.c +new file mode 100644 +index 0000000..b09448b +--- /dev/null ++++ b/backends/loongarch_symbol.c +@@ -0,0 +1,121 @@ ++/* LoongArch specific symbolic name handling. ++ * ++ * Copyright (C) 2022 OpenAnolis community LoongArch SIG. ++ * ++ * Author: Liwei Ge ++ * ++ */ ++ ++/* ++ This file is free software; you can redistribute it and/or modify ++ it under the terms of either ++ ++ * the GNU Lesser General Public License as published by the Free ++ Software Foundation; either version 3 of the License, or (at ++ your option) any later version ++ ++ or ++ ++ * the GNU General Public License as published by the Free ++ Software Foundation; either version 2 of the License, or (at ++ your option) any later version ++ ++ or both in parallel, as here. ++ ++ elfutils is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received copies of the GNU General Public License and ++ the GNU Lesser General Public License along with this program. If ++ not, see . ++*/ ++ ++#ifdef HAVE_CONFIG_H ++# include ++#endif ++ ++#include ++ ++#include ++#include ++#include ++ ++#define BACKEND loongarch_ ++#include "libebl_CPU.h" ++ ++ ++/* Check whether machine flags are valid. */ ++bool ++loongarch_machine_flag_check (GElf_Word flags) ++{ ++ ++ return ((flags &~ (EF_LARCH_ABI ++ | EF_LARCH_ABI_LP64D)) == 0); ++} ++ ++bool ++loongarch_check_special_symbol (Elf *elf, const GElf_Sym *sym, ++ const char *name, const GElf_Shdr *destshdr) ++{ ++ if (name != NULL && strcmp(name, "_GLOBAL_OFFSET_TABLE_") == 0) ++ { ++ size_t shstrndx; ++ if (elf_getshdrstrndx(elf, &shstrndx) != 0) ++ return false; ++ ++ const char *sname = elf_strptr(elf, shstrndx, destshdr->sh_name); ++ if (sname != NULL && (strcmp(sname, ".got") == 0 || strcmp(sname, ".got.plt") == 0)) ++ { ++ Elf_Scn *scn = NULL; ++ while ((scn = elf_nextscn(elf, scn)) != NULL) ++ { ++ GElf_Shdr shdr_mem; ++ GElf_Shdr *shdr = gelf_getshdr(scn, &shdr_mem); ++ if (shdr != NULL) ++ { ++ sname = elf_strptr(elf, shstrndx, shdr->sh_name); ++ if (sname != NULL && strcmp(sname, ".got") == 0) ++ return (sym->st_value >= shdr->sh_addr && sym->st_value < shdr->sh_addr + shdr->sh_size); ++ } ++ } ++ } ++ } ++ ++ return false; ++} ++ ++Elf_Type ++loongarch_reloc_simple_type (Ebl *ebl __attribute__ ((unused)), int type, ++ int *addsub __attribute__ ((unused))) ++{ ++ switch (type) ++ { ++ case R_LARCH_32: ++ return ELF_T_WORD; ++ case R_LARCH_64: ++ return ELF_T_XWORD; ++ ++ case R_LARCH_ADD8: ++ return ELF_T_BYTE; ++ case R_LARCH_ADD16: ++ return ELF_T_HALF; ++ case R_LARCH_ADD32: ++ return ELF_T_WORD; ++ case R_LARCH_ADD64: ++ return ELF_T_XWORD; ++ ++ case R_LARCH_SUB8: ++ return ELF_T_BYTE; ++ case R_LARCH_SUB16: ++ return ELF_T_HALF; ++ case R_LARCH_SUB32: ++ return ELF_T_WORD; ++ case R_LARCH_SUB64: ++ return ELF_T_XWORD; ++ ++ default: ++ return ELF_T_NUM; ++ } ++} +diff --git a/backends/loongarch_unwind.c b/backends/loongarch_unwind.c +new file mode 100644 +index 0000000..208b596 +--- /dev/null ++++ b/backends/loongarch_unwind.c +@@ -0,0 +1,85 @@ ++/* LoongArch specific backend library. ++ * ++ * Copyright (C) 2022 OpenAnolis community LoongArch SIG. ++ * ++ * Author: Liwei Ge ++ * ++ */ ++ ++/* ++ This file is free software; you can redistribute it and/or modify ++ it under the terms of either ++ ++ * the GNU Lesser General Public License as published by the Free ++ Software Foundation; either version 3 of the License, or (at ++ your option) any later version ++ ++ or ++ ++ * the GNU General Public License as published by the Free ++ Software Foundation; either version 2 of the License, or (at ++ your option) any later version ++ ++ or both in parallel, as here. ++ ++ elfutils is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received copies of the GNU General Public License and ++ the GNU Lesser General Public License along with this program. If ++ not, see . ++*/ ++ ++#ifdef HAVE_CONFIG_H ++# include ++#endif ++ ++#define BACKEND loongarch_ ++#define RA_REG 3 ++#define SP_REG 3 ++#define FP_REG 22 ++ ++#define RA_OFFSET 8 ++#define SP_OFFSET 16 ++ ++#include "libebl_CPU.h" ++ ++ ++bool ++loongarch_unwind (Ebl *ebl __attribute__ ((unused)), Dwarf_Addr pc __attribute__ ((unused)), ++ ebl_tid_registers_t *setfunc, ebl_tid_registers_get_t *getfunc, ++ ebl_pid_memory_read_t *readfunc, void *arg, ++ bool *signal_framep __attribute__ ((unused))) ++{ ++ ++ Dwarf_Word ra; ++ if (!getfunc(RA_REG, 1, &ra, arg)) ++ return false; ++ /* set next frame */ ++ setfunc(-1, 1, &ra, arg); ++ ++ Dwarf_Word fp, sp; ++ /* read from regs */ ++ if (!getfunc(FP_REG, 1, &fp, arg)) ++ fp = 0; ++ if (!getfunc(SP_REG, 1, &sp, arg)) ++ sp = 0; ++ ++ /* read from frame */ ++ Dwarf_Word prev_fp; ++ if (!readfunc(fp, &prev_fp, arg)) ++ prev_fp = 0; ++ Dwarf_Word new_ra; ++ if (!readfunc(fp + RA_OFFSET, &new_ra, arg)) ++ return false; ++ Dwarf_Word new_sp = fp + SP_OFFSET; ++ ++ /* set regs */ ++ setfunc(FP_REG, 1, &prev_fp, arg); ++ setfunc(RA_REG, 1, &new_ra, arg); ++ setfunc(SP_REG, 1, &new_sp, arg); ++ ++ return fp == 0 || new_sp > sp; ++} +diff --git a/libebl/eblopenbackend.c b/libebl/eblopenbackend.c +index 0c07296..a1e9228 100644 +--- a/libebl/eblopenbackend.c ++++ b/libebl/eblopenbackend.c +@@ -56,6 +56,7 @@ Ebl *m68k_init (Elf *, GElf_Half, Ebl *); + Ebl *bpf_init (Elf *, GElf_Half, Ebl *); + Ebl *riscv_init (Elf *, GElf_Half, Ebl *); + Ebl *csky_init (Elf *, GElf_Half, Ebl *); ++Ebl *loongarch_init (Elf *, GElf_Half, Ebl *); + + /* This table should contain the complete list of architectures as far + as the ELF specification is concerned. */ +@@ -81,6 +82,7 @@ static const struct + // XXX class and machine fields need to be filled in for all archs. + { sh_init, "elf_sh", "sh", 2, EM_SH, 0, 0 }, + { arm_init, "ebl_arm", "arm", 3, EM_ARM, 0, 0 }, ++ { loongarch_init, "elf_loongarch", "loongarch64", 11, EM_LOONGARCH, ELFCLASS64, ELFDATA2LSB }, + { sparc_init, "elf_sparcv9", "sparc", 5, EM_SPARCV9, 0, 0 }, + { sparc_init, "elf_sparc", "sparc", 5, EM_SPARC, 0, 0 }, + { sparc_init, "elf_sparcv8plus", "sparc", 5, EM_SPARC32PLUS, 0, 0 }, +-- +2.27.0 + diff --git a/elfutils.spec b/elfutils.spec index 6978d1b72a501605eeaee6ce70c422da9dc8398d..83528c0d415b381384c359dea4fe5c49e5282006 100644 --- a/elfutils.spec +++ b/elfutils.spec @@ -1,7 +1,8 @@ +%define anolis_release .0.1 Name: elfutils Version: 0.186 %global baserelease 1 -Release: %{baserelease}%{?dist} +Release: %{baserelease}%{anolis_release}%{?dist} URL: http://elfutils.org/ %global source_url ftp://sourceware.org/pub/elfutils/%{version}/ License: GPLv3+ and (GPLv2+ or LGPLv3+) and GFDL @@ -64,6 +65,8 @@ BuildRequires: gettext-devel # Patches Patch1: elfutils-0.186-brew-testsuite-workaround.patch +Patch1000: 1000-arch-support-loongarch64-platform.patch +Patch1001: 1001-backends-add-loongarch-support.patch %description Elfutils is a collection of utilities, including stack (to show @@ -442,6 +445,9 @@ exit 0 %systemd_postun_with_restart debuginfod.service %changelog +* Fri Sep 9 2022 Liwei Ge - 0.186-1.0.1 +- Support loongarch64 platform + * Thu Nov 11 2021 Mark Wielaard - 0.186-1 - Upgrade to upstream 0.186 - debuginfod-client: Default $DEBUGINFOD_URLS is computed from