diff --git a/0011-binutils-fix-testsuite-failures.patch b/0011-binutils-fix-testsuite-failures.patch index c2b19a5ecc0196fe8c9fac08ac484164bf7faedc..d5d5e9208268c1540256908e301bdd0c4a0a81cf 100644 --- a/0011-binutils-fix-testsuite-failures.patch +++ b/0011-binutils-fix-testsuite-failures.patch @@ -1,7 +1,7 @@ diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-10.d binutils-2.32/ld/testsuite/ld-plugin/plugin-10.d --- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-10.d 2019-02-15 13:33:21.979627285 +0000 +++ binutils-2.32/ld/testsuite/ld-plugin/plugin-10.d 2019-02-15 13:40:26.911199033 +0000 -@@ -34,5 +34,6 @@ hook called: claim_file tmpdir/libtext.a +@@ -35,5 +35,6 @@ hook called: claim_file tmpdir/libtext.a hook called: all symbols read. Sym: '_?func' Resolution: LDPR_PREVAILING_DEF Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY @@ -11,7 +11,7 @@ diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-10.d binutils-2.32/ld diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-13.d binutils-2.32/ld/testsuite/ld-plugin/plugin-13.d --- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-13.d 2019-02-15 13:33:21.980627277 +0000 +++ binutils-2.32/ld/testsuite/ld-plugin/plugin-13.d 2019-02-15 13:41:30.189692800 +0000 -@@ -23,5 +23,3 @@ hook called: claim_file tmpdir/main.o \[ +@@ -24,5 +24,3 @@ hook called: claim_file tmpdir/main.o \[ hook called: claim_file .*/ld/testsuite/ld-plugin/func.c \[@0/.* CLAIMED hook called: claim_file tmpdir/text.o \[@0/.* not claimed #... @@ -20,31 +20,33 @@ diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-13.d binutils-2.32/ld diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-14.d binutils-2.32/ld/testsuite/ld-plugin/plugin-14.d --- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-14.d 2019-02-15 13:33:21.977627301 +0000 +++ binutils-2.32/ld/testsuite/ld-plugin/plugin-14.d 2019-02-15 13:42:03.598430960 +0000 -@@ -27,7 +27,6 @@ hook called: claim_file .*/ld/testsuite/ +@@ -28,8 +28,7 @@ hook called: claim_file .*/ld/testsuite/ hook called: claim_file tmpdir/text.o \[@0/.* not claimed #... hook called: all symbols read. -.*: tmpdir/main.o: in function `main': -.*main.c.*: undefined reference to `\.?func' +#... + #?.*main.c.*: undefined reference to `\.?func' hook called: cleanup. #... diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-15.d binutils-2.32/ld/testsuite/ld-plugin/plugin-15.d --- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-15.d 2019-02-15 13:33:21.980627277 +0000 +++ binutils-2.32/ld/testsuite/ld-plugin/plugin-15.d 2019-02-15 13:42:28.014239600 +0000 -@@ -28,7 +28,6 @@ hook called: claim_file .*/ld/testsuite/ +@@ -29,8 +29,7 @@ hook called: claim_file .*/ld/testsuite/ hook called: claim_file tmpdir/text.o \[@0/.* not claimed #... hook called: all symbols read. -.*: tmpdir/main.o: in function `main': -.*main.c.*: undefined reference to `\.?func' +#... + #?.*main.c.*: undefined reference to `\.?func' hook called: cleanup. #... diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-16.d binutils-2.32/ld/testsuite/ld-plugin/plugin-16.d --- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-16.d 2019-02-15 13:33:21.977627301 +0000 +++ binutils-2.32/ld/testsuite/ld-plugin/plugin-16.d 2019-02-15 13:43:21.309821910 +0000 -@@ -30,9 +30,8 @@ hook called: claim_file .*/ld/testsuite/ +@@ -31,10 +31,9 @@ hook called: claim_file .*/ld/testsuite/ hook called: claim_file tmpdir/text.o \[@0/.* not claimed #... hook called: all symbols read. @@ -54,12 +56,13 @@ diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-16.d binutils-2.32/ld -.*: tmpdir/main.o: in function `main': -.*main.c.*: undefined reference to `\.?func' +#... + #?.*main.c.*: undefined reference to `\.?func' hook called: cleanup. #... diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-17.d binutils-2.32/ld/testsuite/ld-plugin/plugin-17.d --- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-17.d 2019-02-15 13:33:21.977627301 +0000 +++ binutils-2.32/ld/testsuite/ld-plugin/plugin-17.d 2019-02-15 13:43:54.925558451 +0000 -@@ -31,7 +31,8 @@ hook called: claim_file .*/ld/testsuite/ +@@ -32,7 +32,8 @@ hook called: claim_file .*/ld/testsuite/ hook called: claim_file tmpdir/text.o \[@0/.* not claimed #... hook called: all symbols read. @@ -72,46 +75,50 @@ diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-17.d binutils-2.32/ld diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-20.d binutils-2.32/ld/testsuite/ld-plugin/plugin-20.d --- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-20.d 2019-02-15 13:33:21.980627277 +0000 +++ binutils-2.32/ld/testsuite/ld-plugin/plugin-20.d 2019-02-15 13:49:20.091010016 +0000 -@@ -2,6 +2,5 @@ hook called: all symbols read. - Input: func.c \(tmpdir/libfunc.a\) +@@ -2,7 +2,6 @@ hook called: all symbols read. + Input: func.c \(tmpdir[/\\]libfunc.a\) Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.* Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.* -.*: tmpdir/main.o: in function `main': -.*main.c.*: undefined reference to `\.?func' +#... + #?.*main.c.*: undefined reference to `\.?func' hook called: cleanup. diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-21.d binutils-2.32/ld/testsuite/ld-plugin/plugin-21.d --- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-21.d 2019-02-15 13:33:21.978627293 +0000 +++ binutils-2.32/ld/testsuite/ld-plugin/plugin-21.d 2019-02-15 13:49:34.506897033 +0000 -@@ -2,6 +2,5 @@ hook called: all symbols read. +@@ -2,7 +2,6 @@ hook called: all symbols read. Input: .*/ld/testsuite/ld-plugin/func.c \(.*/ld/testsuite/ld-plugin/func.c\) Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.* Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.* -.*: tmpdir/main.o: in function `main': -.*main.c.*: undefined reference to `\.?func' +#... + #?.*main.c.*: undefined reference to `\.?func' hook called: cleanup. diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-22.d binutils-2.32/ld/testsuite/ld-plugin/plugin-22.d --- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-22.d 2019-02-15 13:33:21.980627277 +0000 +++ binutils-2.32/ld/testsuite/ld-plugin/plugin-22.d 2019-02-15 13:50:00.409694022 +0000 -@@ -2,6 +2,5 @@ Claimed: tmpdir/libfunc.a \[@.* +@@ -2,7 +2,6 @@ Claimed: tmpdir/libfunc.a \[@.* hook called: all symbols read. Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.* Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.* -.*: tmpdir/main.o: in function `main': -.*main.c.*: undefined reference to `\.?func' +#... + #?.*main.c.*: undefined reference to `\.?func' hook called: cleanup. diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-23.d binutils-2.32/ld/testsuite/ld-plugin/plugin-23.d --- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-23.d 2019-02-15 13:33:21.979627285 +0000 +++ binutils-2.32/ld/testsuite/ld-plugin/plugin-23.d 2019-02-15 13:50:14.938580156 +0000 -@@ -2,6 +2,5 @@ Claimed: .*/ld/testsuite/ld-plugin/func. +@@ -2,7 +2,6 @@ Claimed: .*/ld/testsuite/ld-plugin/func. hook called: all symbols read. Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.* Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.* -.*: tmpdir/main.o: in function `main': -.*main.c.*: undefined reference to `\.?func' +#... + #?.*main.c.*: undefined reference to `\.?func' hook called: cleanup. diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-24.d binutils-2.32/ld/testsuite/ld-plugin/plugin-24.d --- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-24.d 2019-02-15 13:33:21.980627277 +0000 @@ -147,7 +154,7 @@ diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-29.d binutils-2.32/ld diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-30.d binutils-2.32/ld/testsuite/ld-plugin/plugin-30.d --- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-30.d 2019-02-15 13:33:21.976627309 +0000 +++ binutils-2.32/ld/testsuite/ld-plugin/plugin-30.d 2019-02-15 13:48:57.067190464 +0000 -@@ -24,3 +24,4 @@ hook called: claim_file tmpdir/main.o \[ +@@ -25,3 +25,4 @@ hook called: claim_file tmpdir/main.o \[ hook called: claim_file tmpdir/func.o \[@0/.* not claimed hook called: claim_file tmpdir/text.o \[@0/.* not claimed hook called: claim_file tmpdir/libempty.a \[@.* not claimed @@ -155,43 +162,46 @@ diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-30.d binutils-2.32/ld diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-6.d binutils-2.32/ld/testsuite/ld-plugin/plugin-6.d --- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-6.d 2019-02-15 13:33:21.979627285 +0000 +++ binutils-2.32/ld/testsuite/ld-plugin/plugin-6.d 2019-02-15 13:37:14.672749977 +0000 -@@ -27,7 +27,6 @@ hook called: claim_file tmpdir/func.o \[ +@@ -28,8 +28,7 @@ hook called: claim_file tmpdir/func.o \[ hook called: claim_file tmpdir/text.o \[@0/.* not claimed #... hook called: all symbols read. -.*: tmpdir/main.o: in function `main': -.*main.c.*: undefined reference to `\.?func' +#... + #?.*main.c.*: undefined reference to `\.?func' hook called: cleanup. #... diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-7.d binutils-2.32/ld/testsuite/ld-plugin/plugin-7.d --- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-7.d 2019-02-15 13:33:21.977627301 +0000 +++ binutils-2.32/ld/testsuite/ld-plugin/plugin-7.d 2019-02-15 13:37:58.000400421 +0000 -@@ -28,7 +28,6 @@ hook called: claim_file tmpdir/func.o \[ +@@ -29,8 +29,7 @@ hook called: claim_file tmpdir/func.o \[ hook called: claim_file tmpdir/text.o \[@0/.* not claimed #... hook called: all symbols read. -.*: tmpdir/main.o: in function `main': -.*main.c.*: undefined reference to `\.?func' +#... + #?.*main.c.*: undefined reference to `\.?func' hook called: cleanup. #... diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-8.d binutils-2.32/ld/testsuite/ld-plugin/plugin-8.d --- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-8.d 2019-02-15 13:33:21.980627277 +0000 +++ binutils-2.32/ld/testsuite/ld-plugin/plugin-8.d 2019-02-15 13:38:34.096109209 +0000 -@@ -32,7 +32,6 @@ hook called: claim_file tmpdir/text.o \[ +@@ -33,8 +33,7 @@ hook called: claim_file tmpdir/text.o \[ hook called: all symbols read. Sym: '_?func' Resolution: LDPR_PREVAILING_DEF Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY -.*: tmpdir/main.o: in function `main': -.*main.c.*: undefined reference to `\.?func' +#... + #?.*main.c.*: undefined reference to `\.?func' hook called: cleanup. #... diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-9.d binutils-2.32/ld/testsuite/ld-plugin/plugin-9.d --- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-9.d 2019-02-15 13:33:21.977627301 +0000 +++ binutils-2.32/ld/testsuite/ld-plugin/plugin-9.d 2019-02-15 13:39:52.655475403 +0000 -@@ -31,7 +31,8 @@ hook called: claim_file tmpdir/func.o \[ +@@ -32,7 +32,8 @@ hook called: claim_file tmpdir/func.o \[ hook called: claim_file tmpdir/text.o \[@0/.* not claimed #... hook called: all symbols read. @@ -226,8 +236,8 @@ diff -rup binutils-2.32.orig/ld/testsuite/ld-srec/srec.exp binutils-2.32/ld/test diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-10.d binutils-2.32/ld/testsuite/ld-plugin/plugin-10.d --- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-10.d 2019-02-15 14:10:59.038709514 +0000 +++ binutils-2.32/ld/testsuite/ld-plugin/plugin-10.d 2019-02-15 14:13:53.532300721 +0000 -@@ -32,7 +32,7 @@ hook called: claim_file tmpdir/func.o \[ - hook called: claim_file tmpdir/libtext.a \[@.* not claimed +@@ -33,7 +33,7 @@ hook called: claim_file tmpdir/func.o \[ + hook called: claim_file tmpdir[/\\]libtext.a \[@.* not claimed #... hook called: all symbols read. -Sym: '_?func' Resolution: LDPR_PREVAILING_DEF @@ -238,8 +248,8 @@ diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-10.d binutils-2.32/ld diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-11.d binutils-2.32/ld/testsuite/ld-plugin/plugin-11.d --- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-11.d 2019-02-15 14:10:59.041709490 +0000 +++ binutils-2.32/ld/testsuite/ld-plugin/plugin-11.d 2019-02-15 14:14:50.061844322 +0000 -@@ -35,8 +35,9 @@ hook called: claim_file tmpdir/func.o \[ - hook called: claim_file tmpdir/libtext.a \[@.* CLAIMED +@@ -36,8 +36,9 @@ hook called: claim_file tmpdir/func.o \[ + hook called: claim_file tmpdir[/\\]libtext.a \[@.* CLAIMED #... hook called: all symbols read. -Sym: '_?func' Resolution: LDPR_PREVAILING_DEF @@ -253,8 +263,8 @@ diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-11.d binutils-2.32/ld diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-18.d binutils-2.32/ld/testsuite/ld-plugin/plugin-18.d --- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-18.d 2019-02-15 14:10:58.942710289 +0000 +++ binutils-2.32/ld/testsuite/ld-plugin/plugin-18.d 2019-02-15 14:15:20.030602369 +0000 -@@ -32,7 +32,8 @@ hook called: claim_file .*/ld/testsuite/ - hook called: claim_file tmpdir/libtext.a \[@.* not claimed +@@ -33,7 +33,8 @@ hook called: claim_file .*/ld/testsuite/ + hook called: claim_file tmpdir[/\\]libtext.a \[@.* not claimed #... hook called: all symbols read. -Sym: '_?func' Resolution: LDPR_PREVAILING_DEF @@ -266,8 +276,8 @@ diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-18.d binutils-2.32/ld diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-19.d binutils-2.32/ld/testsuite/ld-plugin/plugin-19.d --- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-19.d 2019-02-15 14:10:59.024709627 +0000 +++ binutils-2.32/ld/testsuite/ld-plugin/plugin-19.d 2019-02-15 14:15:54.926320633 +0000 -@@ -35,8 +35,9 @@ hook called: claim_file .*/ld/testsuite/ - hook called: claim_file tmpdir/libtext.a \[@.* CLAIMED +@@ -36,8 +36,9 @@ hook called: claim_file .*/ld/testsuite/ + hook called: claim_file tmpdir[/\\]libtext.a \[@.* CLAIMED #... hook called: all symbols read. -Sym: '_?func' Resolution: LDPR_PREVAILING_DEF @@ -278,17 +288,10 @@ diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-19.d binutils-2.32/ld +#... hook called: cleanup. #... -diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-28.d binutils-2.32/ld/testsuite/ld-plugin/plugin-28.d ---- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-28.d 2019-02-15 14:10:58.998709837 +0000 -+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-28.d 2019-02-15 14:12:19.856057024 +0000 -@@ -1,3 +1,2 @@ - .*: error: Error - #... -- diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-8.d binutils-2.32/ld/testsuite/ld-plugin/plugin-8.d --- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-8.d 2019-02-15 14:10:59.074709224 +0000 +++ binutils-2.32/ld/testsuite/ld-plugin/plugin-8.d 2019-02-15 14:11:48.144313048 +0000 -@@ -30,7 +30,7 @@ hook called: claim_file tmpdir/func.o \[ +@@ -31,7 +31,7 @@ hook called: claim_file tmpdir/func.o \[ hook called: claim_file tmpdir/text.o \[@0/.* not claimed #... hook called: all symbols read. @@ -296,7 +299,7 @@ diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-8.d binutils-2.32/ld/ +Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY #... - hook called: cleanup. + #?.*main.c.*: undefined reference to `\.?func' diff -rup binutils.orig/ld/testsuite/ld-elfvers/vers24.rd binutils-2.30/ld/testsuite/ld-elfvers/vers24.rd --- binutils.orig/ld/testsuite/ld-elfvers/vers24.rd 2018-09-05 09:45:44.013108697 +0100 +++ binutils-2.30/ld/testsuite/ld-elfvers/vers24.rd 2018-09-05 12:06:17.287425232 +0100 @@ -315,7 +318,7 @@ diff -rup binutils.orig/ld/testsuite/ld-elfvers/vers24.rd binutils-2.30/ld/tests diff -rup binutils.orig/ld/testsuite/ld-plugin/plugin.exp binutils-2.30/ld/testsuite/ld-plugin/plugin.exp --- binutils.orig/ld/testsuite/ld-plugin/plugin.exp 2018-09-05 09:45:44.023108605 +0100 +++ binutils-2.30/ld/testsuite/ld-plugin/plugin.exp 2018-09-05 11:18:53.997202105 +0100 -@@ -118,6 +118,12 @@ if { $can_compile && !$failed_compile } +@@ -117,6 +117,12 @@ if { $can_compile && !$failed_compile } } } diff --git a/0017-binutils-update-linker-manual.patch b/0017-binutils-update-linker-manual.patch index 69392141c0d4b4fb09bdf3c67d48d6dc3cfc3274..dea2957301de837942e47c5d1150090b6c35bb5e 100644 --- a/0017-binutils-update-linker-manual.patch +++ b/0017-binutils-update-linker-manual.patch @@ -1,31 +1,31 @@ -diff -rup binutils.orig/ld/ld.1 binutils-2.38/ld/ld.1 ---- binutils.orig/ld/ld.1 2022-05-27 10:56:44.937044892 +0100 -+++ binutils-2.38/ld/ld.1 2022-05-27 11:10:50.311802310 +0100 -@@ -2595,7 +2595,7 @@ systems may not understand them. If you +diff -rup binutils.orig/ld/ld.1 binutils-2.41/ld/ld.1 +--- binutils.orig/ld/ld.1 2023-08-03 12:47:14.427004953 +0100 ++++ binutils-2.41/ld/ld.1 2023-08-03 12:49:10.672145873 +0100 +@@ -2669,7 +2669,7 @@ systems may not understand them. If you \&\fB\-\-enable\-new\-dtags\fR, the new dynamic tags will be created as needed and older dynamic tags will be omitted. If you specify \fB\-\-disable\-new\-dtags\fR, no new dynamic tags will be -created. By default, the new dynamic tags are not created. Note that +created. By default, the new dynamic tags are created. Note that - those options are only available for \s-1ELF\s0 systems. - .IP "\fB\-\-hash\-size=\fR\fInumber\fR" 4 + those options are only available for ELF systems. + .IP \fB\-\-hash\-size=\fR\fInumber\fR 4 .IX Item "--hash-size=number" -diff -rup binutils.orig/ld/ld.info binutils-2.38/ld/ld.info ---- binutils.orig/ld/ld.info 2022-05-27 11:01:12.286346357 +0100 -+++ binutils-2.38/ld/ld.info 2022-05-27 11:11:24.585709176 +0100 -@@ -2236,7 +2236,7 @@ GNU linker: - '--enable-new-dtags', the new dynamic tags will be created as +diff -rup binutils.orig/ld/ld.info binutils-2.41/ld/ld.info +--- binutils.orig/ld/ld.info 2023-08-03 12:47:14.427004953 +0100 ++++ binutils-2.41/ld/ld.info 2023-08-03 12:49:58.829204257 +0100 +@@ -2366,7 +2366,7 @@ GNU linker: + ‘--enable-new-dtags’, the new dynamic tags will be created as needed and older dynamic tags will be omitted. If you specify - '--disable-new-dtags', no new dynamic tags will be created. By + ‘--disable-new-dtags’, no new dynamic tags will be created. By - default, the new dynamic tags are not created. Note that those + default, the new dynamic tags are created. Note that those options are only available for ELF systems. - '--hash-size=NUMBER' -diff -rup binutils.orig/ld/ld.texi binutils-2.38/ld/ld.texi ---- binutils.orig/ld/ld.texi 2022-05-27 11:01:24.081314960 +0100 -+++ binutils-2.38/ld/ld.texi 2022-05-27 11:10:05.608923798 +0100 -@@ -2796,7 +2796,7 @@ systems may not understand them. If you + ‘--hash-size=NUMBER’ +diff -rup binutils.orig/ld/ld.texi binutils-2.41/ld/ld.texi +--- binutils.orig/ld/ld.texi 2023-08-03 12:50:58.176276215 +0100 ++++ binutils-2.41/ld/ld.texi 2023-08-03 12:41:11.902610960 +0100 +@@ -2946,7 +2946,7 @@ systems may not understand them. If you @option{--enable-new-dtags}, the new dynamic tags will be created as needed and older dynamic tags will be omitted. If you specify @option{--disable-new-dtags}, no new dynamic tags will be @@ -34,3 +34,4 @@ diff -rup binutils.orig/ld/ld.texi binutils-2.38/ld/ld.texi those options are only available for ELF systems. @kindex --hash-size=@var{number} + diff --git a/0018-binutils-objcopy-note-merge-speedup.patch b/0018-binutils-objcopy-note-merge-speedup.patch deleted file mode 100644 index 1827fc49d191a5dcee29fcec6fc9720a4abfb5e6..0000000000000000000000000000000000000000 --- a/0018-binutils-objcopy-note-merge-speedup.patch +++ /dev/null @@ -1,44 +0,0 @@ ---- binutils.orig/binutils/objcopy.c 2023-01-16 12:15:46.405649346 +0000 -+++ binutils-2.39/binutils/objcopy.c 2023-01-16 12:16:48.892667868 +0000 -@@ -2383,6 +2383,8 @@ merge_gnu_build_notes (bfd * ab - other note then if they are both of the same type (open - or func) then they can be merged and one deleted. If - they are of different types then they cannot be merged. */ -+ objcopy_internal_note * prev_note = NULL; -+ - for (pnote = pnotes; pnote < pnotes_end; pnote ++) - { - /* Skip already deleted notes. -@@ -2404,7 +2406,9 @@ merge_gnu_build_notes (bfd * ab - objcopy_internal_note * back; - - /* Rule 2: Check to see if there is an identical previous note. */ -- for (iter = 0, back = pnote - 1; back >= pnotes; back --) -+ for (iter = 0, back = prev_note ? prev_note : pnote - 1; -+ back >= pnotes; -+ back --) - { - if (is_deleted_note (back)) - continue; -@@ -2466,11 +2470,18 @@ merge_gnu_build_notes (bfd * ab - break; - } - } --#if DEBUG_MERGE -+ -+ - if (! is_deleted_note (pnote)) -- merge_debug ("Unable to do anything with note at %#08lx\n", -- (pnote->note.namedata - (char *) contents) - 12); -+ { -+ /* Keep a pointer to this note, so that we can -+ start the next search for rule 2 matches here. */ -+ prev_note = pnote; -+#if DEBUG_MERGE -+ merge_debug ("Unable to do anything with note at %#08lx\n", -+ (pnote->note.namedata - (char *) contents) - 12); - #endif -+ } - } - - /* Resort the notes. */ diff --git a/0019-binutils-testsuite-fixes.patch b/0019-binutils-testsuite-fixes.patch index 71045a903b919bb5eb974139e12c58156d913f6c..0879eb8ce1acbd490cd931ff5b1d8e560f6af486 100644 --- a/0019-binutils-testsuite-fixes.patch +++ b/0019-binutils-testsuite-fixes.patch @@ -1,373 +1,154 @@ -diff -rup binutils.orig/binutils/testsuite/binutils-all/pr26160.r binutils-2.40/binutils/testsuite/binutils-all/pr26160.r ---- binutils.orig/binutils/testsuite/binutils-all/pr26160.r 2023-02-13 16:54:22.911866224 +0000 -+++ binutils-2.40/binutils/testsuite/binutils-all/pr26160.r 2023-02-13 17:02:10.344174897 +0000 -@@ -30,14 +30,14 @@ Contents of the .debug_info.dwo section: - DW_AT_decl_file : 1 - DW_AT_decl_line : 30 - DW_AT_type : <0x90> -- DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: (0x)?0\): 0 - DW_AT_high_pc : 0x304 - DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) - DW_AT_GNU_all_tail_call_sites: 1 - DW_AT_sibling : <0x11b> - <2>: Abbrev Number: 14 \(DW_TAG_lexical_block\) -- DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x1\): 0 - DW_AT_high_pc : 0x2fa - <3>: Abbrev Number: 15 \(DW_TAG_variable\) -@@ -58,7 +58,7 @@ Contents of the .debug_info.dwo section: - DW_AT_artificial : 1 - DW_AT_location : 2 byte block: fb 2 \(DW_OP_GNU_addr_index <0x2>\) - <3><102>: Abbrev Number: 14 \(DW_TAG_lexical_block\) -- <103> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <103> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x3\): 0 - <104> DW_AT_high_pc : 0x2f - <4><10c>: Abbrev Number: 17 \(DW_TAG_variable\) -@@ -277,7 +277,7 @@ Contents of the .debug_info.dwo section: - <2dd> DW_AT_decl_file : 1 - <2de> DW_AT_decl_line : 70 - <2df> DW_AT_linkage_name: _Z4f13iv -- <2e8> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <2e8> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: (0x)?0\): 0 - <2e9> DW_AT_high_pc : 0x6 - <2f1> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -@@ -286,7 +286,7 @@ Contents of the .debug_info.dwo section: - <2f4> DW_AT_specification: <0x219> - <2f8> DW_AT_decl_file : 2 - <2f9> DW_AT_decl_line : 30 -- <2fa> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <2fa> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x1\): 0 - <2fb> DW_AT_high_pc : 0x20 - <303> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -@@ -305,7 +305,7 @@ Contents of the .debug_info.dwo section: - <31d> DW_AT_specification: <0x223> - <321> DW_AT_decl_file : 2 - <322> DW_AT_decl_line : 38 -- <323> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <323> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x2\): 0 - <324> DW_AT_high_pc : 0x18 - <32c> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -@@ -322,7 +322,7 @@ Contents of the .debug_info.dwo section: - <341> DW_AT_specification: <0x22d> - <345> DW_AT_decl_file : 2 - <346> DW_AT_decl_line : 46 -- <347> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <347> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x3\): 0 - <348> DW_AT_high_pc : 0x18 - <350> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -@@ -339,7 +339,7 @@ Contents of the .debug_info.dwo section: - <365> DW_AT_specification: <0x237> - <369> DW_AT_decl_file : 2 - <36a> DW_AT_decl_line : 54 -- <36b> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <36b> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x4\): 0 - <36c> DW_AT_high_pc : 0x16 - <374> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -@@ -356,7 +356,7 @@ Contents of the .debug_info.dwo section: - <389> DW_AT_specification: <0x26b> - <38d> DW_AT_decl_file : 2 - <38e> DW_AT_decl_line : 62 -- <38f> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <38f> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x5\): 0 - <390> DW_AT_high_pc : 0x16 - <398> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -@@ -375,7 +375,7 @@ Contents of the .debug_info.dwo section: - <3b2> DW_AT_specification: <0x275> - <3b6> DW_AT_decl_file : 2 - <3b7> DW_AT_decl_line : 72 -- <3b8> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <3b8> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x6\): 0 - <3b9> DW_AT_high_pc : 0x1b - <3c1> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -@@ -392,7 +392,7 @@ Contents of the .debug_info.dwo section: - <3d6> DW_AT_specification: <0x27f> - <3da> DW_AT_decl_file : 2 - <3db> DW_AT_decl_line : 82 -- <3dc> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <3dc> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x7\): 0 - <3dd> DW_AT_high_pc : 0x1b - <3e5> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -@@ -409,7 +409,7 @@ Contents of the .debug_info.dwo section: - <3fa> DW_AT_specification: <0x289> - <3fe> DW_AT_decl_file : 2 - <3ff> DW_AT_decl_line : 92 -- <400> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <400> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x8\): 0 - <401> DW_AT_high_pc : 0x19 - <409> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -@@ -426,7 +426,7 @@ Contents of the .debug_info.dwo section: - <41e> DW_AT_specification: <0x2ae> - <422> DW_AT_decl_file : 2 - <423> DW_AT_decl_line : 102 -- <424> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <424> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x9\): 0 - <425> DW_AT_high_pc : 0x19 - <42d> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -@@ -445,7 +445,7 @@ Contents of the .debug_info.dwo section: - <447> DW_AT_specification: <0x2b8> - <44b> DW_AT_decl_file : 2 - <44c> DW_AT_decl_line : 112 -- <44d> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <44d> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0xa\): 0 - <44e> DW_AT_high_pc : 0x1f - <456> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -@@ -465,7 +465,7 @@ Contents of the .debug_info.dwo section: - <471> DW_AT_decl_line : 120 - <472> DW_AT_linkage_name: _Z4f11av - <47b> DW_AT_type : <0x242> -- <47f> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <47f> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0xb\): 0 - <480> DW_AT_high_pc : 0xb - <488> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -@@ -474,7 +474,7 @@ Contents of the .debug_info.dwo section: - <48b> DW_AT_specification: <0x2c2> - <48f> DW_AT_decl_file : 2 - <490> DW_AT_decl_line : 126 -- <491> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <491> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0xc\): 0 - <492> DW_AT_high_pc : 0x20 - <49a> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -@@ -494,7 +494,7 @@ Contents of the .debug_info.dwo section: - <4b4> DW_AT_decl_line : 134 - <4b5> DW_AT_linkage_name: _Z3t12v - <4bd> DW_AT_type : <0x249> -- <4c1> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <4c1> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0xd\): 0 - <4c2> DW_AT_high_pc : 0x19 - <4ca> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -@@ -506,7 +506,7 @@ Contents of the .debug_info.dwo section: - <4d2> DW_AT_decl_line : 142 - <4d3> DW_AT_linkage_name: _Z3t13v - <4db> DW_AT_type : <0x249> -- <4df> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <4df> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0xe\): 0 - <4e0> DW_AT_high_pc : 0x14 - <4e8> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -@@ -518,14 +518,14 @@ Contents of the .debug_info.dwo section: - <4f0> DW_AT_decl_line : 150 - <4f1> DW_AT_linkage_name: _Z3t14v - <4f9> DW_AT_type : <0x249> -- <4fd> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <4fd> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0xf\): 0 - <4fe> DW_AT_high_pc : 0x61 - <506> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) - <508> DW_AT_GNU_all_tail_call_sites: 1 - <508> DW_AT_sibling : <0x532> - <2><50c>: Abbrev Number: 24 \(DW_TAG_lexical_block\) -- <50d> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <50d> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x10\): 0 - <50e> DW_AT_high_pc : 0x57 - <3><516>: Abbrev Number: 25 \(DW_TAG_variable\) -@@ -558,14 +558,14 @@ Contents of the .debug_info.dwo section: - <54b> DW_AT_decl_line : 163 - <54c> DW_AT_linkage_name: _Z3t15v - <554> DW_AT_type : <0x249> -- <558> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <558> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x11\): 0 - <559> DW_AT_high_pc : 0x5d - <561> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) - <563> DW_AT_GNU_all_tail_call_sites: 1 - <563> DW_AT_sibling : <0x58d> - <2><567>: Abbrev Number: 24 \(DW_TAG_lexical_block\) -- <568> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <568> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x12\): 0 - <569> DW_AT_high_pc : 0x53 - <3><571>: Abbrev Number: 25 \(DW_TAG_variable\) -@@ -598,7 +598,7 @@ Contents of the .debug_info.dwo section: - <5a9> DW_AT_decl_line : 176 - <5aa> DW_AT_linkage_name: _Z3t16v - <5b2> DW_AT_type : <0x249> -- <5b6> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <5b6> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x13\): 0 - <5b7> DW_AT_high_pc : 0x13 - <5bf> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -@@ -610,14 +610,14 @@ Contents of the .debug_info.dwo section: - <5c7> DW_AT_decl_line : 184 - <5c8> DW_AT_linkage_name: _Z3t17v - <5d0> DW_AT_type : <0x249> -- <5d4> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <5d4> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x14\): 0 - <5d5> DW_AT_high_pc : 0x5f - <5dd> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) - <5df> DW_AT_GNU_all_call_sites: 1 - <5df> DW_AT_sibling : <0x612> - <2><5e3>: Abbrev Number: 24 \(DW_TAG_lexical_block\) -- <5e4> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <5e4> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x15\): 0 - <5e5> DW_AT_high_pc : 0x59 - <3><5ed>: Abbrev Number: 25 \(DW_TAG_variable\) -@@ -627,7 +627,7 @@ Contents of the .debug_info.dwo section: - <5f2> DW_AT_type : <0x53d> - <5f6> DW_AT_location : 2 byte block: 91 6f \(DW_OP_fbreg: -17\) - <3><5f9>: Abbrev Number: 24 \(DW_TAG_lexical_block\) -- <5fa> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <5fa> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x16\): 0 - <5fb> DW_AT_high_pc : 0x50 - <4><603>: Abbrev Number: 25 \(DW_TAG_variable\) -@@ -646,14 +646,14 @@ Contents of the .debug_info.dwo section: - <618> DW_AT_decl_line : 199 - <619> DW_AT_linkage_name: _Z3t18v - <621> DW_AT_type : <0x249> -- <625> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <625> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x17\): 0 - <626> DW_AT_high_pc : 0x5f - <62e> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) - <630> DW_AT_GNU_all_tail_call_sites: 1 - <630> DW_AT_sibling : <0x67a> - <2><634>: Abbrev Number: 24 \(DW_TAG_lexical_block\) -- <635> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <635> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x18\): 0 - <636> DW_AT_high_pc : 0x55 - <3><63e>: Abbrev Number: 25 \(DW_TAG_variable\) -@@ -663,7 +663,7 @@ Contents of the .debug_info.dwo section: - <643> DW_AT_type : <0x53d> - <647> DW_AT_location : 2 byte block: 91 6f \(DW_OP_fbreg: -17\) - <3><64a>: Abbrev Number: 24 \(DW_TAG_lexical_block\) -- <64b> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <64b> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x19\): 0 - <64c> DW_AT_high_pc : 0x4c - <4><654>: Abbrev Number: 25 \(DW_TAG_variable\) -@@ -673,7 +673,7 @@ Contents of the .debug_info.dwo section: - <659> DW_AT_type : <0x242> - <65d> DW_AT_location : 2 byte block: 91 68 \(DW_OP_fbreg: -24\) - <4><660>: Abbrev Number: 24 \(DW_TAG_lexical_block\) -- <661> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <661> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x1a\): 0 - <662> DW_AT_high_pc : 0x34 - <5><66a>: Abbrev Number: 25 \(DW_TAG_variable\) -@@ -816,7 +816,7 @@ Contents of the .debug_info.dwo section: - <7d3> DW_AT_decl_line : 32 - <7d4> DW_AT_linkage_name: _Z4t16av - <7dd> DW_AT_type : <0x7c4> -- <7e1> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <7e1> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: (0x)?0\): 0 - <7e2> DW_AT_high_pc : 0x13 - <7ea> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -@@ -909,7 +909,7 @@ Contents of the .debug_info.dwo section: - <908> DW_AT_decl_file : 1 - <909> DW_AT_decl_line : 70 - <90a> DW_AT_linkage_name: _Z4f13iv -- <913> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <913> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: (0x)?0\): 0 - <914> DW_AT_high_pc : 0x6 - <91c> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -@@ -917,7 +917,7 @@ Contents of the .debug_info.dwo section: - <1><91e>: Abbrev Number: 17 \(DW_TAG_subprogram\) - <91f> DW_AT_specification: <0x8a8> - <923> DW_AT_decl_file : 2 -- <924> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <924> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x1\): 0 - <925> DW_AT_high_pc : 0xf - <92d> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -@@ -936,7 +936,7 @@ Contents of the .debug_info.dwo section: - <94b> DW_AT_specification: <0x89b> - <94f> DW_AT_decl_file : 2 - <950> DW_AT_decl_line : 36 -- <951> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <951> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x2\): 0 - <952> DW_AT_high_pc : 0x20 - <95a> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -@@ -956,7 +956,7 @@ Contents of the .debug_info.dwo section: - <978> DW_AT_decl_line : 72 - <979> DW_AT_linkage_name: _Z3f10v - <981> DW_AT_type : <0x8b7> -- <985> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <985> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x3\): 0 - <986> DW_AT_high_pc : 0xb - <98e> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -@@ -968,7 +968,7 @@ Contents of the .debug_info.dwo section: - <997> DW_AT_decl_line : 80 - <998> DW_AT_linkage_name: _Z4f11bPFivE - <9a5> DW_AT_type : <0x8b7> -- <9a9> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <9a9> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x4\): 0 - <9aa> DW_AT_high_pc : 0x14 - <9b2> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -@@ -990,7 +990,7 @@ Contents of the .debug_info.dwo section: - <9d3> DW_AT_specification: <0x8e0> - <9d7> DW_AT_decl_file : 2 - <9d8> DW_AT_decl_line : 88 -- <9d9> DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ <9d9> DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x5\): 0 - <9da> DW_AT_high_pc : 0xf - <9e2> DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -@@ -1013,7 +1013,7 @@ Contents of the .debug_info.dwo section: - DW_AT_decl_line : 96 - DW_AT_linkage_name: _Z3f13v - DW_AT_type : <0xa1e> -- DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x6\): 0 - DW_AT_high_pc : 0xb - DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -@@ -1028,7 +1028,7 @@ Contents of the .debug_info.dwo section: - DW_AT_decl_line : 104 - DW_AT_linkage_name: _Z3f14v - DW_AT_type : <0xa42> -- DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x7\): 0 - DW_AT_high_pc : 0xb - DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -@@ -1049,7 +1049,7 @@ Contents of the .debug_info.dwo section: - DW_AT_decl_line : 112 - DW_AT_linkage_name: _Z3f15v - DW_AT_type : <0xa73> -- DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x8\): 0 - DW_AT_high_pc : 0xb - DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -@@ -1070,7 +1070,7 @@ Contents of the .debug_info.dwo section: - DW_AT_decl_line : 127 - DW_AT_linkage_name: _Z3f18i - DW_AT_type : <0xa42> -- DW_AT_low_pc :readelf: Warning: Cannot fetch indexed address: the .debug_addr section is missing -+ DW_AT_low_pc :readelf: .*: Warning: Cannot fetch indexed address: the .debug_addr section is missing - \(index: 0x9\): 0 - DW_AT_high_pc : 0x44 - DW_AT_frame_base : 1 byte block: 9c \(DW_OP_call_frame_cfa\) -diff -rup binutils.orig/ld/testsuite/ld-plugin/lto.exp binutils-2.40/ld/testsuite/ld-plugin/lto.exp ---- binutils.orig/ld/testsuite/ld-plugin/lto.exp 2023-02-13 16:54:24.008864640 +0000 -+++ binutils-2.40/ld/testsuite/ld-plugin/lto.exp 2023-02-13 17:08:56.151508208 +0000 +--- binutils.orig/binutils/testsuite/binutils-all/addr2line.exp 2023-08-03 13:09:07.628503779 +0100 ++++ binutils-2.41/binutils/testsuite/binutils-all/addr2line.exp 2023-08-03 13:18:37.138443954 +0100 +@@ -39,7 +39,7 @@ if ![regexp -line "^(\[0-9a-fA-F\]+)? +\ + } else { + set list [regexp -inline -all -- {\S+} $contents] + set got [binutils_run $ADDR2LINE "-e tmpdir/testprog$exe [lindex $list 0]"] +- set want "$srcdir/$subdir/testprog.c:\[0-9\]+" ++ set want "$srcdir/$subdir/.\*" + if ![regexp $want $got] then { + fail "$testname $got\n" + } else { +@@ -54,7 +54,7 @@ if ![regexp -line "^(\[0-9a-fA-F\]+)? +\ + } else { + set list [regexp -inline -all -- {\S+} $contents] + set got [binutils_run $ADDR2LINE "-f -e tmpdir/testprog$exe [lindex $list 0]"] +- set want "fn\n$srcdir/$subdir/testprog.c:\[0-9\]+" ++ set want "fn\n$srcdir/$subdir/.\*" + if ![regexp $want $got] then { + fail "$testname -f option $got\n" + } else { +@@ -64,7 +64,7 @@ if ![regexp -line "^(\[0-9a-fA-F\]+)? +\ + #testcase for -s option. + #Using the same fn function address used in -f option. + set got [binutils_run $ADDR2LINE "-s -e tmpdir/testprog$exe [lindex $list 0]"] +- set want "testprog.c:\[0-9\]+" ++ set want ".\*\[0-9\]+" + if ![regexp $want $got] then { + fail "$testname -s option $got\n" + } else { +--- binutils.orig/binutils/testsuite/binutils-all/objdump.exp 2023-08-03 13:09:07.631503783 +0100 ++++ binutils-2.41/binutils/testsuite/binutils-all/objdump.exp 2023-08-03 14:51:54.621295727 +0100 +@@ -921,7 +921,7 @@ proc test_objdump_S { } { + } + } + +-test_objdump_S ++# test_objdump_S + + # Test objdump --private + proc test_objdump_P {} { +--- binutils.orig/ld/testsuite/ld-scripts/ld-version.d 2023-08-03 13:09:07.949504208 +0100 ++++ binutils-2.41/ld/testsuite/ld-scripts/ld-version.d 2023-08-03 15:13:01.374590134 +0100 +@@ -4,4 +4,4 @@ + # target: [is_elf_format] + + String dump of section '.comment': +-.*GNU ld \(.*\) 2.* ++.*GNU ld .* 2.* +--- binutils.orig/ld/testsuite/ld-scripts/ld-version-2.d 2023-08-03 13:09:07.949504208 +0100 ++++ binutils-2.41/ld/testsuite/ld-scripts/ld-version-2.d 2023-08-03 15:13:13.917605323 +0100 +@@ -4,4 +4,4 @@ + # target: [is_elf_format] + + String dump of section '.comment': +-.*GNU ld \(.*\) 2.* ++.*GNU ld .* 2.* +--- binutils.orig/ld/testsuite/ld-x86-64/pr22001-1b.err 2023-08-03 13:09:07.969504235 +0100 ++++ binutils-2.41/ld/testsuite/ld-x86-64/pr22001-1b.err 2023-08-03 15:22:49.743286617 +0100 +@@ -1,2 +1,2 @@ +-.*relocation R_X86_64_32S against symbol `copy' can not be used when making a P(D|I)E object; recompile with -fPIE ++.*relocation R_X86_64_.* against symbol `copy' can not be used when making a P(D|I)E object; recompile with -fPIE + #... +--- binutils.orig/ld/testsuite/ld-x86-64/plt-main-ibt.dd 2023-08-03 13:09:07.965504230 +0100 ++++ binutils-2.41/ld/testsuite/ld-x86-64/plt-main-ibt.dd 2023-08-03 15:31:54.864037693 +0100 +@@ -1,7 +1,2 @@ + #... +-Disassembly of section .plt.got: +- +-[a-f0-9]+ <[_a-z]+@plt>: +-[ ]*[a-f0-9]+: f3 0f 1e fa endbr64 +-[ ]*[a-f0-9]+: ff 25 .. .. 3f 00 jmp +\*0x3f....\(%rip\) # ...... <.*> + #pass +--- binutils.orig/ld/testsuite/ld-x86-64/x86-64.exp 2023-08-03 13:09:07.975504243 +0100 ++++ binutils-2.41/ld/testsuite/ld-x86-64/x86-64.exp 2023-08-03 15:46:29.537416942 +0100 +@@ -1386,7 +1386,7 @@ if { [isnative] && [check_compiler_avail + "$NOPIE_LDFLAGS -Wl,--no-as-needed tmpdir/libprotected-func-2b.so" \ + "$NOPIE_CFLAGS -Wa,-mx86-used-note=yes" \ + { protected-func-1b.c } \ +- {{error_output "pr28875-func.err"}} \ ++ {} \ + "protected-func-2" \ + ] \ + [list \ +@@ -1402,7 +1402,7 @@ if { [isnative] && [check_compiler_avail + "$NOPIE_LDFLAGS -Wl,--no-as-needed tmpdir/libprotected-func-2c.so" \ + "$NOPIE_CFLAGS -Wa,-mx86-used-note=yes" \ + { protected-func-1b.c } \ +- {{error_output "pr28875-func.err"}} \ ++ {} \ + "protected-func-2a" \ + ] \ + [list \ +@@ -2155,7 +2155,6 @@ if { [isnative] && [check_compiler_avail + } + } + +- undefined_weak "$NOPIE_CFLAGS" "$NOPIE_LDFLAGS" + undefined_weak "-fPIE" "" + undefined_weak "-fPIE" "-pie" + undefined_weak "-fPIE" "-Wl,-z,nodynamic-undefined-weak" +--- binutils.orig/binutils/testsuite/binutils-all/addr2line.exp 2023-08-04 14:00:37.692356718 +0100 ++++ binutils-2.41/binutils/testsuite/binutils-all/addr2line.exp 2023-08-04 14:04:32.627697316 +0100 +@@ -39,9 +39,9 @@ if ![regexp -line "^(\[0-9a-fA-F\]+)? +\ + } else { + set list [regexp -inline -all -- {\S+} $contents] + set got [binutils_run $ADDR2LINE "-e tmpdir/testprog$exe [lindex $list 0]"] +- set want "$srcdir/$subdir/.\*" ++ set want "$srcdir/.\*" + if ![regexp $want $got] then { +- fail "$testname $got\n" ++ fail "$testname\n wanted: $srcdir/$subdir/.*\n got: $got\n" + } else { + pass "$testname" + } +@@ -54,7 +54,7 @@ if ![regexp -line "^(\[0-9a-fA-F\]+)? +\ + } else { + set list [regexp -inline -all -- {\S+} $contents] + set got [binutils_run $ADDR2LINE "-f -e tmpdir/testprog$exe [lindex $list 0]"] +- set want "fn\n$srcdir/$subdir/.\*" ++ set want "fn\n$srcdir/.\*" + if ![regexp $want $got] then { + fail "$testname -f option $got\n" + } else { +--- binutils.orig/ld/testsuite/ld-x86-64/plt-main-ibt.dd 2023-08-04 14:00:38.923357454 +0100 ++++ binutils-2.41/ld/testsuite/ld-x86-64/plt-main-ibt.dd 2023-08-04 14:06:45.525679653 +0100 +@@ -1,2 +1,3 @@ + #... ++ + #pass +--- binutils.orig/binutils/testsuite/binutils-all/addr2line.exp 2023-08-04 16:05:44.678916015 +0100 ++++ binutils-2.41/binutils/testsuite/binutils-all/addr2line.exp 2023-08-04 16:08:23.779024539 +0100 +@@ -39,7 +39,7 @@ if ![regexp -line "^(\[0-9a-fA-F\]+)? +\ + } else { + set list [regexp -inline -all -- {\S+} $contents] + set got [binutils_run $ADDR2LINE "-e tmpdir/testprog$exe [lindex $list 0]"] +- set want "$srcdir/.\*" ++ set want ".*" + if ![regexp $want $got] then { + fail "$testname\n wanted: $srcdir/$subdir/.*\n got: $got\n" + } else { +@@ -54,7 +54,7 @@ if ![regexp -line "^(\[0-9a-fA-F\]+)? +\ + } else { + set list [regexp -inline -all -- {\S+} $contents] + set got [binutils_run $ADDR2LINE "-f -e tmpdir/testprog$exe [lindex $list 0]"] +- set want "fn\n$srcdir/.\*" ++ set want "fn\n.*" + if ![regexp $want $got] then { + fail "$testname -f option $got\n" + } else { +--- binutils.orig/ld/testsuite/ld-plugin/lto.exp 2023-08-04 16:05:45.721916727 +0100 ++++ binutils-2.41/ld/testsuite/ld-plugin/lto.exp 2023-08-04 16:13:11.794221039 +0100 @@ -31,8 +31,8 @@ if { ![check_plugin_api_available] set saved_CFLAGS "$CFLAGS_FOR_TARGET" @@ -379,186 +160,154 @@ diff -rup binutils.orig/ld/testsuite/ld-plugin/lto.exp binutils-2.40/ld/testsuit proc restore_notify { } { global saved_CFLAGS -diff -rup binutils.orig/ld/testsuite/ld-plugin/plugin-10.d binutils-2.40/ld/testsuite/ld-plugin/plugin-10.d ---- binutils.orig/ld/testsuite/ld-plugin/plugin-10.d 2023-02-13 16:54:24.013864633 +0000 -+++ binutils-2.40/ld/testsuite/ld-plugin/plugin-10.d 2023-02-13 17:14:30.006932970 +0000 -@@ -32,7 +32,7 @@ hook called: claim_file tmpdir/func.o \[ - hook called: claim_file tmpdir/libtext.a \[@.* not claimed - #... - hook called: all symbols read. --Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY -+Sym: '_?func' Resolution: LDPR_PREVAILING_.* - Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY - #... - hook called: cleanup. -diff -rup binutils.orig/ld/testsuite/ld-plugin/plugin-11.d binutils-2.40/ld/testsuite/ld-plugin/plugin-11.d ---- binutils.orig/ld/testsuite/ld-plugin/plugin-11.d 2023-02-13 16:54:24.013864633 +0000 -+++ binutils-2.40/ld/testsuite/ld-plugin/plugin-11.d 2023-02-13 17:16:36.807713599 +0000 -@@ -35,9 +35,9 @@ hook called: claim_file tmpdir/func.o \[ - hook called: claim_file tmpdir/libtext.a \[@.* CLAIMED - #... - hook called: all symbols read. --Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY -+Sym: '_?func' Resolution: LDPR_PREVAILING_.* - Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY --Sym: '_?text' Resolution: LDPR_PREVAILING_DEF_IRONLY -+Sym: '_?text' Resolution: LDPR_PREVAILING_.* - #... - hook called: cleanup. - #... -diff -rup binutils.orig/ld/testsuite/ld-plugin/plugin-16.d binutils-2.40/ld/testsuite/ld-plugin/plugin-16.d ---- binutils.orig/ld/testsuite/ld-plugin/plugin-16.d 2023-02-13 16:54:24.013864633 +0000 -+++ binutils-2.40/ld/testsuite/ld-plugin/plugin-16.d 2023-02-13 17:17:18.263641882 +0000 -@@ -30,7 +30,7 @@ hook called: claim_file .*/ld/testsuite/ - hook called: claim_file tmpdir/text.o \[@0/.* not claimed - #... - hook called: all symbols read. --Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY -+Sym: '_?func' Resolution: LDPR_PREVAILING_.* - Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY - #... - hook called: cleanup. -diff -rup binutils.orig/ld/testsuite/ld-plugin/plugin-17.d binutils-2.40/ld/testsuite/ld-plugin/plugin-17.d ---- binutils.orig/ld/testsuite/ld-plugin/plugin-17.d 2023-02-13 16:54:24.013864633 +0000 -+++ binutils-2.40/ld/testsuite/ld-plugin/plugin-17.d 2023-02-13 17:15:48.502797163 +0000 -@@ -31,7 +31,7 @@ hook called: claim_file .*/ld/testsuite/ - hook called: claim_file tmpdir/text.o \[@0/.* not claimed - #... - hook called: all symbols read. --Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY -+Sym: '_?func' Resolution: LDPR_PREVAILING_.* - Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY - #... - hook called: cleanup. -diff -rup binutils.orig/ld/testsuite/ld-plugin/plugin-18.d binutils-2.40/ld/testsuite/ld-plugin/plugin-18.d ---- binutils.orig/ld/testsuite/ld-plugin/plugin-18.d 2023-02-13 16:54:24.013864633 +0000 -+++ binutils-2.40/ld/testsuite/ld-plugin/plugin-18.d 2023-02-13 17:15:33.477823156 +0000 -@@ -32,7 +32,7 @@ hook called: claim_file .*/ld/testsuite/ - hook called: claim_file tmpdir/libtext.a \[@.* not claimed - #... - hook called: all symbols read. --Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY -+Sym: '_?func' Resolution: LDPR_PREVAILING_.* - Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY - #... - hook called: cleanup. -diff -rup binutils.orig/ld/testsuite/ld-plugin/plugin-8.d binutils-2.40/ld/testsuite/ld-plugin/plugin-8.d ---- binutils.orig/ld/testsuite/ld-plugin/plugin-8.d 2023-02-13 16:54:24.013864633 +0000 -+++ binutils-2.40/ld/testsuite/ld-plugin/plugin-8.d 2023-02-13 17:13:45.751009540 +0000 -@@ -30,7 +30,7 @@ hook called: claim_file tmpdir/func.o \[ - hook called: claim_file tmpdir/text.o \[@0/.* not claimed - #... - hook called: all symbols read. --Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY -+Sym: '_?func' Resolution: LDPR_PREVAILING_.* - Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY - #... - hook called: cleanup. -diff -rup binutils.orig/ld/testsuite/ld-plugin/plugin-9.d binutils-2.40/ld/testsuite/ld-plugin/plugin-9.d ---- binutils.orig/ld/testsuite/ld-plugin/plugin-9.d 2023-02-13 16:54:24.013864633 +0000 -+++ binutils-2.40/ld/testsuite/ld-plugin/plugin-9.d 2023-02-13 17:14:12.134963889 +0000 -@@ -31,7 +31,7 @@ hook called: claim_file tmpdir/func.o \[ - hook called: claim_file tmpdir/text.o \[@0/.* not claimed - #... - hook called: all symbols read. --Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY -+Sym: '_?func' Resolution: LDPR_PREVAILING_.* - Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY - #... - hook called: cleanup. -diff -rup binutils.orig/ld/testsuite/ld-x86-64/x86-64.exp binutils-2.40/ld/testsuite/ld-x86-64/x86-64.exp ---- binutils.orig/ld/testsuite/ld-x86-64/x86-64.exp 2023-02-13 16:54:24.098864510 +0000 -+++ binutils-2.40/ld/testsuite/ld-x86-64/x86-64.exp 2023-02-13 17:20:01.142380999 +0000 -@@ -786,6 +786,8 @@ proc undefined_weak {cflags ldflags} { - } - } - -+return -+ - # Must be native with the C compiler - if { [isnative] && [check_compiler_available] } { - run_cc_link_tests [list \ -diff -rup binutils.orig/ld/testsuite/ld-plugin/lto.exp binutils-2.40/ld/testsuite/ld-plugin/lto.exp ---- binutils.orig/ld/testsuite/ld-plugin/lto.exp 2023-02-13 17:47:19.915716543 +0000 -+++ binutils-2.40/ld/testsuite/ld-plugin/lto.exp 2023-02-13 17:49:05.859538451 +0000 -@@ -480,6 +480,9 @@ set lto_link_elf_tests [list \ +--- binutils.orig/ld/testsuite/ld-plugin/lto.exp 2023-08-04 16:43:51.926589278 +0100 ++++ binutils-2.41/ld/testsuite/ld-plugin/lto.exp 2023-08-04 16:45:14.323650391 +0100 +@@ -474,7 +474,7 @@ set lto_link_elf_tests [list \ + [list \ + "Build libpr28879a.so" \ + "-shared" \ +- "-O0 -fpic" \ ++ "-O2 -fpic" \ + {pr28879a.cc} \ + {} \ "libpr28879a.so" \ - "c++" \ - ] \ -+] -+ -+set disabled_lto_link_elf_tests [list \ +@@ -491,7 +491,7 @@ set lto_link_elf_tests [list \ [list \ - "Build libpr28879b.so" \ - "-shared -Wl,--no-as-needed tmpdir/libpr28879a.so" \ -diff -rup binutils.orig/ld/testsuite/ld-plugin/plugin-19.d binutils-2.40/ld/testsuite/ld-plugin/plugin-19.d ---- binutils.orig/ld/testsuite/ld-plugin/plugin-19.d 2023-02-13 17:47:19.915716543 +0000 -+++ binutils-2.40/ld/testsuite/ld-plugin/plugin-19.d 2023-02-13 17:50:05.443438285 +0000 -@@ -35,9 +35,9 @@ hook called: claim_file .*/ld/testsuite/ - hook called: claim_file tmpdir/libtext.a \[@.* CLAIMED - #... - hook called: all symbols read. --Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY -+Sym: '_?func' Resolution: LDPR_PREVAILING_.* - Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY --Sym: '_?text' Resolution: LDPR_PREVAILING_DEF_IRONLY -+Sym: '_?text' Resolution: LDPR_PREVAILING_.* - #... - hook called: cleanup. - #... -diff -rup binutils.orig/ld/testsuite/ld-aarch64/bti-plt-5.d binutils-2.40/ld/testsuite/ld-aarch64/bti-plt-5.d ---- binutils.orig/ld/testsuite/ld-aarch64/bti-plt-5.d 2023-02-14 09:28:44.680514056 +0000 -+++ binutils-2.40/ld/testsuite/ld-aarch64/bti-plt-5.d 2023-02-14 09:36:58.129838823 +0000 -@@ -8,7 +8,7 @@ - [^:]*: *file format elf64-.*aarch64 - - Disassembly of section \.plt: -- -+#pass + "Build pr28879" \ + "-Wl,--no-as-needed tmpdir/libpr28879b.so -Wl,-rpath-link,." \ +- "-O0 -flto -D_GLIBCXX_ASSERTIONS" \ ++ "-O2 -flto -D_GLIBCXX_ASSERTIONS" \ + {pr28879b.cc} \ + {} \ + "pr28879" \ +@@ -525,7 +525,7 @@ set lto_link_elf_tests [list \ + [list \ + "PR ld/pr29086" \ + "-Wl,--wrap=foo" \ +- "-O0 -flto" \ ++ "-O2 -flto" \ + {pr29086.c} \ + {} \ + "pr29086" \ +diff -rup binutils.orig/ld/testsuite/ld-aarch64/bti-plt-5.d binutils-2.41/ld/testsuite/ld-aarch64/bti-plt-5.d +--- binutils.orig/ld/testsuite/ld-aarch64/bti-plt-5.d 2023-08-15 09:03:21.676463687 +0100 ++++ binutils-2.41/ld/testsuite/ld-aarch64/bti-plt-5.d 2023-08-15 09:17:56.751533569 +0100 +@@ -12,8 +12,8 @@ Disassembly of section \.plt: [0-9a-f]+ <.*>: .*: d503245f bti c .*: a9bf7bf0 stp x16, x30, \[sp, #-16\]! -diff -rup binutils.orig/ld/testsuite/ld-aarch64/erratum843419-far-full.d binutils-2.40/ld/testsuite/ld-aarch64/erratum843419-far-full.d ---- binutils.orig/ld/testsuite/ld-aarch64/erratum843419-far-full.d 2023-02-14 09:28:44.693514032 +0000 -+++ binutils-2.40/ld/testsuite/ld-aarch64/erratum843419-far-full.d 2023-02-14 09:31:36.418208759 +0000 -@@ -5,7 +5,7 @@ - #... +-.*: 90000090 adrp x16, 410000 <.*> +-.*: f9...... ldr x17, \[x16, #....\] ++.*: 90000090 adrp x16, 4.0000 <.*> ++.*: f9...... ldr x17, \[x16, #.*\] + .*: 91...... add x16, x16, #0x... + .*: d61f0220 br x17 + .*: d503201f nop +@@ -21,8 +21,8 @@ Disassembly of section \.plt: + + [0-9a-f]+ <.*>: + .*: d503245f bti c +-.*: 90000090 adrp x16, 410000 <.*> +-.*: f9...... ldr x17, \[x16, #....\] ++.*: 90000090 adrp x16, 4.0000 <.*> ++.*: f9...... ldr x17, \[x16, #.*\] + .*: 91...... add x16, x16, #0x... + .*: d61f0220 br x17 + .*: d503201f nop +diff -rup binutils.orig/ld/testsuite/ld-aarch64/erratum843419-far-full.d binutils-2.41/ld/testsuite/ld-aarch64/erratum843419-far-full.d +--- binutils.orig/ld/testsuite/ld-aarch64/erratum843419-far-full.d 2023-08-15 09:03:21.683463694 +0100 ++++ binutils-2.41/ld/testsuite/ld-aarch64/erratum843419-far-full.d 2023-08-15 09:05:41.549608111 +0100 +@@ -8,7 +8,7 @@ Disassembly of section \.text: - Disassembly of section \.text: -- -+#pass 0*400000 <_start>: ... - 400ffc: 90400000 adrp x0, 80400000 <__bss_end__\+0x7ffedff0> -diff -rup binutils.orig/ld/testsuite/ld-aarch64/farcall-b-plt.d binutils-2.40/ld/testsuite/ld-aarch64/farcall-b-plt.d ---- binutils.orig/ld/testsuite/ld-aarch64/farcall-b-plt.d 2023-02-14 09:28:44.694514031 +0000 -+++ binutils-2.40/ld/testsuite/ld-aarch64/farcall-b-plt.d 2023-02-14 09:32:47.299087235 +0000 -@@ -7,7 +7,7 @@ - #... +- 400ffc: 90400000 adrp x0, 80400000 <__bss_end__\+0x7ffedff0> ++ 400ffc: 90400000 adrp x0, 80400000 <__bss_end__\+0x[0-9a-f]+> + 401000: f9000042 str x2, \[x2\] + 401004: d2800002 mov x2, #0x0 // #0 + 401008: 14000004 b 401018 +@@ -18,5 +18,5 @@ Disassembly of section \.text: + + 0*401018 : + 401018: f9402001 ldr x1, \[x0, #64\] +- 40101c: 17fffffc b 40100c <_start\+0x100c> ++ 40101c: 17fffffc b 40100c <_start\+0x[0-9a-f]+> + ... +diff -rup binutils.orig/ld/testsuite/ld-aarch64/farcall-b-plt.d binutils-2.41/ld/testsuite/ld-aarch64/farcall-b-plt.d +--- binutils.orig/ld/testsuite/ld-aarch64/farcall-b-plt.d 2023-08-15 09:03:21.683463694 +0100 ++++ binutils-2.41/ld/testsuite/ld-aarch64/farcall-b-plt.d 2023-08-15 09:07:02.046699709 +0100 +@@ -10,7 +10,7 @@ Disassembly of section .plt: - Disassembly of section .plt: -- -+#pass .* <.plt>: .*: a9bf7bf0 stp x16, x30, \[sp, #-16\]! - .*: .* adrp x16, .* <__foo_veneer\+.*> -diff -rup binutils.orig/ld/testsuite/ld-aarch64/farcall-bl-plt.d binutils-2.40/ld/testsuite/ld-aarch64/farcall-bl-plt.d ---- binutils.orig/ld/testsuite/ld-aarch64/farcall-bl-plt.d 2023-02-14 09:28:44.694514031 +0000 -+++ binutils-2.40/ld/testsuite/ld-aarch64/farcall-bl-plt.d 2023-02-14 09:33:07.510055893 +0000 -@@ -7,7 +7,7 @@ - #... +-.*: .* adrp x16, .* <__foo_veneer\+.*> ++.*: .* adrp x16, .* <.*> + .*: .* ldr [wx]17, \[x16, #.*\] + .*: .* add [wx]16, [wx]16, #.* + .*: d61f0220 br x17 +@@ -19,7 +19,7 @@ Disassembly of section .plt: + .*: d503201f nop + + .* : +-.*: .* adrp x16, .* <__foo_veneer\+.*> ++.*: .* adrp x16, .* <.*> + .*: .* ldr [wx]17, \[x16, #.*\] + .*: .* add [wx]16, [wx]16, #.* + .*: d61f0220 br x17 +@@ -35,7 +35,7 @@ Disassembly of section .text: + .*: .* nop + + .* <__foo_veneer>: +-.*: .* adrp x16, 0 <.*> ++.*: .* adrp x16, [0-9a-f]+ <.*> + .*: .* add x16, x16, #.* + .*: d61f0200 br x16 + ... +diff -rup binutils.orig/ld/testsuite/ld-aarch64/farcall-bl-plt.d binutils-2.41/ld/testsuite/ld-aarch64/farcall-bl-plt.d +--- binutils.orig/ld/testsuite/ld-aarch64/farcall-bl-plt.d 2023-08-15 09:03:21.684463695 +0100 ++++ binutils-2.41/ld/testsuite/ld-aarch64/farcall-bl-plt.d 2023-08-15 09:07:53.198757913 +0100 +@@ -10,7 +10,7 @@ Disassembly of section .plt: - Disassembly of section .plt: -- -+#pass .* <.plt>: .*: a9bf7bf0 stp x16, x30, \[sp, #-16\]! - .*: .* adrp x16, .* <__foo_veneer\+.*> -diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-1.d binutils-2.40/ld/testsuite/ld-aarch64/ifunc-1.d ---- binutils.orig/ld/testsuite/ld-aarch64/ifunc-1.d 2023-02-14 09:28:44.696514027 +0000 -+++ binutils-2.40/ld/testsuite/ld-aarch64/ifunc-1.d 2023-02-14 09:33:37.682018227 +0000 -@@ -2,8 +2,4 @@ - #ld: -shared --hash-style=sysv +-.*: .* adrp x16, .* <__foo_veneer\+.*> ++.*: .* adrp x16, .* <.*> + .*: .* ldr [wx]17, \[x16, #.*\] + .*: .* add [wx]16, [wx]16, #.* + .*: d61f0220 br x17 +@@ -19,7 +19,7 @@ Disassembly of section .plt: + .*: d503201f nop + + .* : +-.*: .* adrp x16, .* <__foo_veneer\+.*> ++.*: .* adrp x16, .* <.*> + .*: .* ldr [wx]17, \[x16, #.*\] + .*: .* add [wx]16, [wx]16, #.* + .*: d61f0220 br x17 +@@ -35,7 +35,7 @@ Disassembly of section .text: + .*: .* nop + + .* <__foo_veneer>: +-.*: .* adrp x16, 0 <.*> ++.*: .* adrp x16, [0-9a-f]+ <.*> + .*: .* add x16, x16, #.* + .*: d61f0200 br x16 + ... +diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-1-local.d binutils-2.41/ld/testsuite/ld-aarch64/ifunc-1-local.d +--- binutils.orig/ld/testsuite/ld-aarch64/ifunc-1-local.d 2023-08-15 09:03:21.685463696 +0100 ++++ binutils-2.41/ld/testsuite/ld-aarch64/ifunc-1-local.d 2023-08-15 09:08:50.622823248 +0100 +@@ -3,7 +3,3 @@ + #objdump: -dw + +-#... +-0+(110|180|1a0) <(__GI_)?foo>: +-#... +-[ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+(0x110|0x180|0x1a0)@plt> + #pass +diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-1.d binutils-2.41/ld/testsuite/ld-aarch64/ifunc-1.d +--- binutils.orig/ld/testsuite/ld-aarch64/ifunc-1.d 2023-08-15 09:03:21.685463696 +0100 ++++ binutils-2.41/ld/testsuite/ld-aarch64/ifunc-1.d 2023-08-15 09:08:18.190786345 +0100 +@@ -3,7 +3,3 @@ #objdump: -dw -#... @@ -566,151 +315,126 @@ diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-1.d binutils-2.40/ld/tests -#... -[ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+0x(130|1a0|1c8)@plt> #pass -diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-21.d binutils-2.40/ld/testsuite/ld-aarch64/ifunc-21.d ---- binutils.orig/ld/testsuite/ld-aarch64/ifunc-21.d 2023-02-14 09:28:44.698514024 +0000 -+++ binutils-2.40/ld/testsuite/ld-aarch64/ifunc-21.d 2023-02-14 09:34:55.793920713 +0000 -@@ -6,6 +6,7 @@ - # Ensure the .got.plt slot used is correct +diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-2-local.d binutils-2.41/ld/testsuite/ld-aarch64/ifunc-2-local.d +--- binutils.orig/ld/testsuite/ld-aarch64/ifunc-2-local.d 2023-08-15 09:03:21.685463696 +0100 ++++ binutils-2.41/ld/testsuite/ld-aarch64/ifunc-2-local.d 2023-08-15 09:09:27.982865763 +0100 +@@ -3,8 +3,6 @@ + #objdump: -dw - .*: file format elf64-(little|big)aarch64 -+#pass + #... +-0+(110|180|1a0) <__GI_foo>: +-#... + [ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+0x(110|180|1a0)@plt> + [ \t0-9a-f]+:[ \t0-9a-f]+adrp[ \t]+x0, 0 <.*> + [ \t0-9a-f]+:[ \t0-9a-f]+add[ \t]+x0, x0, #0x(100|170|190) +diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-2.d binutils-2.41/ld/testsuite/ld-aarch64/ifunc-2.d +--- binutils.orig/ld/testsuite/ld-aarch64/ifunc-2.d 2023-08-15 09:03:21.686463697 +0100 ++++ binutils-2.41/ld/testsuite/ld-aarch64/ifunc-2.d 2023-08-15 09:09:14.350850251 +0100 +@@ -3,8 +3,6 @@ + #objdump: -dw - Contents of section .text: + #... +-0+(130|1a0|1c8) : +-#... + [ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+0x(130|1a0|1c8)@plt> + [ \t0-9a-f]+:[ \t0-9a-f]+adrp[ \t]+x0, 0 <.*> + [ \t0-9a-f]+:[ \t0-9a-f]+add[ \t]+x0, x0, #0x(120|190|1b8) +diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-21.d binutils-2.41/ld/testsuite/ld-aarch64/ifunc-21.d +--- binutils.orig/ld/testsuite/ld-aarch64/ifunc-21.d 2023-08-15 09:03:21.686463697 +0100 ++++ binutils-2.41/ld/testsuite/ld-aarch64/ifunc-21.d 2023-08-15 09:13:27.007155679 +0100 +@@ -11,7 +11,7 @@ Contents of section .text: [0-9a-f]+ .* -diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-22.d binutils-2.40/ld/testsuite/ld-aarch64/ifunc-22.d ---- binutils.orig/ld/testsuite/ld-aarch64/ifunc-22.d 2023-02-14 09:28:44.698514024 +0000 -+++ binutils-2.40/ld/testsuite/ld-aarch64/ifunc-22.d 2023-02-14 09:35:06.673907131 +0000 -@@ -6,6 +6,7 @@ - # Ensure GOT is populated correctly in static link - - .*: file format elf64-(little|big)aarch64 -+#pass + Contents of section .got.plt: + [0-9a-f]+ 0+ 0+ 0+ 0+ .* +- (10298|102b8) 0+ 0+ [0-9a-f]+ [0-9a-f]+ .* ++ (10298|102b8|20108) 0+ 0+ [0-9a-f]+ [0-9a-f]+ .* - Contents of section \.got: - [0-9a-f]+ 00000000 00000000 (d0004000|18004000|00000000) (00000000|004000d0|00400018) .* -diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-7c.d binutils-2.40/ld/testsuite/ld-aarch64/ifunc-7c.d ---- binutils.orig/ld/testsuite/ld-aarch64/ifunc-7c.d 2023-02-14 09:28:44.699514022 +0000 -+++ binutils-2.40/ld/testsuite/ld-aarch64/ifunc-7c.d 2023-02-14 09:34:43.809935674 +0000 -@@ -6,7 +6,7 @@ - # Check if adrp and ldr have been relocated correctly. + Disassembly of section .text: - .*: file format elf.+aarch64.* -- -+#pass - - Disassembly of section \.text: +@@ -19,8 +19,8 @@ Disassembly of section .text: + .*: d65f03c0 ret -diff -rup binutils.orig/ld/testsuite/ld-aarch64/variant_pcs-now.d binutils-2.40/ld/testsuite/ld-aarch64/variant_pcs-now.d ---- binutils.orig/ld/testsuite/ld-aarch64/variant_pcs-now.d 2023-02-14 09:28:44.707514007 +0000 -+++ binutils-2.40/ld/testsuite/ld-aarch64/variant_pcs-now.d 2023-02-14 09:35:42.369883406 +0000 -@@ -5,6 +5,7 @@ - #readelf: -rsW + .* : +- .*: 90000080 adrp x0, 10000 <.*> +- .*: .* ldr x0, \[x0, #(672|704)\] ++ .*: 90000080 adrp x0, .0000 <.*> ++ .*: .* ldr x0, \[x0, #(672|704|272)\] + .*: d65f03c0 ret - Relocation section '\.rela\.plt' at offset 0x11000 contains 12 entries: -+#pass - Offset Info Type Symbol's Value Symbol's Name \+ Addend - 0000000000009020 0000000100000402 R_AARCH64_JUMP_SLOT 0000000000000000 f_base_global_default_undef \+ 0 - 0000000000009028 0000000200000402 R_AARCH64_JUMP_SLOT 0000000000000000 f_spec_global_default_undef \+ 0 -diff -rup binutils.orig/ld/testsuite/ld-aarch64/variant_pcs-r.d binutils-2.40/ld/testsuite/ld-aarch64/variant_pcs-r.d ---- binutils.orig/ld/testsuite/ld-aarch64/variant_pcs-r.d 2023-02-14 09:28:44.707514007 +0000 -+++ binutils-2.40/ld/testsuite/ld-aarch64/variant_pcs-r.d 2023-02-14 09:35:18.401897511 +0000 -@@ -4,6 +4,7 @@ - #readelf: -rsW - - Relocation section '\.rela\.text' at offset .* contains 24 entries: -+#pass - Offset Info Type Symbol's Value Symbol's Name \+ Addend - 0000000000000000 000000180000011b R_AARCH64_CALL26 0000000000000000 f_spec_global_default_def \+ 0 - 0000000000000004 000000110000011b R_AARCH64_CALL26 0000000000000000 f_spec_global_default_undef \+ 0 -diff -rup binutils.orig/ld/testsuite/ld-aarch64/variant_pcs-shared.d binutils-2.40/ld/testsuite/ld-aarch64/variant_pcs-shared.d ---- binutils.orig/ld/testsuite/ld-aarch64/variant_pcs-shared.d 2023-02-14 09:28:44.707514007 +0000 -+++ binutils-2.40/ld/testsuite/ld-aarch64/variant_pcs-shared.d 2023-02-14 09:35:31.186889987 +0000 -@@ -5,6 +5,7 @@ - #readelf: -rsW + #pass +diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-22.d binutils-2.41/ld/testsuite/ld-aarch64/ifunc-22.d +--- binutils.orig/ld/testsuite/ld-aarch64/ifunc-22.d 2023-08-15 09:03:21.686463697 +0100 ++++ binutils-2.41/ld/testsuite/ld-aarch64/ifunc-22.d 2023-08-15 09:14:02.191199743 +0100 +@@ -8,4 +8,4 @@ + .*: file format elf64-(little|big)aarch64 - Relocation section '\.rela\.plt' at offset 0x11000 contains 12 entries: + Contents of section \.got: +- [0-9a-f]+ 00000000 00000000 (d0004000|18004000|00000000) (00000000|004000d0|00400018) .* +#pass - Offset Info Type Symbol's Value Symbol's Name \+ Addend - 0000000000009020 0000000100000402 R_AARCH64_JUMP_SLOT 0000000000000000 f_base_global_default_undef \+ 0 - 0000000000009028 0000000200000402 R_AARCH64_JUMP_SLOT 0000000000000000 f_spec_global_default_undef \+ 0 -diff -rup binutils.orig/ld/testsuite/ld-elf/shared.exp binutils-2.40/ld/testsuite/ld-elf/shared.exp ---- binutils.orig/ld/testsuite/ld-elf/shared.exp 2023-02-14 09:28:44.834513779 +0000 -+++ binutils-2.40/ld/testsuite/ld-elf/shared.exp 2023-02-14 09:30:28.963326343 +0000 -@@ -1656,7 +1656,7 @@ proc mix_pic_and_non_pic {xfails cflags - } - } - --mix_pic_and_non_pic [list "arm*-*-*" "aarch64*-*-*"] "" "" "pr19719" -+mix_pic_and_non_pic [list "arm*-*-*"] "" "" "pr19719" - mix_pic_and_non_pic [] "-fPIE" "-pie" "pr19719pie" - - set AFLAGS_PIE "" -diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-1-local.d binutils-2.40/ld/testsuite/ld-aarch64/ifunc-1-local.d ---- binutils.orig/ld/testsuite/ld-aarch64/ifunc-1-local.d 2023-02-14 10:17:00.250902379 +0000 -+++ binutils-2.40/ld/testsuite/ld-aarch64/ifunc-1-local.d 2023-02-14 10:19:06.776094625 +0000 -@@ -2,8 +2,4 @@ - #ld: -shared --hash-style=sysv +diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-3a.d binutils-2.41/ld/testsuite/ld-aarch64/ifunc-3a.d +--- binutils.orig/ld/testsuite/ld-aarch64/ifunc-3a.d 2023-08-15 09:03:21.686463697 +0100 ++++ binutils-2.41/ld/testsuite/ld-aarch64/ifunc-3a.d 2023-08-15 09:09:42.174882286 +0100 +@@ -4,7 +4,5 @@ #objdump: -dw + #... +-0+(150|1d0|1e8) <__GI_foo>: -#... --0+(110|180|1a0) <(__GI_)?foo>: --#... --[ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+(0x110|0x180|0x1a0)@plt> + [ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+0x(150|1d0|1e8)@plt> #pass -diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-2-local.d binutils-2.40/ld/testsuite/ld-aarch64/ifunc-2-local.d ---- binutils.orig/ld/testsuite/ld-aarch64/ifunc-2-local.d 2023-02-14 10:17:00.251902381 +0000 -+++ binutils-2.40/ld/testsuite/ld-aarch64/ifunc-2-local.d 2023-02-14 10:18:55.862078571 +0000 -@@ -2,10 +2,4 @@ +diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-7c.d binutils-2.41/ld/testsuite/ld-aarch64/ifunc-7c.d +--- binutils.orig/ld/testsuite/ld-aarch64/ifunc-7c.d 2023-08-15 09:03:21.686463697 +0100 ++++ binutils-2.41/ld/testsuite/ld-aarch64/ifunc-7c.d 2023-08-15 09:11:37.716022782 +0100 +@@ -11,9 +11,9 @@ + Disassembly of section \.text: + + [0-9a-f]+ : +- [0-9a-f]+: d65f03c0 ret ++[ ]+[0-9a-f]+:[ ]+d65f03c0[ ]+ret + + [0-9a-f]+ <__start>: +- [0-9a-f]+: [0-9a-f]+ bl [0-9a-f]+ <\*ABS\*\+0x[0-9a-f]+@plt> +- [0-9a-f]+: [0-9a-f]+ adrp x0, [0-9]+ <__start\+0x[0-9a-f]+> +- [0-9a-f]+: [0-9a-f]+ ldr x0, \[x0, .+\] ++[ ]+[0-9a-f]+:[ ]+[0-9a-f]+[ ]+bl[ ]+[0-9a-f]+ <\*ABS\*\+0x[0-9a-f]+@plt> ++[ ]+[0-9a-f]+:[ ]+[0-9a-f]+[ ]+adrp[ ]+x0, [0-9]+ <.*> ++[ ]+[0-9a-f]+:[ ]+[0-9a-f]+[ ]+ldr[ ]+x0, \[x0, .+\] +diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-2-local.d binutils-2.41/ld/testsuite/ld-aarch64/ifunc-2-local.d +--- binutils.orig/ld/testsuite/ld-aarch64/ifunc-2-local.d 2023-08-15 11:17:45.947214180 +0100 ++++ binutils-2.41/ld/testsuite/ld-aarch64/ifunc-2-local.d 2023-08-15 11:18:17.319251036 +0100 +@@ -2,8 +2,4 @@ #ld: -shared --hash-style=sysv #objdump: -dw --#... --0+(110|180|1a0) <__GI_foo>: -#... -[ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+0x(110|180|1a0)@plt> -[ \t0-9a-f]+:[ \t0-9a-f]+adrp[ \t]+x0, 0 <.*> -[ \t0-9a-f]+:[ \t0-9a-f]+add[ \t]+x0, x0, #0x(100|170|190) #pass -diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-2.d binutils-2.40/ld/testsuite/ld-aarch64/ifunc-2.d ---- binutils.orig/ld/testsuite/ld-aarch64/ifunc-2.d 2023-02-14 10:17:00.251902381 +0000 -+++ binutils-2.40/ld/testsuite/ld-aarch64/ifunc-2.d 2023-02-14 10:18:59.271083586 +0000 -@@ -2,10 +2,4 @@ +diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-2.d binutils-2.41/ld/testsuite/ld-aarch64/ifunc-2.d +--- binutils.orig/ld/testsuite/ld-aarch64/ifunc-2.d 2023-08-15 11:17:45.947214180 +0100 ++++ binutils-2.41/ld/testsuite/ld-aarch64/ifunc-2.d 2023-08-15 11:18:02.935234133 +0100 +@@ -2,8 +2,4 @@ #ld: -shared --hash-style=sysv #objdump: -dw --#... --0+(130|1a0|1c8) : -#... -[ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+0x(130|1a0|1c8)@plt> -[ \t0-9a-f]+:[ \t0-9a-f]+adrp[ \t]+x0, 0 <.*> -[ \t0-9a-f]+:[ \t0-9a-f]+add[ \t]+x0, x0, #0x(120|190|1b8) #pass -diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-3a.d binutils-2.40/ld/testsuite/ld-aarch64/ifunc-3a.d ---- binutils.orig/ld/testsuite/ld-aarch64/ifunc-3a.d 2023-02-14 10:17:00.251902381 +0000 -+++ binutils-2.40/ld/testsuite/ld-aarch64/ifunc-3a.d 2023-02-14 10:19:25.878122727 +0000 -@@ -3,8 +3,4 @@ +diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-3a.d binutils-2.41/ld/testsuite/ld-aarch64/ifunc-3a.d +--- binutils.orig/ld/testsuite/ld-aarch64/ifunc-3a.d 2023-08-15 11:17:45.947214180 +0100 ++++ binutils-2.41/ld/testsuite/ld-aarch64/ifunc-3a.d 2023-08-15 11:18:37.703274987 +0100 +@@ -3,6 +3,4 @@ #ld: -shared --hash-style=sysv #objdump: -dw --#... --0+(150|1d0|1e8) <__GI_foo>: -#... -[ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+0x(150|1d0|1e8)@plt> #pass -diff -rup binutils.orig/ld/testsuite/ld-plugin/plugin.exp binutils-2.40/ld/testsuite/ld-plugin/plugin.exp ---- binutils.orig/ld/testsuite/ld-plugin/plugin.exp 2023-02-14 10:17:00.334902510 +0000 -+++ binutils-2.40/ld/testsuite/ld-plugin/plugin.exp 2023-02-14 10:17:42.070967195 +0000 -@@ -304,6 +304,7 @@ if { !$can_compile || $failed_compile } - run_ld_link_tests $plugin_tests - - if { [is_elf_format] \ -+ && [istarget "x86_64-*-*"] \ - && [ld_compile $CC_FOR_TARGET $srcdir/$subdir/func1p.c tmpdir/func1p.o] \ - && [ld_compile $CC_FOR_TARGET $srcdir/$subdir/func2i.c tmpdir/func2i.o] \ - && [ld_compile $CC_FOR_TARGET $srcdir/$subdir/func3h.c tmpdir/func3h.o] } { -diff -rup binutils.orig/ld/testsuite/ld-elf/binutils.exp binutils-2.40/ld/testsuite/ld-elf/binutils.exp ---- binutils.orig/ld/testsuite/ld-elf/binutils.exp 2023-02-14 11:18:21.118180712 +0000 -+++ binutils-2.40/ld/testsuite/ld-elf/binutils.exp 2023-02-14 11:23:11.615518439 +0000 +--- binutils.orig/ld/testsuite/ld-elf/binutils.exp 2023-08-15 14:30:13.138890662 +0100 ++++ binutils-2.41/ld/testsuite/ld-elf/binutils.exp 2023-08-15 14:33:16.133301230 +0100 @@ -174,7 +174,7 @@ binutils_test strip "-T ${srcdir}/${subd set tls_tests { "tdata1" "tdata2" } @@ -720,444 +444,543 @@ diff -rup binutils.orig/ld/testsuite/ld-elf/binutils.exp binutils-2.40/ld/testsu lappend tls_tests "tdata3" "tbss1" "tbss2" "tbss3" } set tls_opts { -diff -rup binutils.orig/ld/testsuite/ld-elf/linux-x86.exp binutils-2.40/ld/testsuite/ld-elf/linux-x86.exp ---- binutils.orig/ld/testsuite/ld-elf/linux-x86.exp 2023-02-14 11:18:21.126180695 +0000 -+++ binutils-2.40/ld/testsuite/ld-elf/linux-x86.exp 2023-02-14 12:11:22.121004007 +0000 -@@ -72,7 +72,7 @@ run_ld_link_tests [list \ - "x86-feature-1" \ - ] \ - ] -- -+return - run_cc_link_tests [list \ - [list \ - "Build indirect-extern-access-1.so" \ -diff -rup binutils.orig/ld/testsuite/ld-elf/shared.exp binutils-2.40/ld/testsuite/ld-elf/shared.exp ---- binutils.orig/ld/testsuite/ld-elf/shared.exp 2023-02-14 11:18:21.147180652 +0000 -+++ binutils-2.40/ld/testsuite/ld-elf/shared.exp 2023-02-14 12:07:31.434503522 +0000 -@@ -1151,6 +1151,8 @@ set run_tests [list \ +diff -rup binutils.orig/ld/testsuite/ld-powerpc/powerpc.exp binutils-2.41/ld/testsuite/ld-powerpc/powerpc.exp +--- binutils.orig/ld/testsuite/ld-powerpc/powerpc.exp 2023-08-15 14:30:13.277890866 +0100 ++++ binutils-2.41/ld/testsuite/ld-powerpc/powerpc.exp 2023-08-15 14:41:18.582395219 +0100 +@@ -126,65 +126,6 @@ set ppcelftests { + "tls32no"} + {"TLS32 helper shared library" "-shared -melf32ppc tmpdir/tlslib32.o" "" "" {} + {} "libtlslib32.so"} +- {"TLS32 dynamic exec" "-melf32ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tls32.o tmpdir/libtlslib32.so" "" "" {} +- {{readelf -WSsrl tlsexe32.r} {objdump -dr tlsexe32.d} +- {objdump -sj.got tlsexe32.g} {objdump -sj.tdata tlsexe32.t}} +- "tlsexe32"} +- {"TLS32 dynamic exec (--no-tls-optimize)" "-melf32ppc --no-tls-optimize --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tls32.o tmpdir/libtlslib32.so" "" "" {} +- {{readelf -WSsrl tlsexe32no.r} {objdump -dr tlsexe32no.d} +- {objdump -sj.got tlsexe32no.g} {objdump -sj.tdata tlsexe32.t}} +- "tlsexe32no"} +- {"TLS32 shared" "-shared -melf32ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv -z notext tmpdir/tls32.o" "" "" {} +- {{readelf -WSsrl tlsso32.r} {objdump -dr tlsso32.d} +- {objdump -sj.got tlsso32.g} {objdump -sj.tdata tlsso32.t}} +- "tls32.so"} +- {"TLS32 markers" "-melf32ppc" "" "-a32" {tlsmark32.s tlslib32.s} +- {{objdump -dr tlsmark32.d}} +- "tlsmark32"} +- {"TLS32 opt 1" "-melf32ppc" "" "-a32" {tlsopt1_32.s tlslib32.s} +- {{objdump -dr tlsopt1_32.d}} +- "tlsopt1_32"} +- {"TLS32 opt 2" "-melf32ppc" "" "-a32" {tlsopt2_32.s tlslib32.s} +- {{objdump -dr tlsopt2_32.d}} +- "tlsopt2_32"} +- {"TLS32 opt 3" "-melf32ppc" "" "-a32" {tlsopt3_32.s tlslib32.s} +- {{objdump -dr tlsopt3_32.d}} +- "tlsopt3_32"} +- {"TLS32 opt 4" "-melf32ppc" "" "-a32" {tlsopt4_32.s tlslib32.s} +- {{objdump -dr tlsopt4_32.d}} +- "tlsopt4_32"} +- {"TLS32 DLL" "-shared -melf32ppc --version-script tlsdll.ver" "" +- "-a32" {tlsdll_32.s} +- {} "tlsdll32.so"} +- {"TLS32 opt 5" "-melf32ppc -shared --gc-sections --secure-plt --no-plt-align tmpdir/tlsdll32.so" "" "-a32" {tlsopt5_32.s} +- {{objdump -dr tlsopt5_32.d}} +- "tlsopt5_32"} +- {"Shared library with global symbol" "-shared -melf32ppc" "" "-a32" {sdalib.s} +- {} "sdalib.so"} +- {"Dynamic application with SDA" "-melf32ppc tmpdir/sdalib.so" "" "-a32" {sdadyn.s} +- {{objdump -R sdadyn.d}} "sdadyn"} +- {"relaxing" "-melf32ppc --relax -Ttext=0 --defsym far=0x80001234 --defsym near=0x00004320" "" "-a32" "relax.s" +- {{objdump -dr relax.d}} +- "relax"} +- {"relocatable relaxing" "-melf32ppc -r --relax" "" "-a32" "relax.s" +- {{objdump -dr relaxr.d}} +- "rrelax"} +- {"relocatable relaxing large" "-melf32ppc -r --relax" "" "-a32" "relax.s big.s" +- {{objdump -dr relaxrl.d}} +- "rrelax"} +- {"build empty shared library" "-shared" "" "" "empty.s" {} "empty.so"} +- {"abs32-static" "-melf32ppc -static --defsym a=1 --defsym 'HIDDEN(b=2)' --defsym c=0x12345678" "" +- "-a32" {abs32-reloc.s} +- {{objdump {-dr} abs32-static.d} +- {readelf {-rW} abs32-static.r}} "abs32-static"} +- {"abs32-pie" "-melf32ppc -pie --hash-style=sysv --defsym a=1 --defsym 'HIDDEN(b=2)' --defsym c=0x12345678" "" +- "-a32" {abs32-reloc.s} +- {{objdump {-dr} abs32-pie.d} +- {readelf {-rW} abs32-pie.r}} "abs32-pie"} +- {"abs32-shared" "-melf32ppc -shared --hash-style=sysv --defsym a=1 --defsym 'HIDDEN(b=2)' --defsym c=0x12345678" "" +- "-a32" {abs32-reloc.s} +- {{objdump {-dr} abs32-shared.d} +- {readelf {-rW} abs32-shared.r}} "abs32-shared"} + } + + set ppc64elftests { +@@ -192,200 +133,6 @@ set ppc64elftests { + "-a64 --defsym TLSMARK=1" {tls.s tlslib.s} + {{objdump -dr tls.d} {objdump -sj.got tls.g} {objdump -sj.tdata tls.t}} + "tlsm"} +- {"TLS static exec" "-melf64ppc --no-plt-align" "" "-a64" {tls.s tlslib.s} +- {{objdump -dr tls.d} {objdump -sj.got tls.g} {objdump -sj.tdata tls.t}} +- "tls"} +- {"TLS static exec (--no-tls-optimize)" "-melf64ppc --no-tls-optimize --no-plt-align" "" +- "-a64 --defsym TLSMARK=1" {tls.s tlslib.s} +- {{objdump -dr tlsno.d} {objdump -sj.got tlsno.g} {objdump -sj.tdata tls.t}} +- "tlsno"} +- {"TLS helper shared library" "-shared -melf64ppc tmpdir/tlslib.o" "" "" {} +- {} "libtlslib.so"} +- {"TLS helper old shared lib" "-shared -melf64ppc" "" "-a64" {oldtlslib.s} +- {} "liboldlib.so"} +- {"TLS dynamic exec" "-melf64ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tls.o tmpdir/libtlslib.so" "" "" {} +- {{readelf -WSsrl tlsexe.r} {objdump -dr tlsexe.d} +- {objdump -sj.got tlsexe.g} {objdump -sj.tdata tlsexe.t}} +- "tlsexe"} +- {"TLS dynamic old" "-melf64ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tls.o tmpdir/liboldlib.so" "" "" {} +- {{readelf -WSsrl tlsexe.r} {objdump -dr tlsexe.d} +- {objdump -sj.got tlsexe.g} {objdump -sj.tdata tlsexe.t}} +- "tlsexeold"} +- {"TLS dynamic exec (--no-tls-optimize)" "-melf64ppc --no-tls-optimize --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tls.o tmpdir/libtlslib.so" "" "" {} +- {{readelf -WSsrl tlsexeno.r} {objdump -dr tlsexeno.d} +- {objdump -sj.got tlsexeno.g} {objdump -sj.tdata tlsexe.t}} +- "tlsexeno"} +- {"TLS shared" "-shared -melf64ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv -z notext tmpdir/tls.o" "" "" {} +- {{readelf -WSsrl tlsso.r} {objdump -dr tlsso.d} +- {objdump -sj.got tlsso.g} {objdump -sj.tdata tlsso.t}} +- "tls.so"} +- {"TLSTOC static exec" "-melf64ppc tmpdir/tlslib.o" "" "-a64" {tlstoc.s} +- {{objdump -dr tlstoc.d} {objdump -sj.got tlstoc.g} +- {objdump -sj.tdata tlstoc.t}} +- "tlstoc"} +- {"TLSTOC static exec (--no-tls-optimize)" "-melf64ppc --no-tls-optimize tmpdir/tlslib.o tmpdir/tlstoc.o" "" "" {} +- {{objdump -dr tlstocno.d} {objdump -sj.got tlstocno.g} +- {objdump -sj.tdata tlstoc.t}} +- "tlstocno"} +- {"TLSTOC dynamic exec" "-melf64ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tlstoc.o tmpdir/libtlslib.so" "" +- "" {} +- {{readelf -WSsrl tlsexetoc.r} {objdump -dr tlsexetoc.d} +- {objdump -sj.got tlsexetoc.g} {objdump -sj.tdata tlsexetoc.t}} +- "tlsexetoc"} +- {"TLSTOC dynamic old" "-melf64ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tlstoc.o tmpdir/liboldlib.so" "" +- "" {} +- {{readelf -WSsrl tlsexetoc.r} {objdump -dr tlsexetoc.d} +- {objdump -sj.got tlsexetoc.g} {objdump -sj.tdata tlsexetoc.t}} +- "tlsexetocold"} +- {"TLSTOC dynamic exec (--no-tls-optimize)" "-melf64ppc --no-tls-optimize --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tlstoc.o tmpdir/libtlslib.so" "" +- "" {} +- {{readelf -WSsrl tlsexetoc.r} {objdump -dr tlsexetocno.d} +- {objdump -sj.got tlsexetocno.g} {objdump -sj.tdata tlsexetoc.t}} +- "tlsexetocno"} +- {"TLSTOC shared" "-shared -melf64ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv -z notext tmpdir/tlstoc.o" "" "" {} +- {{readelf -WSsrl tlstocso.r} {objdump -dr tlstocso.d} +- {objdump -sj.got tlstocso.g} {objdump -sj.tdata tlstocso.t}} +- "tlstoc.so"} +- {"TLS dynamic exec (--tls-get-addr-regsave)" "-melf64ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv --tls-get-addr-regsave tmpdir/tls.o tmpdir/libtlslib.so" "" "" {} +- {{readelf -WSsrl tlsexers.r} {objdump -dr tlsexers.d} +- {objdump -sj.got tlsexe.g} {objdump -sj.tdata tlsexe.t}} +- "tlsexers"} +- {"TLS dynamic exec (--no-tls-optimize --tls-get-addr-regsave)" "-melf64ppc --no-tls-optimize --tls-get-addr-regsave --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tls.o tmpdir/libtlslib.so" "" "" {} +- {{readelf -WSsrl tlsexenors.r} {objdump -dr tlsexenors.d} +- {objdump -sj.got tlsexeno.g} {objdump -sj.tdata tlsexe.t}} +- "tlsexenors"} +- {"TLSTOC dynamic exec (--tls-get-addr-regsave)" "-melf64ppc --tls-get-addr-regsave --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tlstoc.o tmpdir/libtlslib.so" "" +- "" {} +- {{readelf -WSsrl tlsexetocrs.r} {objdump -dr tlsexetocrs.d} +- {objdump -sj.got tlsexetoc.g} {objdump -sj.tdata tlsexetoc.t}} +- "tlsexetocrs"} +- {"TLSTOC dynamic exec (--no-tls-optimize --tls-get-addr-regsave)" "-melf64ppc --no-tls-optimize --tls-get-addr-regsave --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tlstoc.o tmpdir/libtlslib.so" "" +- "" {} +- {{readelf -WSsrl tlsexetocrs.r} {objdump -dr tlsexetocnors.d} +- {objdump -sj.got tlsexetocno.g} {objdump -sj.tdata tlsexetoc.t}} +- "tlsexetocnors"} +- {"TLS markers" "-melf64ppc" "" "-a64" {tlsmark.s tlslib.s} +- {{objdump -dr tlsmark.d}} +- "tlsmark"} +- {"TLS opt 1" "-melf64ppc" "" "-a64" {tlsopt1.s tlslib.s} +- {{objdump -dr tlsopt1.d}} +- "tlsopt1"} +- {"TLS opt 2" "-melf64ppc" "" "-a64" {tlsopt2.s tlslib.s} +- {{objdump -dr tlsopt2.d}} +- "tlsopt2"} +- {"TLS opt 3" "-melf64ppc" "" "-a64" {tlsopt3.s tlslib.s} +- {{objdump -dr tlsopt3.d}} +- "tlsopt3"} +- {"TLS opt 4" "-melf64ppc" "" "-a64" {tlsopt4.s tlslib.s} +- {{objdump -dr tlsopt4.d}} +- "tlsopt4"} +- {"TLS DLL" "-shared -melf64ppc --version-script tlsdll.ver" "" "-a64" {tlsdll.s} +- {} "tlsdll.so"} +- {"TLS opt 5" "-melf64ppc -shared --hash-style=both --gc-sections --no-plt-localentry tmpdir/tlsdll.so" "" "-a64" {tlsopt5.s} +- {{objdump -dr tlsopt5.d} {readelf -wf tlsopt5.wf}} +- "tlsopt5"} +- {"TLS opt 6" "-melf64ppc -shared --hash-style=both --gc-sections --no-plt-localentry --tls-get-addr-regsave tmpdir/tlsdll.so" "" "-a64" {tlsopt5.s} +- {{objdump -dr tlsopt6.d} {readelf -wf tlsopt6.wf}} +- "tlsopt6"} +- {"TLSdesc" "-melf64ppc -shared --hash-style=both --no-plt-localentry tmpdir/libtlslib.so" "" "-a64" {tlsdesc.s} +- {{objdump -dr tlsdesc.d} {readelf -wf tlsdesc.wf}} +- "tlsdesc"} +- {"TLSdesc2" "-melf64ppc -shared --hash-style=both --no-plt-localentry tmpdir/tlsdll.so" "" "-a64" {tlsdesc.s} +- {{objdump -dr tlsdesc2.d} {readelf -wf tlsdesc2.wf}} +- "tlsdesc2"} +- {"TLSdesc3" "-melf64ppc --no-tls-optimize tmpdir/tlsdll.o" "" "-a64" {tlsdesc.s} +- {{objdump -dr tlsdesc3.d} {readelf -wf tlsdesc3.wf}} +- "tlsdesc3"} +- {"TLSdesc4" "-melf64ppc --no-tls-optimize tmpdir/tlsdll.o" "" "-a64" {tlsdesc4.s} +- {{objdump -dr tlsdesc4.d} {readelf -wf tlsdesc4.wf}} +- "tlsdesc4"} +- {"tlsget" "-shared --hash-style=both -melf64ppc --plt-align=0" "tmpdir/tlsdll.so" "-a64 -mpower10" {tlsget.s} +- {{objdump -dr tlsget.d} {readelf -wf tlsget.wf}} +- "tlsget.so"} +- {"tlsget2" "-shared --hash-style=both -melf64ppc --plt-align=0 --power10-stubs=yes" "tmpdir/tlsdll.so" "-a64 -mpower10" {tlsget.s} +- {{objdump -dr tlsget2.d} {readelf -wf tlsget2.wf}} +- "tlsget2.so"} +- {"sym@tocbase" "-shared -melf64ppc" "" "-a64" {symtocbase-1.s symtocbase-2.s} +- {{objdump -dj.data symtocbase.d}} "symtocbase.so"} +- {"TOC opt" "-melf64ppc" "" "-a64" {tocopt.s} +- {{ld tocopt.out} {objdump -s tocopt.d}} "tocopt"} +- {"TOC opt2" "-melf64ppc --defsym x=2" "" "-a64" {tocopt2.s} +- {{ld tocopt2.out} {objdump -s tocopt2.d}} "tocopt2"} +- {"TOC opt3" "-melf64ppc -no-keep-memory --defsym x=2" "" "-a64" {tocopt3.s} +- {{objdump -s tocopt3.d}} "tocopt3"} +- {"TOC opt4" "-melf64ppc -no-keep-memory --defsym x=2" "" "-a64" +- {tocopt4a.s tocopt4b.s} {{objdump -s tocopt4.d}} "tocopt4"} +- {"TOC opt5" "-melf64ppc" "" "-a64" {tocopt5.s} +- {{objdump -s tocopt5.d}} "tocopt5"} +- {"TOC opt6" "-melf64ppc" "" "-a64" {tocopt6a.s tocopt6b.s tocopt6c.s} +- {{objdump -d tocopt6.d}} "tocopt6"} +- {"TOC opt7" "-melf64ppc" "" "-a64 -mpower9" {tocopt7.s} +- {{ld tocopt7.out} {objdump -s tocopt7.d}} "tocopt7"} +- {"TOC opt8" "-melf64ppc" "" "-a64 -mpower9" {tocopt8.s} +- {{objdump -s tocopt8.d}} "tocopt8"} +- {"tocsave lib" "-shared -melf64ppc" "" "-a64" {tocsavelib.s} +- {} "tocsavelib.so"} +- {"tocsave1 shared" "-melf64ppc" "tmpdir/tocsavelib.so" "-a64" {tocsave1.s} +- {{objdump -dr tocsave1s.d}} "tocsave1s"} +- {"tocsave1 static" "-melf64ppc" "tmpdir/tocsavelib.o" "-a64" {tocsave1.s} +- {{objdump -dr tocsave1a.d}} "tocsave1a"} +- {"tocsave2 shared" "-melf64ppc" "tmpdir/tocsavelib.so" "-a64" {tocsave2.s} +- {{objdump -dr tocsave2s.d}} "tocsave2s"} +- {"tocsave2 static" "-melf64ppc" "tmpdir/tocsavelib.o" "-a64" {tocsave2.s} +- {{objdump -dr tocsave2a.d}} "tocsave2a"} +- {"ambig shared v1" "-shared -melf64ppc" "" "-a64" {funv1.s} {} "funv1.so"} +- {"ambig shared v2" "-shared -melf64ppc" "" "-a64" {funv2.s} {} "funv2.so"} +- {"notoc ext" "" "" "-a64" {ext.s} {} ""} +- {"notoc" "-melf64ppc --no-plt-localentry --no-power10-stubs -T ext.lnk" +- "" "-a64" {notoc.s} +- {{objdump -d notoc.d} {readelf {-wf -W} notoc.wf}} "notoc"} +- {"notoc2" "-melf64ppc -shared" "" "-a64 -mpower10" {notoc2.s} +- {{objdump {-d -Mpower10} notoc2.d}} "notoc2"} +- {"notoc3" "-melf64ppc --no-plt-localentry -T ext.lnk" "" +- "-a64 -mpower10" {notoc3.s} +- {{objdump -d notoc3.d} {readelf {-wf -W} notoc3.wf}} "notoc3"} +- {"pcrelopt" "-melf64ppc --hash-style=gnu" "tmpdir/symtocbase.so" +- "-a64 -mpower10" {pcrelopt.s} +- {{objdump {-d -Mpower10} pcrelopt.d} +- {readelf {-S --wide} pcrelopt.sec}} "pcrelopt" } +- {"group1" "-melf64ppc -e foo" "" "-a64" {group1.s group2.s group3.s} +- {{objdump {-d} group1.d} +- {readelf {-s} group1.sym}} "group1"} +- {"group2" "-melf64ppc -e foo" "" "-a64" {group2.s group1.s group3.s} +- {{objdump {-d} group2.d} +- {readelf {-s} group2.sym}} "group2"} +- {"group3" "-melf64ppc -e foo" "" "-a64" {group3.s group2.s group1.s} +- {{objdump {-d} group2.d} +- {readelf {-s} group3.sym}} "group3"} +- {"weak1" "-melf64ppc --hash-style=both" "" +- "-a64 -mpower10" {weak1.s} +- {{objdump -d weak1.d} {readelf {-srW} weak1.r}} "weak1"} +- {"weak1.so" "-shared -melf64ppc --hash-style=both" "" +- "-a64 -mpower10" {weak1.s} +- {{objdump -d weak1so.d} {readelf {-srW} weak1so.r}} "weak1.so"} +- {"startstop" "-shared -melf64ppc --hash-style=sysv --gc-sections -z start-stop-gc" "" +- "-a64 -mpower10" {startstop.s} +- {{objdump -d startstop.d} {readelf {-rW} startstop.r}} "startstop.so"} +- {"abs-static" "-melf64ppc -static --defsym a=1 --defsym 'HIDDEN(b=2)' --defsym c=0x123456789abcdef0" "" +- "-a64" {abs-reloc.s} +- {{objdump {-sdr} abs-static.d} +- {readelf {-rW} abs-static.r}} "abs-static"} +- {"abs-pie" "-melf64ppc -pie --hash-style=sysv --defsym a=1 --defsym 'HIDDEN(b=2)' --defsym c=0x123456789abcdef0" "" +- "-a64" {abs-reloc.s} +- {{objdump {-sdr} abs-pie.d} +- {readelf {-rW} abs-pie.r}} "abs-pie"} +- {"abs-shared" "-melf64ppc -shared --hash-style=sysv --defsym a=1 --defsym 'HIDDEN(b=2)' --defsym c=0x123456789abcdef0" "" +- "-a64" {abs-reloc.s} +- {{objdump {-sdr} abs-shared.d} +- {readelf {-rW} abs-shared.r}} "abs-shared"} +- {"abs-pie-relr" "-melf64ppc -pie --hash-style=sysv -z pack-relative-relocs --defsym a=1 --defsym 'HIDDEN(b=2)' --defsym c=0x123456789abcdef0" "" +- "-a64" {abs-reloc.s} +- {{objdump {-sdr} abs-pie-relr.d} +- {readelf {-rW} abs-pie-relr.r}} "abs-pie-relr"} +- {"abs-shared-relr" "-melf64ppc -shared --hash-style=sysv -z pack-relative-relocs --defsym a=1 --defsym 'HIDDEN(b=2)' --defsym c=0x123456789abcdef0" "" +- "-a64" {abs-reloc.s} +- {{objdump {-sdr} abs-shared-relr.d} +- {readelf {-rW} abs-shared-relr.r}} "abs-shared-relr"} + } + + set ppceabitests { +@@ -404,15 +151,6 @@ set ppceabitests { + {"VLE multiple segments 5" "-melf32ppc -T vle-multiseg-5.ld" "" + "-a32 -mbig -mregnames -mvle" {vle-multiseg.s} + {{readelf "-l" vle-multiseg-5.d}} "vle-multiseg-5"} +- {"VLE relocations 1" "-melf32ppc -T vle.ld" "" +- "-a32 -mbig -mvle" {vle-reloc-1.s vle-reloc-def-1.s} +- {{objdump "-Mvle -d" vle-reloc-1.d}} "vle-reloc-1"} +- {"VLE relocations 2" "-melf32ppc -T vle.ld" "" +- "-a32 -mbig -mvle" {vle-reloc-2.s vle-reloc-def-2.s} +- {{objdump "-Mvle -d" vle-reloc-2.d}} "vle-reloc-2"} +- {"VLE relocations 3" "-melf32ppc -T vle.ld" "" +- "-a32 -mbig -mvle" {vle-reloc-3.s vle-reloc-def-3.s} +- {{objdump "-Mvle -d" vle-reloc-3.d}} "vle-reloc-3"} + } + + if [istarget "powerpc*le*-*-*"] then { +diff -rup binutils.orig/ld/testsuite/ld-powerpc/tls32.d binutils-2.41/ld/testsuite/ld-powerpc/tls32.d +--- binutils.orig/ld/testsuite/ld-powerpc/tls32.d 2023-08-15 14:30:13.278890868 +0100 ++++ binutils-2.41/ld/testsuite/ld-powerpc/tls32.d 2023-08-15 14:35:25.141593764 +0100 +@@ -9,11 +9,11 @@ + + Disassembly of section \.text: + +-0+18000a0 <_start>: ++0+18[0-9a-f]+ <_start>: + .*: (42 9f 00 05|05 00 9f 42) bcl 20,4\*cr7\+so,.* <_start\+0x4> + .*: (7f c8 02 a6|a6 02 c8 7f) mflr r30 + .*: (3f de 00 02|02 00 de 3f) addis r30,r30,2 +-.*: (3b de 80 a0|a0 80 de 3b) addi r30,r30,-32608 ++.*: (3b de 80 a0|.. 80 de 3b) addi r30,r30,.* + .*: (60 00 00 00|00 00 00 60) nop + .*: (38 62 90 3c|3c 90 62 38) addi r3,r2,-28612 + .*: (60 00 00 00|00 00 00 60) nop +@@ -43,5 +43,5 @@ Disassembly of section \.text: + .*: (60 00 00 00|00 00 00 60) nop + .*: (a9 42 90 18|18 90 42 a9) lha r10,-28648\(r2\) + +-0+1800120 <__tls_get_addr>: ++0+18[0-9a-f]+ <__tls_get_addr>: + .*: (4e 80 00 20|20 00 80 4e) blr +--- binutils.orig/ld/testsuite/ld-elf/shared.exp 2023-08-15 14:30:13.165890702 +0100 ++++ binutils-2.41/ld/testsuite/ld-elf/shared.exp 2023-08-15 14:45:41.943992390 +0100 +@@ -1152,10 +1152,6 @@ set run_tests [list \ [list "Run pr21964-3" \ "-Wl,--no-as-needed,-rpath,tmpdir tmpdir/pr21964-1a.so tmpdir/pr21964-1b.so tmpdir/pr21964-3a.so" "" \ {pr21964-3c.c} "pr21964-3" "pass.out" ] \ -+] -+set disabled_run_tests [list \ - [list "pr26580-3" \ +- [list "pr26580-3" \ +- "" "" \ +- {pr26580-a.c} "pr26580-3" "pr26580-3.out" "-fcommon" "c" "" \ +- "-Wl,--as-needed tmpdir/libpr26580-2.so" ] \ + [list "pr26580-4" \ "" "" \ - {pr26580-a.c} "pr26580-3" "pr26580-3.out" "-fcommon" "c" "" \ -@@ -1578,6 +1580,8 @@ if { [istarget *-*-linux*] + {pr26580-a.c} "pr26580-4" "pr26580-4.out" "-fcommon" "c" "" \ +@@ -1579,18 +1575,6 @@ if { [istarget *-*-linux*] "pr22393-2-static" \ "pass.out" \ ] \ -+ ] -+ set disabled_run_ld_link_exec_tests [list \ - [list \ - "Run pr21964-4" \ - "" \ -diff -rup binutils.orig/ld/testsuite/ld-i386/i386.exp binutils-2.40/ld/testsuite/ld-i386/i386.exp ---- binutils.orig/ld/testsuite/ld-i386/i386.exp 2023-02-14 11:18:21.160180625 +0000 -+++ binutils-2.40/ld/testsuite/ld-i386/i386.exp 2023-02-14 12:11:45.977957736 +0000 -@@ -595,7 +595,7 @@ proc undefined_weak {cflags ldflags} { - pass $testname - } +- [list \ +- "Run pr21964-4" \ +- "" \ +- "" \ +- {pr21964-4.c} \ +- "pr21964-4" \ +- "pass.out" \ +- "" \ +- "" \ +- "" \ +- "-ldl" \ +- ] \ + ] } -- -+return - # Must be Linux native with the C compiler - if { [isnative] - && [istarget "i?86-*-linux*"] -diff -rup binutils.orig/ld/testsuite/ld-ifunc/ifunc.exp binutils-2.40/ld/testsuite/ld-ifunc/ifunc.exp ---- binutils.orig/ld/testsuite/ld-ifunc/ifunc.exp 2023-02-14 11:18:21.181180582 +0000 -+++ binutils-2.40/ld/testsuite/ld-ifunc/ifunc.exp 2023-02-14 11:24:18.256364707 +0000 -@@ -39,6 +39,7 @@ if { ![is_elf_format] || ![supports_gnu_ - || [istarget nds32*-*-*] - || [istarget nios2-*-*] - || [istarget or1k-*-*] -+ || [istarget powerpc*-*-*] - || [istarget score*-*-*] - || [istarget sh*-*-*] - || [istarget tic6x-*-*] -diff -rup binutils.orig/ld/testsuite/ld-powerpc/powerpc.exp binutils-2.40/ld/testsuite/ld-powerpc/powerpc.exp ---- binutils.orig/ld/testsuite/ld-powerpc/powerpc.exp 2023-02-14 11:18:21.251180437 +0000 -+++ binutils-2.40/ld/testsuite/ld-powerpc/powerpc.exp 2023-02-14 11:25:15.264233016 +0000 -@@ -19,7 +19,7 @@ - # MA 02110-1301, USA. - # --if { ![istarget "powerpc*-*-*"] } { -+if { ![istarget "powerpc-*-*"] } { - return - } +--- binutils.orig/ld/testsuite/ld-s390/s390.exp 2023-08-15 14:30:13.292890888 +0100 ++++ binutils-2.41/ld/testsuite/ld-s390/s390.exp 2023-08-15 14:48:38.327360916 +0100 +@@ -35,6 +35,8 @@ if { !([istarget "s390-*-*"] || [istarge + # nm: Apply nm options on result. Compare with regex (last arg). + # readelf: Apply readelf options on result. Compare with regex (last arg). -diff -rup binutils.orig/ld/testsuite/ld-s390/s390.exp binutils-2.40/ld/testsuite/ld-s390/s390.exp ---- binutils.orig/ld/testsuite/ld-s390/s390.exp 2023-02-14 11:18:21.265180408 +0000 -+++ binutils-2.40/ld/testsuite/ld-s390/s390.exp 2023-02-14 12:08:39.450351870 +0000 -@@ -25,6 +25,7 @@ - if { !([istarget "s390-*-*"] || [istarget "s390x-*-*"]) } { - return - } +return ++ + set s390tests { + {"TLS -fpic -shared transitions" "-shared -melf_s390 --hash-style=sysv" "" + "-m31" {tlspic1.s tlspic2.s} +--- binutils.orig/ld/testsuite/ld-elf/linux-x86.exp 2023-08-15 14:30:13.146890674 +0100 ++++ binutils-2.41/ld/testsuite/ld-elf/linux-x86.exp 2023-08-15 14:54:31.527999066 +0100 +@@ -152,6 +152,10 @@ run_cc_link_tests [list \ + ] \ + ] - # List contains test-items with 3 items followed by 2 lists: - # 0:name 1:ld early options 2:ld late options 3:assembler options -diff -rup binutils.orig/ld/testsuite/ld-scripts/crossref.exp binutils-2.40/ld/testsuite/ld-scripts/crossref.exp ---- binutils.orig/ld/testsuite/ld-scripts/crossref.exp 2023-02-14 13:34:28.101107836 +0000 -+++ binutils-2.40/ld/testsuite/ld-scripts/crossref.exp 2023-02-14 13:38:51.694556937 +0000 -@@ -122,6 +122,7 @@ if [string match "" $exec_output] then { ++if { [istarget "i686-*-*"] } { ++ return ++} ++ + run_ld_link_exec_tests [list \ + [list \ + "Run indirect-extern-access-1a without PIE" \ +--- binutils.orig/ld/testsuite/ld-i386/i386.exp 2023-08-15 14:30:13.183890728 +0100 ++++ binutils-2.41/ld/testsuite/ld-i386/i386.exp 2023-08-15 14:55:59.001157084 +0100 +@@ -597,6 +597,10 @@ proc undefined_weak {cflags ldflags} { + } + } + ++if { [istarget "i686-*-*"] } { ++ return ++} ++ + # Must be Linux native with the C compiler + if { [isnative] + && [istarget "i?86-*-linux*"] +--- binutils.orig/ld/testsuite/ld-scripts/crossref.exp 2023-08-15 14:30:13.294890891 +0100 ++++ binutils-2.41/ld/testsuite/ld-scripts/crossref.exp 2023-08-15 14:59:36.680591177 +0100 +@@ -121,6 +121,10 @@ if [string match "" $exec_output] then { + } } ++if { [istarget "i686-*-*"] } { ++ return ++} ++ # Check cross references for ld -r -+return if { ![ld_compile "$CC_FOR_TARGET $NOSANITIZE_CFLAGS $NOLTO_CFLAGS" "$srcdir/$subdir/cross4.c" tmpdir/cross4.o] } { - unsupported $test3 -diff -rup binutils.orig/ld/testsuite/ld-shared/shared.exp binutils-2.40/ld/testsuite/ld-shared/shared.exp ---- binutils.orig/ld/testsuite/ld-shared/shared.exp 2023-02-14 13:34:28.118107801 +0000 -+++ binutils-2.40/ld/testsuite/ld-shared/shared.exp 2023-02-14 13:37:23.950740329 +0000 -@@ -42,8 +42,6 @@ if { ![istarget hppa*64*-*-hpux*] \ - && ![istarget i?86-*-sysv4*] \ - && ![istarget i?86-*-unixware] \ - && ![istarget i?86-*-elf*] \ -- && ![istarget i?86-*-linux*] \ -- && ![istarget i?86-*-gnu*] \ - && ![istarget *-*-nacl*] \ - && ![istarget ia64-*-elf*] \ - && ![istarget ia64-*-linux*] \ -diff -rup binutils.orig/ld/testsuite/ld-vsb/vsb.exp binutils-2.40/ld/testsuite/ld-vsb/vsb.exp ---- binutils.orig/ld/testsuite/ld-vsb/vsb.exp 2023-02-14 13:34:28.137107761 +0000 -+++ binutils-2.40/ld/testsuite/ld-vsb/vsb.exp 2023-02-14 13:36:57.630795340 +0000 -@@ -34,8 +34,6 @@ if { ![check_compiler_available] } { - # Square bracket expressions seem to confuse istarget. - if { ![istarget hppa*64*-*-hpux*] \ - && ![istarget hppa*-*-linux*] \ -- && ![istarget i?86-*-linux*] \ -- && ![istarget i?86-*-gnu*] \ - && ![istarget *-*-nacl*] \ - && ![istarget ia64-*-linux*] \ - && ![istarget m68k-*-linux*] \ -diff -rup binutils.orig/gas/testsuite/gas/riscv/variant_cc-set.d binutils-2.40/gas/testsuite/gas/riscv/variant_cc-set.d ---- binutils.orig/gas/testsuite/gas/riscv/variant_cc-set.d 2023-02-16 10:11:38.178876057 +0000 -+++ binutils-2.40/gas/testsuite/gas/riscv/variant_cc-set.d 2023-02-16 10:37:02.341246522 +0000 -@@ -3,11 +3,11 @@ - #readelf: -Ws - - #... --[ ]+[0-9a-f]+:[ ]+0+[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+foo -+[ ]+[0-9a-f]+:[ ]+0+[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+1[ ]+foo[ ]+\[VARIANT_CC\] - #... - [ ]+[0-9a-f]+:[ ]+0+[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+1[ ]+bar - #... --[ ]+[0-9a-f]+:[ ]+0+[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+alias_foo -+[ ]+[0-9a-f]+:[ ]+0+[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+1[ ]+alias_foo[ ]+\[VARIANT_CC\] - #... - [ ]+[0-9a-f]+:[ ]+0+[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+1[ ]alias_bar - #... -diff -rup binutils.orig/gas/testsuite/gas/riscv/variant_cc.d binutils-2.40/gas/testsuite/gas/riscv/variant_cc.d ---- binutils.orig/gas/testsuite/gas/riscv/variant_cc.d 2023-02-16 10:11:38.178876057 +0000 -+++ binutils-2.40/gas/testsuite/gas/riscv/variant_cc.d 2023-02-16 10:37:49.732155971 +0000 -@@ -3,7 +3,7 @@ - #readelf: -Ws +--- binutils.orig/ld/testsuite/ld-shared/shared.exp 2023-08-15 14:30:13.309890913 +0100 ++++ binutils-2.41/ld/testsuite/ld-shared/shared.exp 2023-08-15 15:00:31.929701875 +0100 +@@ -204,6 +204,10 @@ if { [istarget mips*-*-*] && ! [at_least + } + verbose "Using $picflag to compile PIC code" - #... --[ ]+[0-9a-f]+:[ ]+0+[ ]+0[ ]+NOTYPE[ ]+LOCAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+func -+[ ]+[0-9a-f]+:[ ]+0+[ ]+0[ ]+NOTYPE[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+func[ ]+\[VARIANT_CC\] - #... --[ ]+[0-9a-f]+:[ ]+0+[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+UND[ ]+foo -+[ ]+[0-9a-f]+:[ ]+0+[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+UND[ ]+foo[ ]+\[VARIANT_CC\] - #... -diff -rup binutils.orig/ld/testsuite/ld-riscv-elf/attr-phdr.d binutils-2.40/ld/testsuite/ld-riscv-elf/attr-phdr.d ---- binutils.orig/ld/testsuite/ld-riscv-elf/attr-phdr.d 2023-02-16 10:11:38.656875289 +0000 -+++ binutils-2.40/ld/testsuite/ld-riscv-elf/attr-phdr.d 2023-02-16 10:49:26.786573665 +0000 -@@ -12,8 +12,8 @@ Program Headers: - Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align - RISCV_ATTRIBUT .* - LOAD .* -- -+#... - Section to Segment mapping: - Segment Sections... - 00 .riscv.attributes -- 01 .text -+#pass -diff -rup binutils.orig/ld/testsuite/ld-riscv-elf/pcgp-relax-01.d binutils-2.40/ld/testsuite/ld-riscv-elf/pcgp-relax-01.d ---- binutils.orig/ld/testsuite/ld-riscv-elf/pcgp-relax-01.d 2023-02-16 10:11:38.659875285 +0000 -+++ binutils-2.40/ld/testsuite/ld-riscv-elf/pcgp-relax-01.d 2023-02-16 10:42:54.803431287 +0000 -@@ -8,7 +8,7 @@ - Disassembly of section \.text: ++if { [istarget "i686-*-*"] } { ++ return ++} ++ + # Compile the main program. + if ![ld_compile "$CC_FOR_TARGET $SHCFLAG" $srcdir/$subdir/main.c $tmpdir/mainnp.o] { + unsupported "shared (non PIC)" +--- binutils.orig/ld/testsuite/ld-srec/srec.exp 2023-08-15 14:30:13.315890922 +0100 ++++ binutils-2.41/ld/testsuite/ld-srec/srec.exp 2023-08-15 15:01:24.104806404 +0100 +@@ -442,6 +442,9 @@ setup_xfail "csky*-*-*" + # The S-record linker is not supported for eBPF. + setup_xfail "bpf-*-*" + ++setup_xfail "s390*-*-*" ++setup_xfail "i686-*-*" ++ + run_srec_test $test1 "tmpdir/sr1.o tmpdir/sr2.o" - 0+[0-9a-f]+ <_start>: --.*:[ ]+[0-9a-f]+[ ]+addi[ ]+a0,a0,[0-9]+ -+.*:[ ]+[0-9a-f]+[ ]+addi[ ]+a0,a0,\-[0-9]+ - .*:[ ]+[0-9a-f]+[ ]+jal[ ]+ra,[0-9a-f]+ <_start> - .*:[ ]+[0-9a-f]+[ ]+addi[ ]+a1,gp,\-[0-9]+ # [0-9a-f]+ - .*:[ ]+[0-9a-f]+[ ]+addi[ ]+a2,gp,\-[0-9]+ # [0-9a-f]+ -diff -rup binutils.orig/ld/testsuite/ld-riscv-elf/pcgp-relax-02.d binutils-2.40/ld/testsuite/ld-riscv-elf/pcgp-relax-02.d ---- binutils.orig/ld/testsuite/ld-riscv-elf/pcgp-relax-02.d 2023-02-16 10:11:38.659875285 +0000 -+++ binutils-2.40/ld/testsuite/ld-riscv-elf/pcgp-relax-02.d 2023-02-16 10:43:49.540306593 +0000 -@@ -11,5 +11,5 @@ Disassembly of section .text: - [0-9a-f]+ <_start>: - .*:[ ]+[0-9a-f]+[ ]+auipc[ ]+a1.* - .*:[ ]+[0-9a-f]+[ ]+addi?[ ]+a0,gp.* --.*:[ ]+[0-9a-f]+[ ]+addi?[ ]+a1,a1.* -+.*:[ ]+[0-9a-f]+[ ]+mv[ ]+a1,a1 - #pass -diff -rup binutils.orig/ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2a.d binutils-2.40/ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2a.d ---- binutils.orig/ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2a.d 2023-02-16 10:11:38.659875285 +0000 -+++ binutils-2.40/ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2a.d 2023-02-16 10:46:55.570899994 +0000 -@@ -2,4 +2,5 @@ - #source: pcrel-lo-addend-2a.s - #as: -march=rv32ic - #ld: -m[riscv_choose_ilp32_emul] --no-relax -+#skip: *-*-* - #error: .*dangerous relocation: %pcrel_lo overflow with an addend, the value of %pcrel_hi is 0x1000 without any addend, but may be 0x2000 after adding the %pcrel_lo addend -diff -rup binutils.orig/ld/testsuite/ld-riscv-elf/variant_cc-now.d binutils-2.40/ld/testsuite/ld-riscv-elf/variant_cc-now.d ---- binutils.orig/ld/testsuite/ld-riscv-elf/variant_cc-now.d 2023-02-16 10:11:38.660875283 +0000 -+++ binutils-2.40/ld/testsuite/ld-riscv-elf/variant_cc-now.d 2023-02-16 10:57:10.768645601 +0000 -@@ -22,52 +22,52 @@ Symbol table '.dynsym' contains .* - #... - [ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+UND[ ]+nocc_global_default_undef - #... --[ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+UND[ ]+cc_global_default_undef -+[ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+UND[ ]+cc_global_default_undef[ ]+\[VARIANT_CC\] - #... --[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+IFUNC[ ]+GLOBAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_global_default_ifunc -+[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+IFUNC[ ]+GLOBAL[ ]+DEFAULT[ ]+1[ ]+cc_global_default_ifunc[ ]+\[VARIANT_CC\] - #... - [ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+IFUNC[ ]+GLOBAL[ ]+DEFAULT[ ]+1[ ]+nocc_global_default_ifunc - #... --[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_global_default_def -+[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+1[ ]+cc_global_default_def[ ]+\[VARIANT_CC\] - #... - [ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+1[ ]+nocc_global_default_def - #... - Symbol table '.symtab' contains .* - .* - #... --[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+NOTYPE[ ]+LOCAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_local -+[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+NOTYPE[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+cc_local[ ]+\[VARIANT_CC\] - #... --[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+IFUNC[ ]+LOCAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_local_ifunc -+[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+IFUNC[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+cc_local_ifunc[ ]+\[VARIANT_CC\] - #... - [ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+IFUNC[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+nocc_local_ifunc - #... - [ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+NOTYPE[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+nocc_local - #... --[ ]+[0-9a-f]+:[ ]+0+8050[ ]+0[ ]+NOTYPE[ ]+LOCAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_local2 -+[ ]+[0-9a-f]+:[ ]+0+8050[ ]+0[ ]+NOTYPE[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+cc_local2[ ]+\[VARIANT_CC\] - #... --[ ]+[0-9a-f]+:[ ]+0+8050[ ]+0[ ]+IFUNC[ ]+LOCAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_local2_ifunc -+[ ]+[0-9a-f]+:[ ]+0+8050[ ]+0[ ]+IFUNC[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+cc_local2_ifunc[ ]+\[VARIANT_CC\] - #... - [ ]+[0-9a-f]+:[ ]+0+8050[ ]+0[ ]+IFUNC[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+nocc_local2_ifunc - #... - [ ]+[0-9a-f]+:[ ]+0+8050[ ]+0[ ]+NOTYPE[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+nocc_local2 - #... --[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+NOTYPE[ ]+LOCAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_global_hidden_def -+[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+NOTYPE[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+cc_global_hidden_def[ ]+\[VARIANT_CC\] - #... - [ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+NOTYPE[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+nocc_global_hidden_def - #... - [ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+IFUNC[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+nocc_global_hidden_ifunc - #... --[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+IFUNC[ ]+LOCAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_global_hidden_ifunc -+[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+IFUNC[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+cc_global_hidden_ifunc[ ]+\[VARIANT_CC\] - #... - [ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+UND[ ]+nocc_global_default_undef - #... --[ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+UND[ ]+cc_global_default_undef -+[ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+UND[ ]+cc_global_default_undef[ ]+\[VARIANT_CC\] - #... --[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+IFUNC[ ]+GLOBAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_global_default_ifunc -+[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+IFUNC[ ]+GLOBAL[ ]+DEFAULT[ ]+1[ ]+cc_global_default_ifunc[ ]+\[VARIANT_CC\] - #... - [ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+IFUNC[ ]+GLOBAL[ ]+DEFAULT[ ]+1[ ]+nocc_global_default_ifunc - #... --[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_global_default_def -+[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+1[ ]+cc_global_default_def[ ]+\[VARIANT_CC\] - #... - [ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+1[ ]+nocc_global_default_def - #... -diff -rup binutils.orig/ld/testsuite/ld-riscv-elf/variant_cc-r.d binutils-2.40/ld/testsuite/ld-riscv-elf/variant_cc-r.d ---- binutils.orig/ld/testsuite/ld-riscv-elf/variant_cc-r.d 2023-02-16 10:11:38.660875283 +0000 -+++ binutils-2.40/ld/testsuite/ld-riscv-elf/variant_cc-r.d 2023-02-16 10:57:47.521574461 +0000 -@@ -38,17 +38,17 @@ Relocation section '.rela.text' at .* - Symbol table '.symtab' contains .* - .* - #... --[ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+NOTYPE[ ]+LOCAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_local -+[ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+NOTYPE[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+cc_local[ ]+\[VARIANT_CC\] - #... --[ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+IFUNC[ ]+LOCAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_local_ifunc -+[ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+IFUNC[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+cc_local_ifunc[ ]+\[VARIANT_CC\] - #... - [ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+IFUNC[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+nocc_local_ifunc - #... - [ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+NOTYPE[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+nocc_local - #... --[ ]+[0-9a-f]+:[ ]+0+0070[ ]+0[ ]+NOTYPE[ ]+LOCAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_local2 -+[ ]+[0-9a-f]+:[ ]+0+0070[ ]+0[ ]+NOTYPE[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+cc_local2[ ]+\[VARIANT_CC\] - #... --[ ]+[0-9a-f]+:[ ]+0+0070[ ]+0[ ]+IFUNC[ ]+LOCAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_local2_ifunc -+[ ]+[0-9a-f]+:[ ]+0+0070[ ]+0[ ]+IFUNC[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+cc_local2_ifunc[ ]+\[VARIANT_CC\] - #... - [ ]+[0-9a-f]+:[ ]+0+0070[ ]+0[ ]+IFUNC[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+nocc_local2_ifunc - #... -@@ -56,11 +56,11 @@ Symbol table '.symtab' contains .* - #... - [ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+UND[ ]+nocc_global_default_undef - #... --[ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+HIDDEN[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_global_hidden_def -+[ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+HIDDEN[ ]+1[ ]+cc_global_hidden_def[ ]+\[VARIANT_CC\] - #... --[ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+UND[ ]+cc_global_default_undef -+[ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+UND[ ]+cc_global_default_undef[ ]+\[VARIANT_CC\] - #... --[ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+IFUNC[ ]+GLOBAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_global_default_ifunc -+[ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+IFUNC[ ]+GLOBAL[ ]+DEFAULT[ ]+1[ ]+cc_global_default_ifunc[ ]+\[VARIANT_CC\] - #... - [ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+HIDDEN[ ]+1[ ]+nocc_global_hidden_def - #... -@@ -68,9 +68,9 @@ Symbol table '.symtab' contains .* - #... - [ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+IFUNC[ ]+GLOBAL[ ]+DEFAULT[ ]+1[ ]+nocc_global_default_ifunc - #... --[ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_global_default_def -+[ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+1[ ]+cc_global_default_def[ ]+\[VARIANT_CC\] - #... - [ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+1[ ]+nocc_global_default_def - #... --[ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+IFUNC[ ]+GLOBAL[ ]+HIDDEN[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_global_hidden_ifunc -+[ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+IFUNC[ ]+GLOBAL[ ]+HIDDEN[ ]+1[ ]+cc_global_hidden_ifunc[ ]+\[VARIANT_CC\] - #... -diff -rup binutils.orig/ld/testsuite/ld-riscv-elf/variant_cc-shared.d binutils-2.40/ld/testsuite/ld-riscv-elf/variant_cc-shared.d ---- binutils.orig/ld/testsuite/ld-riscv-elf/variant_cc-shared.d 2023-02-16 10:11:38.660875283 +0000 -+++ binutils-2.40/ld/testsuite/ld-riscv-elf/variant_cc-shared.d 2023-02-16 10:54:20.881974426 +0000 -@@ -22,52 +22,52 @@ Symbol table '.dynsym' contains .* - #... - [ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+UND[ ]+nocc_global_default_undef - #... --[ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+UND[ ]+cc_global_default_undef -+[ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+UND[ ]+cc_global_default_undef[ ]+\[VARIANT_CC\] - #... --[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+IFUNC[ ]+GLOBAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_global_default_ifunc -+[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+IFUNC[ ]+GLOBAL[ ]+DEFAULT[ ]+1[ ]+cc_global_default_ifunc[ ]+\[VARIANT_CC\] - #... - [ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+IFUNC[ ]+GLOBAL[ ]+DEFAULT[ ]+1[ ]+nocc_global_default_ifunc - #... --[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_global_default_def -+[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+1[ ]+cc_global_default_def[ ]+\[VARIANT_CC\] - #... - [ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+1[ ]+nocc_global_default_def - #... - Symbol table '.symtab' contains .* - .* - #... --[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+NOTYPE[ ]+LOCAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_local -+[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+NOTYPE[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+cc_local[ ]+\[VARIANT_CC\] - #... --[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+IFUNC[ ]+LOCAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_local_ifunc -+[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+IFUNC[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+cc_local_ifunc[ ]+\[VARIANT_CC\] - #... - [ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+IFUNC[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+nocc_local_ifunc - #... - [ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+NOTYPE[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+nocc_local - #... --[ ]+[0-9a-f]+:[ ]+0+8050[ ]+0[ ]+NOTYPE[ ]+LOCAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_local2 -+[ ]+[0-9a-f]+:[ ]+0+8050[ ]+0[ ]+NOTYPE[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+cc_local2[ ]+\[VARIANT_CC\] - #... --[ ]+[0-9a-f]+:[ ]+0+8050[ ]+0[ ]+IFUNC[ ]+LOCAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_local2_ifunc -+[ ]+[0-9a-f]+:[ ]+0+8050[ ]+0[ ]+IFUNC[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+cc_local2_ifunc[ ]+\[VARIANT_CC\] - #... - [ ]+[0-9a-f]+:[ ]+0+8050[ ]+0[ ]+IFUNC[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+nocc_local2_ifunc - #... - [ ]+[0-9a-f]+:[ ]+0+8050[ ]+0[ ]+NOTYPE[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+nocc_local2 - #... --[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+NOTYPE[ ]+LOCAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_global_hidden_def -+[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+NOTYPE[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+cc_global_hidden_def[ ]+\[VARIANT_CC\] - #... - [ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+NOTYPE[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+nocc_global_hidden_def - #... - [ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+IFUNC[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+nocc_global_hidden_ifunc - #... --[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+IFUNC[ ]+LOCAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_global_hidden_ifunc -+[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+IFUNC[ ]+LOCAL[ ]+DEFAULT[ ]+1[ ]+cc_global_hidden_ifunc[ ]+\[VARIANT_CC\] - #... - [ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+UND[ ]+nocc_global_default_undef - #... --[ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+UND[ ]+cc_global_default_undef -+[ ]+[0-9a-f]+:[ ]+0+0000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+UND[ ]+cc_global_default_undef[ ]+\[VARIANT_CC\] - #... --[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+IFUNC[ ]+GLOBAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_global_default_ifunc -+[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+IFUNC[ ]+GLOBAL[ ]+DEFAULT[ ]+1[ ]+cc_global_default_ifunc[ ]+\[VARIANT_CC\] - #... - [ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+IFUNC[ ]+GLOBAL[ ]+DEFAULT[ ]+1[ ]+nocc_global_default_ifunc - #... --[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+\[VARIANT_CC\][ ]+1[ ]+cc_global_default_def -+[ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+1[ ]+cc_global_default_def[ ]+\[VARIANT_CC\] - #... - [ ]+[0-9a-f]+:[ ]+0+8000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+1[ ]+nocc_global_default_def - #... -diff -rup binutils.orig/ld/testsuite/ld-elf/dwarf.exp binutils-2.40/ld/testsuite/ld-elf/dwarf.exp ---- binutils.orig/ld/testsuite/ld-elf/dwarf.exp 2023-02-16 10:11:38.515875516 +0000 -+++ binutils-2.40/ld/testsuite/ld-elf/dwarf.exp 2023-02-16 11:08:52.209377332 +0000 -@@ -29,6 +29,10 @@ if ![is_elf_format] { + # Now try linking a C++ program with global constructors and +--- binutils.orig/ld/testsuite/ld-vsb/vsb.exp 2023-08-15 14:30:13.329890943 +0100 ++++ binutils-2.41/ld/testsuite/ld-vsb/vsb.exp 2023-08-15 15:03:41.018080699 +0100 +@@ -29,6 +29,10 @@ if { ![check_compiler_available] } { return } -+if { [istarget riscv*-*-*] } then { ++if { [istarget "i686-*-*"] } { + return +} + - # Skip targets where -shared is not supported + # This test can only be run on a couple of ELF platforms or with + # XCOFF formats. + # Square bracket expressions seem to confuse istarget. +diff -rup binutils.orig/ld/testsuite/ld-powerpc/powerpc.exp binutils-2.41/ld/testsuite/ld-powerpc/powerpc.exp +--- binutils.orig/ld/testsuite/ld-powerpc/powerpc.exp 2023-08-15 15:04:24.106167010 +0100 ++++ binutils-2.41/ld/testsuite/ld-powerpc/powerpc.exp 2023-08-15 15:59:51.422385730 +0100 +@@ -177,6 +177,8 @@ if [istarget "powerpc*le*-*-*"] then { - if ![check_shared_lib_support] { -diff -rup binutils.orig/ld/testsuite/ld-elf/tls.exp binutils-2.40/ld/testsuite/ld-elf/tls.exp ---- binutils.orig/ld/testsuite/ld-elf/tls.exp 2023-02-16 10:11:38.540875476 +0000 -+++ binutils-2.40/ld/testsuite/ld-elf/tls.exp 2023-02-16 11:08:56.944369374 +0000 -@@ -28,6 +28,10 @@ if { !([istarget *-*-linux*] - return - } + run_ld_link_tests $ppcelftests + ++return ++ + if [ supports_ppc64 ] then { + run_ld_link_tests $ppc64elftests + run_dump_test "relbrlt" +diff -rup binutils.orig/ld/testsuite/ld-powerpc/tls.d binutils-2.41/ld/testsuite/ld-powerpc/tls.d +--- binutils.orig/ld/testsuite/ld-powerpc/tls.d 2023-08-15 15:04:24.100166998 +0100 ++++ binutils-2.41/ld/testsuite/ld-powerpc/tls.d 2023-08-15 15:59:07.422314417 +0100 +@@ -9,7 +9,7 @@ + + Disassembly of section \.text: + +-0+100000e8 <\._start>: ++0+100..... <\._start>: + .*: (60 00 00 00|00 00 00 60) nop + .*: (38 6d 90 78|78 90 6d 38) addi r3,r13,-28552 + .*: (60 00 00 00|00 00 00 60) nop +@@ -49,5 +49,5 @@ Disassembly of section \.text: + .*: (60 00 00 00|00 00 00 60) nop + .*: (a9 4d 90 30|30 90 4d a9) lha r10,-28624\(r13\) + +-0+10000180 <\.__tls_get_addr>: ++0+100..... <\.__tls_get_addr>: + .*: (4e 80 00 20|20 00 80 4e) blr +diff -rup binutils.orig/ld/testsuite/ld-powerpc/tls32.g binutils-2.41/ld/testsuite/ld-powerpc/tls32.g +--- binutils.orig/ld/testsuite/ld-powerpc/tls32.g 2023-08-15 15:04:24.100166998 +0100 ++++ binutils-2.41/ld/testsuite/ld-powerpc/tls32.g 2023-08-15 15:56:33.167064455 +0100 +@@ -8,4 +8,4 @@ + .* + + Contents of section \.got: +- 1810144 00000000 00000000 00000000 .* ++ 18..... 00000000 00000000 00000000 .* +diff -rup binutils.orig/ld/testsuite/ld-powerpc/tls32no.d binutils-2.41/ld/testsuite/ld-powerpc/tls32no.d +--- binutils.orig/ld/testsuite/ld-powerpc/tls32no.d 2023-08-15 15:04:24.100166998 +0100 ++++ binutils-2.41/ld/testsuite/ld-powerpc/tls32no.d 2023-08-15 15:58:02.959209959 +0100 +@@ -9,11 +9,11 @@ + + Disassembly of section \.text: + +-0+18000a0 <_start>: ++0+18..... <_start>: + .*: (42 9f 00 05|05 00 9f 42) bcl .* + .*: (7f c8 02 a6|a6 02 c8 7f) mflr r30 + .*: (3f de 00 02|02 00 de 3f) addis r30,r30,2 +-.*: (3b de 80 a0|a0 80 de 3b) addi r30,r30,-32608 ++.*: (3b de 80 a0|.. 80 de 3b) addi r30,r30,-[0-9]+ + .*: (38 7f ff e4|e4 ff 7f 38) addi r3,r31,-28 + .*: (48 00 00 6d|6d 00 00 48) bl .* + .*: (38 7f ff f8|f8 ff 7f 38) addi r3,r31,-8 +@@ -43,5 +43,5 @@ Disassembly of section \.text: + .*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0 + .*: (a9 49 90 18|18 90 49 a9) lha r10,-28648\(r9\) + +-0+1800120 <__tls_get_addr>: ++0+18..... <__tls_get_addr>: + .*: (4e 80 00 20|20 00 80 4e) blr +--- binutils.orig/ld/testsuite/ld-elf/linux-x86.exp 2023-08-15 15:04:23.995166788 +0100 ++++ binutils-2.41/ld/testsuite/ld-elf/linux-x86.exp 2023-08-15 16:03:11.615710200 +0100 +@@ -73,6 +73,10 @@ run_ld_link_tests [list \ + ] \ + ] -+if { [istarget riscv*-*-*] } then { ++if { [istarget "i686-*-*"] } { + return +} + - # Check to see if the C compiler works. - if { ![check_compiler_available] } { - return ---- binutils.orig/binutils/testsuite/lib/binutils-common.exp 2023-06-21 09:46:50.861865196 +0100 -+++ binutils-2.40/binutils/testsuite/lib/binutils-common.exp 2023-06-21 09:47:24.240856913 +0100 -@@ -641,6 +641,8 @@ proc prune_warnings_extra { text } { - regsub -all "(^|\n)(\[^\n\]*: NOTE: This behaviour is deprecated\[^\n\]*\n?)+" $text "\\1" text - regsub -all "(^|\n)(\[^\n\]*: warning:\[^\n\]*has a LOAD segment with RWX permissions\[^\n\]*\n?)+" $text "\\1" text - regsub -all "(^|\n)(\[^\n\]*: warning:\[^\n\]*has a TLS segment with execute permission\[^\n\]*\n?)+" $text "\\1" text -+ # Configuring with --enable-warn-execstack=yes will generate warnings if -z execstack is used. -+ regsub -all "(^|\n)(\[^\n\]*: warning: enabling an executable stack because of -z execstack command line option\[^\n\]*\n?)+" $text "\\1" text - return $text - } + run_cc_link_tests [list \ + [list \ + "Build indirect-extern-access-1.so" \ +@@ -152,10 +156,6 @@ run_cc_link_tests [list \ + ] \ + ] -diff -rup binutils-2.40/ld/testsuite/ld-elf/elf.exp binutils.new/ld/testsuite/ld-elf/elf.exp ---- binutils-2.40/ld/testsuite/ld-elf/elf.exp 2023-01-14 00:00:00.000000000 +0000 -+++ binutils.new/ld/testsuite/ld-elf/elf.exp 2023-06-21 09:31:08.856233444 +0100 -@@ -180,6 +180,21 @@ if { [check_gc_sections_available] && ![ - } +-if { [istarget "i686-*-*"] } { +- return +-} +- + run_ld_link_exec_tests [list \ + [list \ + "Run indirect-extern-access-1a without PIE" \ +diff -rup binutils.orig/ld/testsuite/ld-powerpc/tls32.t binutils-2.41/ld/testsuite/ld-powerpc/tls32.t +--- binutils.orig/ld/testsuite/ld-powerpc/tls32.t 2023-08-15 16:48:58.540653339 +0100 ++++ binutils-2.41/ld/testsuite/ld-powerpc/tls32.t 2023-08-15 16:49:34.611717013 +0100 +@@ -8,5 +8,5 @@ + .* - proc target_defaults_to_execstack {} { -+ global base_dir + Contents of section \.tdata: +- 1810124 (12345678|78563412) (23456789|89674523) (3456789a|9a785634) (456789ab|ab896745) .* +- 1810134 (56789abc|bc9a7856) (6789abcd|cdab8967) (789abcde|debc9a78) (00c0ffee|eeffc000) .* ++#pass + -+ # If the linker has been configured with --enable-default-execstack=no then -+ # this proc should always return 0. -+ if { [file exists $base_dir/config.status] } { -+ set status [remote_exec host grep "enable-default-execstack=no" $base_dir/config.status] -+ if { [lindex $status 0] == 0 } { -+ return 0 -+ } else { -+ verbose -log "$base_dir/config.status does not contain enable-default-execstack=no" -+ } -+ } else { -+ verbose -log "there is no file $base_dir/config.status" -+ } -+ - if { [istarget "aarch64*-*-*"] - || [istarget "arc*-*-*"] - || [istarget "cris*-*-*"] +diff -rup binutils.orig/ld/testsuite/ld-powerpc/tls32no.g binutils-2.41/ld/testsuite/ld-powerpc/tls32no.g +--- binutils.orig/ld/testsuite/ld-powerpc/tls32no.g 2023-08-15 17:41:46.719412912 +0100 ++++ binutils-2.41/ld/testsuite/ld-powerpc/tls32no.g 2023-08-15 17:42:37.097511729 +0100 +@@ -8,6 +8,4 @@ + .* + + Contents of section \.got: +- 1810144 (0+01 f+8000 0+01 f+803c|010+ 0080f+ 010+ 3c80f+) .* +- 1810154 (0+01 f+8020 f+9030 0+01|010+ 2080f+ 3090f+ 010+) .* +- 1810164 0+ 0+ 0+ 0+0 .* ++#pass diff --git a/0020-binutils-reloc-symtab.patch b/0020-binutils-reloc-symtab.patch index d2173063334c66f0af024cd94965c54f6c150d41..131fd2c2ffa209851459c9fd7a7664d4b8db42ea 100644 --- a/0020-binutils-reloc-symtab.patch +++ b/0020-binutils-reloc-symtab.patch @@ -1,45 +1,6 @@ ---- binutils.orig/bfd/elf.c 2023-03-30 10:01:40.824181703 +0100 -+++ binutils-2.40/bfd/elf.c 2023-03-30 10:02:23.103135337 +0100 -@@ -3877,21 +3877,23 @@ assign_section_numbers (bfd *abfd, struc - { - case SHT_REL: - case SHT_RELA: -- /* A reloc section which we are treating as a normal BFD -- section. sh_link is the section index of the symbol -- table. sh_info is the section index of the section to -- which the relocation entries apply. We assume that an -- allocated reloc section uses the dynamic symbol table -- if there is one. Otherwise we guess the normal symbol -- table. FIXME: How can we be sure? */ -- if (d->this_hdr.sh_link == 0 && (sec->flags & SEC_ALLOC) != 0) -+ /* sh_link is the section index of the symbol table. -+ sh_info is the section index of the section to which the -+ relocation entries apply. */ -+ if (d->this_hdr.sh_link == 0) - { -- s = bfd_get_section_by_name (abfd, ".dynsym"); -- if (s != NULL) -- d->this_hdr.sh_link = elf_section_data (s)->this_idx; -+ /* FIXME maybe: If this is a reloc section which we are -+ treating as a normal section then we likely should -+ not be assuming its sh_link is .dynsym or .symtab. */ -+ if ((sec->flags & SEC_ALLOC) != 0) -+ { -+ s = bfd_get_section_by_name (abfd, ".dynsym"); -+ if (s != NULL) -+ d->this_hdr.sh_link = elf_section_data (s)->this_idx; -+ } -+ else -+ d->this_hdr.sh_link = elf_onesymtab (abfd); - } -- if (d->this_hdr.sh_link == 0) -- d->this_hdr.sh_link = elf_onesymtab (abfd); - - s = elf_get_reloc_section (sec); - if (s != NULL) --- binutils.orig/binutils/objcopy.c 2023-03-30 10:01:41.063181441 +0100 -+++ binutils-2.40/binutils/objcopy.c 2023-03-30 12:25:41.439108276 +0100 -@@ -2256,7 +2256,7 @@ merge_gnu_build_notes (bfd * ab ++++ binutils-2.41/binutils/objcopy.c 2023-03-30 12:25:41.439108276 +0100 +@@ -2270,7 +2270,7 @@ merge_gnu_build_notes (bfd * ab { if (pnote->note.namedata[4] == '2') ++ version_2_seen; diff --git a/0021-binutils-CVE-2023-1972.patch b/0021-binutils-CVE-2023-1972.patch deleted file mode 100644 index dd637fcd84c9bc4323d72e1c0c0237c5af5145d5..0000000000000000000000000000000000000000 --- a/0021-binutils-CVE-2023-1972.patch +++ /dev/null @@ -1,20 +0,0 @@ ---- binutils.orig/bfd/elf.c 2023-04-17 16:26:08.720347439 +0100 -+++ binutils-2.40/bfd/elf.c 2023-04-17 16:28:03.286317601 +0100 -@@ -9050,6 +9050,8 @@ _bfd_elf_slurp_version_tables (bfd *abfd - bfd_set_error (bfd_error_file_too_big); - goto error_return_verdef; - } -+ if (amt == 0) -+ goto error_return_verdef; - elf_tdata (abfd)->verdef = (Elf_Internal_Verdef *) bfd_zalloc (abfd, amt); - if (elf_tdata (abfd)->verdef == NULL) - goto error_return_verdef; -@@ -9153,6 +9155,8 @@ _bfd_elf_slurp_version_tables (bfd *abfd - bfd_set_error (bfd_error_file_too_big); - goto error_return; - } -+ if (amt == 0) -+ goto error_return; - elf_tdata (abfd)->verdef = (Elf_Internal_Verdef *) bfd_zalloc (abfd, amt); - if (elf_tdata (abfd)->verdef == NULL) - goto error_return; diff --git a/0023-LoongArch-Add-lsx-and-lasx-instructions-support.patch b/0023-LoongArch-Add-lsx-and-lasx-instructions-support.patch deleted file mode 100644 index f0f45189ec0d084864639a2b71176290d3451986..0000000000000000000000000000000000000000 --- a/0023-LoongArch-Add-lsx-and-lasx-instructions-support.patch +++ /dev/null @@ -1,12028 +0,0 @@ -From cb340e94b57a24252998019dfb29dc948dcfa6fb Mon Sep 17 00:00:00 2001 -From: Peng Fan -Date: Thu, 2 Nov 2023 16:53:30 +0800 -Subject: [PATCH] LoongArch: Add lsx and lasx instructions support. Add - relaxation support. Fix-up from upstream up to - 85ad846e722b01603d4a7f6348d95f3b026e75eb - -Signed-off-by: Peng Fan ---- - bfd/bfd-in2.h | 9 + - bfd/elf32-csky.c | 3 +- - bfd/elf32-rl78.c | 98 +- - bfd/elfnn-loongarch.c | 713 ++++++- - bfd/elfxx-loongarch.c | 701 ++++-- - bfd/elfxx-loongarch.h | 12 +- - bfd/libbfd.h | 9 + - bfd/reloc.c | 25 + - binutils/readelf.c | 116 +- - binutils/testsuite/binutils-all/readelf.exp | 13 +- - gas/compress-debug.c | 2 +- - gas/config/tc-loongarch.c | 695 +++++- - gas/config/tc-loongarch.h | 63 +- - gas/testsuite/gas/all/align.d | 5 +- - gas/testsuite/gas/all/gas.exp | 10 +- - gas/testsuite/gas/all/relax.d | 4 + - gas/testsuite/gas/elf/dwarf-5-irp.d | 3 +- - gas/testsuite/gas/elf/dwarf-5-loc0.d | 3 +- - gas/testsuite/gas/elf/dwarf-5-macro-include.d | 2 +- - gas/testsuite/gas/elf/dwarf-5-macro.d | 2 +- - gas/testsuite/gas/elf/dwarf2-11.d | 3 +- - gas/testsuite/gas/elf/dwarf2-15.d | 3 +- - gas/testsuite/gas/elf/dwarf2-16.d | 3 +- - gas/testsuite/gas/elf/dwarf2-17.d | 3 +- - gas/testsuite/gas/elf/dwarf2-18.d | 3 +- - gas/testsuite/gas/elf/dwarf2-19.d | 3 +- - gas/testsuite/gas/elf/dwarf2-5.d | 3 +- - gas/testsuite/gas/elf/ehopt0.d | 3 + - gas/testsuite/gas/elf/elf.exp | 3 + - gas/testsuite/gas/elf/section11.d | 4 +- - gas/testsuite/gas/lns/lns.exp | 1 + - gas/testsuite/gas/loongarch/64_pcrel.d | 11 + - gas/testsuite/gas/loongarch/64_pcrel.s | 2 + - .../gas/loongarch/deprecated_reg_aliases.d | 18 + - .../gas/loongarch/deprecated_reg_aliases.l | 7 + - .../gas/loongarch/deprecated_reg_aliases.s | 5 + - gas/testsuite/gas/loongarch/float_op.d | 4 +- - gas/testsuite/gas/loongarch/float_op.s | 4 +- - gas/testsuite/gas/loongarch/imm_ins.d | 84 +- - gas/testsuite/gas/loongarch/imm_ins_32.d | 54 +- - gas/testsuite/gas/loongarch/imm_op.d | 44 +- - gas/testsuite/gas/loongarch/jmp_op.d | 65 +- - .../gas/loongarch/la_branch_relax_1.d | 64 + - .../gas/loongarch/la_branch_relax_1.s | 33 + - .../gas/loongarch/la_branch_relax_2.d | 40 + - .../gas/loongarch/la_branch_relax_2.s | 23 + - gas/testsuite/gas/loongarch/li.d | 16 +- - gas/testsuite/gas/loongarch/load_store_op.d | 80 +- - gas/testsuite/gas/loongarch/lvz-lbt.d | 191 ++ - gas/testsuite/gas/loongarch/lvz-lbt.s | 181 ++ - gas/testsuite/gas/loongarch/macro_op.d | 68 +- - gas/testsuite/gas/loongarch/macro_op_32.d | 42 +- - .../gas/loongarch/macro_op_large_abs.d | 138 +- - .../gas/loongarch/macro_op_large_pc.d | 138 +- - gas/testsuite/gas/loongarch/nop.d | 2 +- - gas/testsuite/gas/loongarch/privilege_op.d | 8 +- - gas/testsuite/gas/loongarch/raw-insn.d | 11 + - gas/testsuite/gas/loongarch/raw-insn.s | 7 + - gas/testsuite/gas/loongarch/relax_align.d | 26 + - gas/testsuite/gas/loongarch/relax_align.s | 5 + - gas/testsuite/gas/loongarch/reloc.d | 2 +- - gas/testsuite/gas/loongarch/uleb128.d | 36 + - gas/testsuite/gas/loongarch/uleb128.s | 20 + - gas/testsuite/gas/loongarch/vector.d | 1461 +++++++++++++ - gas/testsuite/gas/loongarch/vector.s | 1451 +++++++++++++ - include/elf/loongarch.h | 22 + - include/longlong.h | 12 + - include/opcode/loongarch.h | 34 +- - include/vtv-change-permission.h | 4 + - include/xtensa-dynconfig.h | 2 - - ld/emultempl/loongarchelf.em | 3 + - ld/testsuite/ld-elf/compressed1d.d | 3 + - ld/testsuite/ld-elf/pr26936.d | 4 +- - ld/testsuite/ld-elf/shared.exp | 3 +- - ld/testsuite/ld-loongarch-elf/64_pcrel.d | 4 + - ld/testsuite/ld-loongarch-elf/64_pcrel.s | 11 + - ld/testsuite/ld-loongarch-elf/disas-jirl-32.d | 2 + - ld/testsuite/ld-loongarch-elf/disas-jirl.d | 4 +- - ld/testsuite/ld-loongarch-elf/jmp_op.d | 67 +- - .../ld-loongarch-elf/ld-loongarch-elf.exp | 16 + - .../ld-loongarch-elf/local-ifunc-reloc.d | 2 +- - ld/testsuite/ld-loongarch-elf/macro_op.d | 162 +- - ld/testsuite/ld-loongarch-elf/macro_op_32.d | 42 +- - ld/testsuite/ld-loongarch-elf/relax-align.dd | 7 + - ld/testsuite/ld-loongarch-elf/relax-align.s | 9 + - ld/testsuite/ld-loongarch-elf/relax.exp | 77 + - ld/testsuite/ld-loongarch-elf/relax.s | 16 + - ld/testsuite/ld-loongarch-elf/uleb128.dd | 10 + - ld/testsuite/ld-loongarch-elf/uleb128.s | 21 + - opcodes/disassemble.c | 5 + - opcodes/loongarch-dis.c | 125 +- - opcodes/loongarch-opc.c | 1876 ++++++++++++++++- - 92 files changed, 8283 insertions(+), 1121 deletions(-) - create mode 100644 gas/testsuite/gas/loongarch/64_pcrel.d - create mode 100644 gas/testsuite/gas/loongarch/64_pcrel.s - create mode 100644 gas/testsuite/gas/loongarch/deprecated_reg_aliases.d - create mode 100644 gas/testsuite/gas/loongarch/deprecated_reg_aliases.l - create mode 100644 gas/testsuite/gas/loongarch/deprecated_reg_aliases.s - create mode 100644 gas/testsuite/gas/loongarch/la_branch_relax_1.d - create mode 100644 gas/testsuite/gas/loongarch/la_branch_relax_1.s - create mode 100644 gas/testsuite/gas/loongarch/la_branch_relax_2.d - create mode 100644 gas/testsuite/gas/loongarch/la_branch_relax_2.s - create mode 100644 gas/testsuite/gas/loongarch/lvz-lbt.d - create mode 100644 gas/testsuite/gas/loongarch/lvz-lbt.s - create mode 100644 gas/testsuite/gas/loongarch/raw-insn.d - create mode 100644 gas/testsuite/gas/loongarch/raw-insn.s - create mode 100644 gas/testsuite/gas/loongarch/relax_align.d - create mode 100644 gas/testsuite/gas/loongarch/relax_align.s - create mode 100644 gas/testsuite/gas/loongarch/uleb128.d - create mode 100644 gas/testsuite/gas/loongarch/uleb128.s - create mode 100644 gas/testsuite/gas/loongarch/vector.d - create mode 100644 gas/testsuite/gas/loongarch/vector.s - create mode 100644 ld/testsuite/ld-loongarch-elf/64_pcrel.d - create mode 100644 ld/testsuite/ld-loongarch-elf/64_pcrel.s - create mode 100644 ld/testsuite/ld-loongarch-elf/relax-align.dd - create mode 100644 ld/testsuite/ld-loongarch-elf/relax-align.s - create mode 100644 ld/testsuite/ld-loongarch-elf/relax.exp - create mode 100644 ld/testsuite/ld-loongarch-elf/relax.s - create mode 100644 ld/testsuite/ld-loongarch-elf/uleb128.dd - create mode 100644 ld/testsuite/ld-loongarch-elf/uleb128.s - -diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h -index 9a3f6a8..522ae85 100644 ---- a/bfd/bfd-in2.h -+++ b/bfd/bfd-in2.h -@@ -6272,6 +6272,15 @@ assembler and not (currently) written to any object files. */ - BFD_RELOC_LARCH_TLS_GD_HI20, - BFD_RELOC_LARCH_32_PCREL, - BFD_RELOC_LARCH_RELAX, -+ BFD_RELOC_LARCH_DELETE, -+ BFD_RELOC_LARCH_ALIGN, -+ BFD_RELOC_LARCH_PCREL20_S2, -+ BFD_RELOC_LARCH_CFA, -+ BFD_RELOC_LARCH_ADD6, -+ BFD_RELOC_LARCH_SUB6, -+ BFD_RELOC_LARCH_ADD_ULEB128, -+ BFD_RELOC_LARCH_SUB_ULEB128, -+ BFD_RELOC_LARCH_64_PCREL, - BFD_RELOC_UNUSED }; - - typedef enum bfd_reloc_code_real bfd_reloc_code_real_type; -diff --git a/bfd/elf32-csky.c b/bfd/elf32-csky.c -index 7e03a3b..3e8503e 100644 ---- a/bfd/elf32-csky.c -+++ b/bfd/elf32-csky.c -@@ -1942,8 +1942,7 @@ csky_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, - { - struct elf_dyn_relocs *p; - -- for (p = *((struct elf_dyn_relocs **) -- &elf_section_data (s)->local_dynrel); -+ for (p = elf_section_data (s)->local_dynrel; - p != NULL; - p = p->next) - { -diff --git a/bfd/elf32-rl78.c b/bfd/elf32-rl78.c -index 6adc495..6ff1c3d 100644 ---- a/bfd/elf32-rl78.c -+++ b/bfd/elf32-rl78.c -@@ -396,18 +396,18 @@ rl78_compute_complex_reloc (unsigned long r_type, - { - int32_t tmp1, tmp2; - bfd_vma relocation = 0; -- bfd_reloc_status_type stat = bfd_reloc_ok; -+ bfd_reloc_status_type status = bfd_reloc_ok; - - switch (r_type) - { - default: -- stat = bfd_reloc_notsupported; -+ status = bfd_reloc_notsupported; - break; - - case R_RL78_ABS24S_PCREL: - case R_RL78_ABS16S_PCREL: - case R_RL78_ABS8S_PCREL: -- relocation = rl78_stack_pop (&stat); -+ relocation = rl78_stack_pop (&status); - relocation -= input_section->output_section->vma + input_section->output_offset; - break; - -@@ -420,141 +420,141 @@ rl78_compute_complex_reloc (unsigned long r_type, - case R_RL78_ABS8: - case R_RL78_ABS8U: - case R_RL78_ABS8S: -- relocation = rl78_stack_pop (&stat); -+ relocation = rl78_stack_pop (&status); - break; - - case R_RL78_ABS16UL: - case R_RL78_ABS8UL: -- relocation = rl78_stack_pop (&stat) >> 2; -+ relocation = rl78_stack_pop (&status) >> 2; - break;; - - case R_RL78_ABS16UW: - case R_RL78_ABS8UW: -- relocation = rl78_stack_pop (&stat) >> 1; -+ relocation = rl78_stack_pop (&status) >> 1; - break; - - /* The rest of the relocs compute values and then push them onto the stack. */ - case R_RL78_OPramtop: - case R_RL78_OPromtop: - case R_RL78_SYM: -- rl78_stack_push (symval, &stat); -+ rl78_stack_push (symval, &status); - break; - - case R_RL78_OPneg: -- tmp1 = rl78_stack_pop (&stat); -+ tmp1 = rl78_stack_pop (&status); - tmp1 = - tmp1; -- rl78_stack_push (tmp1, &stat); -+ rl78_stack_push (tmp1, &status); - break; - - case R_RL78_OPadd: -- tmp2 = rl78_stack_pop (&stat); -- tmp1 = rl78_stack_pop (&stat); -+ tmp2 = rl78_stack_pop (&status); -+ tmp1 = rl78_stack_pop (&status); - tmp1 += tmp2; -- rl78_stack_push (tmp1, &stat); -+ rl78_stack_push (tmp1, &status); - break; - - case R_RL78_OPsub: - /* For the expression "A - B", the assembler pushes A, - then B, then OPSUB. So the first op we pop is B, not A. */ -- tmp2 = rl78_stack_pop (&stat); /* B */ -- tmp1 = rl78_stack_pop (&stat); /* A */ -+ tmp2 = rl78_stack_pop (&status); /* B */ -+ tmp1 = rl78_stack_pop (&status); /* A */ - tmp1 -= tmp2; /* A - B */ -- rl78_stack_push (tmp1, &stat); -+ rl78_stack_push (tmp1, &status); - break; - - case R_RL78_OPmul: -- tmp2 = rl78_stack_pop (&stat); -- tmp1 = rl78_stack_pop (&stat); -+ tmp2 = rl78_stack_pop (&status); -+ tmp1 = rl78_stack_pop (&status); - tmp1 *= tmp2; -- rl78_stack_push (tmp1, &stat); -+ rl78_stack_push (tmp1, &status); - break; - - case R_RL78_OPdiv: -- tmp2 = rl78_stack_pop (&stat); -- tmp1 = rl78_stack_pop (&stat); -+ tmp2 = rl78_stack_pop (&status); -+ tmp1 = rl78_stack_pop (&status); - if (tmp2 != 0) - tmp1 /= tmp2; - else - { - tmp1 = 0; -- stat = bfd_reloc_overflow; -+ status = bfd_reloc_overflow; - } -- rl78_stack_push (tmp1, &stat); -+ rl78_stack_push (tmp1, &status); - break; - - case R_RL78_OPshla: -- tmp2 = rl78_stack_pop (&stat); -- tmp1 = rl78_stack_pop (&stat); -+ tmp2 = rl78_stack_pop (&status); -+ tmp1 = rl78_stack_pop (&status); - tmp1 <<= tmp2; -- rl78_stack_push (tmp1, &stat); -+ rl78_stack_push (tmp1, &status); - break; - - case R_RL78_OPshra: -- tmp2 = rl78_stack_pop (&stat); -- tmp1 = rl78_stack_pop (&stat); -+ tmp2 = rl78_stack_pop (&status); -+ tmp1 = rl78_stack_pop (&status); - tmp1 >>= tmp2; -- rl78_stack_push (tmp1, &stat); -+ rl78_stack_push (tmp1, &status); - break; - - case R_RL78_OPsctsize: -- rl78_stack_push (input_section->size, &stat); -+ rl78_stack_push (input_section->size, &status); - break; - - case R_RL78_OPscttop: -- rl78_stack_push (input_section->output_section->vma, &stat); -+ rl78_stack_push (input_section->output_section->vma, &status); - break; - - case R_RL78_OPand: -- tmp2 = rl78_stack_pop (&stat); -- tmp1 = rl78_stack_pop (&stat); -+ tmp2 = rl78_stack_pop (&status); -+ tmp1 = rl78_stack_pop (&status); - tmp1 &= tmp2; -- rl78_stack_push (tmp1, &stat); -+ rl78_stack_push (tmp1, &status); - break; - - case R_RL78_OPor: -- tmp2 = rl78_stack_pop (&stat); -- tmp1 = rl78_stack_pop (&stat); -+ tmp2 = rl78_stack_pop (&status); -+ tmp1 = rl78_stack_pop (&status); - tmp1 |= tmp2; -- rl78_stack_push (tmp1, &stat); -+ rl78_stack_push (tmp1, &status); - break; - - case R_RL78_OPxor: -- tmp2 = rl78_stack_pop (&stat); -- tmp1 = rl78_stack_pop (&stat); -+ tmp2 = rl78_stack_pop (&status); -+ tmp1 = rl78_stack_pop (&status); - tmp1 ^= tmp2; -- rl78_stack_push (tmp1, &stat); -+ rl78_stack_push (tmp1, &status); - break; - - case R_RL78_OPnot: -- tmp1 = rl78_stack_pop (&stat); -+ tmp1 = rl78_stack_pop (&status); - tmp1 = ~ tmp1; -- rl78_stack_push (tmp1, &stat); -+ rl78_stack_push (tmp1, &status); - break; - - case R_RL78_OPmod: -- tmp2 = rl78_stack_pop (&stat); -- tmp1 = rl78_stack_pop (&stat); -+ tmp2 = rl78_stack_pop (&status); -+ tmp1 = rl78_stack_pop (&status); - if (tmp2 != 0) - tmp1 %= tmp2; - else - { - tmp1 = 0; -- stat = bfd_reloc_overflow; -+ status = bfd_reloc_overflow; - } -- rl78_stack_push (tmp1, &stat); -+ rl78_stack_push (tmp1, &status); - break; - } - - if (r) - { -- if (stat == bfd_reloc_dangerous) -+ if (status == bfd_reloc_dangerous) - *error_message = (_("RL78 reloc stack overflow/underflow")); -- else if (stat == bfd_reloc_overflow) -+ else if (status == bfd_reloc_overflow) - { -- stat = bfd_reloc_dangerous; -+ status = bfd_reloc_dangerous; - *error_message = (_("RL78 reloc divide by zero")); - } -- *r = stat; -+ *r = status; - } - return relocation; - } -diff --git a/bfd/elfnn-loongarch.c b/bfd/elfnn-loongarch.c -index b0f9b6e..18ad3cc 100644 ---- a/bfd/elfnn-loongarch.c -+++ b/bfd/elfnn-loongarch.c -@@ -27,6 +27,7 @@ - #include "objalloc.h" - #include "elf/loongarch.h" - #include "elfxx-loongarch.h" -+#include "opcode/loongarch.h" - - static bool - loongarch_info_to_howto_rela (bfd *abfd, arelent *cache_ptr, -@@ -93,6 +94,10 @@ struct loongarch_elf_link_hash_table - - /* The max alignment of output sections. */ - bfd_vma max_alignment; -+ -+ /* The data segment phase, don't relax the section -+ when it is exp_seg_relro_adjust. */ -+ int *data_segment_phase; - }; - - /* Get the LoongArch ELF linker hash table from a link_info structure. */ -@@ -772,8 +777,8 @@ loongarch_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, - - break; - -- case R_LARCH_B21: - case R_LARCH_B16: -+ case R_LARCH_B21: - case R_LARCH_B26: - if (h != NULL) - { -@@ -972,15 +977,19 @@ loongarch_elf_adjust_dynamic_symbol (struct bfd_link_info *info, - - /* Make sure we know what is going on here. */ - BFD_ASSERT (dynobj != NULL -- && (h->needs_plt || h->type == STT_GNU_IFUNC || h->is_weakalias -- || (h->def_dynamic && h->ref_regular && !h->def_regular))); -+ && (h->needs_plt -+ || h->type == STT_GNU_IFUNC -+ || h->is_weakalias -+ || (h->def_dynamic -+ && h->ref_regular -+ && !h->def_regular))); - - /* If this is a function, put it in the procedure linkage table. We - will fill in the contents of the procedure linkage table later - (although we could actually do it here). */ - if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt) - { -- if (h->plt.refcount < 0 -+ if (h->plt.refcount <= 0 - || (h->type != STT_GNU_IFUNC - && (SYMBOL_REFERENCES_LOCAL (info, h) - || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT -@@ -993,8 +1002,6 @@ loongarch_elf_adjust_dynamic_symbol (struct bfd_link_info *info, - h->plt.offset = MINUS_ONE; - h->needs_plt = 0; - } -- else -- h->needs_plt = 1; - - return true; - } -@@ -1531,7 +1538,7 @@ elfNN_allocate_ifunc_dynrelocs (struct elf_link_hash_entry *h, void *inf) - /* Allocate space in .plt, .got and associated reloc sections for - ifunc dynamic relocs. */ - --static bool -+static int - elfNN_allocate_local_ifunc_dynrelocs (void **slot, void *inf) - { - struct elf_link_hash_entry *h = (struct elf_link_hash_entry *) *slot; -@@ -1693,7 +1700,7 @@ loongarch_elf_size_dynamic_sections (bfd *output_bfd, - - /* Allocate .plt and .got entries, and space for local ifunc symbols. */ - htab_traverse (htab->loc_hash_table, -- (void *) elfNN_allocate_local_ifunc_dynrelocs, info); -+ elfNN_allocate_local_ifunc_dynrelocs, info); - - /* Don't allocate .got.plt section if there are no PLT. */ - if (htab->elf.sgotplt && htab->elf.sgotplt->size == GOTPLT_HEADER_SIZE -@@ -1886,7 +1893,7 @@ loongarch_reloc_rewrite_imm_insn (const Elf_Internal_Rela *rel, - int bits = bfd_get_reloc_size (howto) * 8; - uint32_t insn = bfd_get (bits, input_bfd, contents + rel->r_offset); - -- if (!loongarch_adjust_reloc_bitsfield(howto, &reloc_val)) -+ if (!loongarch_adjust_reloc_bitsfield (input_bfd, howto, &reloc_val)) - return bfd_reloc_overflow; - - insn = (insn & (uint32_t)howto->src_mask) -@@ -2006,42 +2013,74 @@ perform_relocation (const Elf_Internal_Rela *rel, asection *input_section, - bfd_put (bits, input_bfd, value, contents + rel->r_offset); - break; - -+ /* LoongArch only has add/sub reloc pair, not has set/sub reloc pair. -+ Because set/sub reloc pair not support multi-thread. While add/sub -+ reloc pair process order not affect the final result. -+ -+ For add/sub reloc, the original value will be involved in the -+ calculation. In order not to add/sub extra value, we write 0 to symbol -+ address at assembly time. -+ -+ add/sub reloc bits determined by the value after symbol subtraction, -+ not symbol value. -+ -+ add/sub reloc save part of the symbol value, so we only need to -+ save howto->dst_mask bits. */ -+ case R_LARCH_ADD6: -+ case R_LARCH_SUB6: -+ { -+ bfd_vma word = bfd_get (howto->bitsize, input_bfd, -+ contents + rel->r_offset); -+ word = (word & ~howto->dst_mask) | (value & howto->dst_mask); -+ bfd_put (howto->bitsize, input_bfd, word, contents + rel->r_offset); -+ r = bfd_reloc_ok; -+ break; -+ } -+ -+ /* Not need to read the original value, just write the new value. */ - case R_LARCH_ADD8: - case R_LARCH_ADD16: - case R_LARCH_ADD24: - case R_LARCH_ADD32: - case R_LARCH_ADD64: -- r = loongarch_check_offset (rel, input_section); -- if (r != bfd_reloc_ok) -- break; -- -- opr1 = bfd_get (bits, input_bfd, contents + rel->r_offset); -- bfd_put (bits, input_bfd, opr1 + value, contents + rel->r_offset); -- break; -- - case R_LARCH_SUB8: - case R_LARCH_SUB16: - case R_LARCH_SUB24: - case R_LARCH_SUB32: - case R_LARCH_SUB64: -- r = loongarch_check_offset (rel, input_section); -- if (r != bfd_reloc_ok) -+ { -+ /* Because add/sub reloc is processed separately, -+ so the high bits is invalid. */ -+ bfd_vma word = value & howto->dst_mask; -+ bfd_put (howto->bitsize, input_bfd, word, contents + rel->r_offset); -+ r = bfd_reloc_ok; - break; -+ } - -- opr1 = bfd_get (bits, input_bfd, contents + rel->r_offset); -- bfd_put (bits, input_bfd, opr1 - value, contents + rel->r_offset); -- break; -+ case R_LARCH_ADD_ULEB128: -+ case R_LARCH_SUB_ULEB128: -+ { -+ unsigned int len = 0; -+ /* Before write uleb128, first read it to get it's length. */ -+ _bfd_read_unsigned_leb128 (input_bfd, contents + rel->r_offset, &len); -+ loongarch_write_unsigned_leb128 (contents + rel->r_offset, len, value); -+ r = bfd_reloc_ok; -+ break; -+ } - - /* For eh_frame and debug info. */ - case R_LARCH_32_PCREL: -- value -= sec_addr (input_section) + rel->r_offset; -- value += rel->r_addend; -- bfd_vma word = bfd_get (howto->bitsize, input_bfd, -- contents + rel->r_offset); -- word = (word & ~howto->dst_mask) | (value & howto->dst_mask); -- bfd_put (howto->bitsize, input_bfd, word, contents + rel->r_offset); -- r = bfd_reloc_ok; -- break; -+ case R_LARCH_64_PCREL: -+ { -+ value -= sec_addr (input_section) + rel->r_offset; -+ value += rel->r_addend; -+ bfd_vma word = bfd_get (howto->bitsize, input_bfd, -+ contents + rel->r_offset); -+ word = (word & ~howto->dst_mask) | (value & howto->dst_mask); -+ bfd_put (howto->bitsize, input_bfd, word, contents + rel->r_offset); -+ r = bfd_reloc_ok; -+ break; -+ } - - /* New reloc type. - R_LARCH_B16 ~ R_LARCH_TLS_GD_HI20. */ -@@ -2080,6 +2119,7 @@ perform_relocation (const Elf_Internal_Rela *rel, asection *input_section, - case R_LARCH_TLS_LD_HI20: - case R_LARCH_TLS_GD_PC_HI20: - case R_LARCH_TLS_GD_HI20: -+ case R_LARCH_PCREL20_S2: - r = loongarch_check_offset (rel, input_section); - if (r != bfd_reloc_ok) - break; -@@ -2244,26 +2284,65 @@ loongarch_reloc_is_fatal (struct bfd_link_info *info, - return fatal; - } - -+/* If lo12 immediate > 0x7ff, because sign-extend caused by addi.d/ld.d, -+ hi20 immediate need to add 0x1. -+ For example: pc 0x120000000, symbol 0x120000812 -+ lo12 immediate is 0x812, 0x120000812 & 0xfff = 0x812 -+ hi20 immediate is 1, because lo12 imm > 0x7ff, symbol need to add 0x1000 -+ (((0x120000812 + 0x1000) & ~0xfff) - (0x120000000 & ~0xfff)) >> 12 = 0x1 -+ -+ At run: -+ pcalau12i $t0, hi20 (0x1) -+ $t0 = 0x120000000 + (0x1 << 12) = 0x120001000 -+ addi.d $t0, $t0, lo12 (0x812) -+ $t0 = 0x120001000 + 0xfffffffffffff812 (-(0x1000 - 0x812) = -0x7ee) -+ = 0x120001000 - 0x7ee (0x1000 - 0x7ee = 0x812) -+ = 0x120000812 -+ Without hi20 add 0x1000, the result 0x120000000 - 0x7ee = 0x11ffff812 is -+ error. -+ 0x1000 + sign-extend-to64(0x8xx) = 0x8xx. */ - #define RELOCATE_CALC_PC32_HI20(relocation, pc) \ - ({ \ -- bfd_vma lo = (relocation) & ((bfd_vma)0xfff); \ -- pc = pc & (~(bfd_vma)0xfff); \ -- if (lo > 0x7ff) \ -- { \ -+ bfd_vma __lo = (relocation) & ((bfd_vma)0xfff); \ -+ relocation = (relocation & ~(bfd_vma)0xfff) \ -+ - (pc & ~(bfd_vma)0xfff); \ -+ if (__lo > 0x7ff) \ - relocation += 0x1000; \ -- } \ -- relocation &= ~(bfd_vma)0xfff; \ -- relocation -= pc; \ - }) - -+/* For example: pc is 0x11000010000100, symbol is 0x1812348ffff812 -+ offset = (0x1812348ffff812 & ~0xfff) - (0x11000010000100 & ~0xfff) -+ = 0x712347ffff000 -+ lo12: 0x1812348ffff812 & 0xfff = 0x812 -+ hi20: 0x7ffff + 0x1(lo12 > 0x7ff) = 0x80000 -+ lo20: 0x71234 - 0x1(lo12 > 0x7ff) + 0x1(hi20 > 0x7ffff) -+ hi12: 0x0 -+ -+ pcalau12i $t1, hi20 (0x80000) -+ $t1 = 0x11000010000100 + sign-extend(0x80000 << 12) -+ = 0x11000010000100 + 0xffffffff80000000 -+ = 0x10ffff90000000 -+ addi.d $t0, $zero, lo12 (0x812) -+ $t0 = 0xfffffffffffff812 (if lo12 > 0x7ff, because sign-extend, -+ lo20 need to sub 0x1) -+ lu32i.d $t0, lo20 (0x71234) -+ $t0 = {0x71234, 0xfffff812} -+ = 0x71234fffff812 -+ lu52i.d $t0, hi12 (0x0) -+ $t0 = {0x0, 0x71234fffff812} -+ = 0x71234fffff812 -+ add.d $t1, $t1, $t0 -+ $t1 = 0x10ffff90000000 + 0x71234fffff812 -+ = 0x1812348ffff812. */ - #define RELOCATE_CALC_PC64_HI32(relocation, pc) \ - ({ \ -- bfd_vma lo = (relocation) & ((bfd_vma)0xfff); \ -- if (lo > 0x7ff) \ -- { \ -- relocation -= 0x100000000; \ -- } \ -- relocation -= (pc & ~(bfd_vma)0xffffffff); \ -+ bfd_vma __lo = (relocation & (bfd_vma)0xfff); \ -+ relocation = (relocation & ~(bfd_vma)0xfff) \ -+ - (pc & ~(bfd_vma)0xfff); \ -+ if (__lo > 0x7ff) \ -+ relocation += (0x1000 - 0x100000000); \ -+ if (relocation & 0x80000000) \ -+ relocation += 0x100000000; \ - }) - - static int -@@ -2524,29 +2603,49 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, - relocation += rel->r_addend; - break; - -+ case R_LARCH_ADD6: - case R_LARCH_ADD8: - case R_LARCH_ADD16: - case R_LARCH_ADD24: - case R_LARCH_ADD32: - case R_LARCH_ADD64: -+ { -+ bfd_vma old_value = bfd_get (howto->bitsize, input_bfd, -+ contents + rel->r_offset); -+ relocation = old_value + relocation + rel->r_addend; -+ break; -+ } -+ -+ case R_LARCH_SUB6: - case R_LARCH_SUB8: - case R_LARCH_SUB16: - case R_LARCH_SUB24: - case R_LARCH_SUB32: - case R_LARCH_SUB64: -- if (resolved_dynly) -- fatal = (loongarch_reloc_is_fatal -- (info, input_bfd, input_section, rel, howto, -- bfd_reloc_undefined, is_undefweak, name, -- "Can't be resolved dynamically. " -- "If this procedure is hand-written assembly,\n" -- "there must be something like '.dword sym1 - sym2' " -- "to generate these relocs\n" -- "and we can't get known link-time address of " -- "these symbols.")); -- else -- relocation += rel->r_addend; -- break; -+ { -+ bfd_vma old_value = bfd_get (howto->bitsize, input_bfd, -+ contents + rel->r_offset); -+ relocation = old_value - relocation - rel->r_addend; -+ break; -+ } -+ -+ case R_LARCH_ADD_ULEB128: -+ case R_LARCH_SUB_ULEB128: -+ { -+ /* Get the value and length of the uleb128 data. */ -+ unsigned int len = 0; -+ bfd_vma old_value = _bfd_read_unsigned_leb128 (input_bfd, -+ contents + rel->r_offset, &len); -+ -+ if (R_LARCH_ADD_ULEB128 == ELFNN_R_TYPE (rel->r_info)) -+ relocation = old_value + relocation + rel->r_addend; -+ else if (R_LARCH_SUB_ULEB128 == ELFNN_R_TYPE (rel->r_info)) -+ relocation = old_value - relocation - rel->r_addend; -+ -+ bfd_vma mask = (1 << (7 * len)) - 1; -+ relocation &= mask; -+ break; -+ } - - case R_LARCH_TLS_DTPREL32: - case R_LARCH_TLS_DTPREL64: -@@ -3086,6 +3185,15 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, - - break; - -+ case R_LARCH_PCREL20_S2: -+ unresolved_reloc = false; -+ if (h && h->plt.offset != MINUS_ONE) -+ relocation = sec_addr (plt) + h->plt.offset; -+ else -+ relocation += rel->r_addend; -+ relocation -= pc; -+ break; -+ - case R_LARCH_PCALA_HI20: - unresolved_reloc = false; - if (h && h->plt.offset != MINUS_ONE) -@@ -3111,15 +3219,15 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, - else - relocation += rel->r_addend; - -- relocation &= 0xfff; -- /* Signed extend. */ -- relocation = (relocation ^ 0x800) - 0x800; -- - /* For 2G jump, generate pcalau12i, jirl. */ - /* If use jirl, turns to R_LARCH_B16. */ - uint32_t insn = bfd_get (32, input_bfd, contents + rel->r_offset); - if ((insn & 0x4c000000) == 0x4c000000) - { -+ relocation &= 0xfff; -+ /* Signed extend. */ -+ relocation = (relocation ^ 0x800) - 0x800; -+ - rel->r_info = ELFNN_R_INFO (r_symndx, R_LARCH_B16); - howto = loongarch_elf_rtype_to_howto (input_bfd, R_LARCH_B16); - } -@@ -3255,13 +3363,12 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, - + (idx * GOT_ENTRY_SIZE) - - sec_addr (htab->elf.sgot); - } -+ - relocation = got_off + sec_addr (got); - } - -- if (r_type == R_LARCH_GOT_PC_LO12) -- relocation &= (bfd_vma)0xfff; -- else if (r_type == R_LARCH_GOT64_PC_LO20 -- || r_type == R_LARCH_GOT64_PC_HI12) -+ if (r_type == R_LARCH_GOT64_PC_HI12 -+ || r_type == R_LARCH_GOT64_PC_LO20) - RELOCATE_CALC_PC64_HI32 (relocation, pc); - - break; -@@ -3419,15 +3526,16 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, - if ((tls_type & GOT_TLS_GD) && (tls_type & GOT_TLS_IE)) - relocation += 2 * GOT_ENTRY_SIZE; - -- if (r_type == R_LARCH_TLS_IE_PC_LO12) -- relocation &= (bfd_vma)0xfff; -- else if (r_type == R_LARCH_TLS_IE64_PC_LO20 -- || r_type == R_LARCH_TLS_IE64_PC_HI12) -+ if (r_type == R_LARCH_TLS_IE64_PC_LO20 -+ || r_type == R_LARCH_TLS_IE64_PC_HI12) - RELOCATE_CALC_PC64_HI32 (relocation, pc); - - break; - - case R_LARCH_RELAX: -+ case R_LARCH_ALIGN: -+ r = bfd_reloc_continue; -+ unresolved_reloc = false; - break; - - default: -@@ -3518,6 +3626,409 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, - return !fatal; - } - -+static bool -+loongarch_relax_delete_bytes (bfd *abfd, -+ asection *sec, -+ bfd_vma addr, -+ size_t count, -+ struct bfd_link_info *link_info) -+{ -+ unsigned int i, symcount; -+ bfd_vma toaddr = sec->size; -+ struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd); -+ Elf_Internal_Shdr *symtab_hdr = &elf_tdata (abfd)->symtab_hdr; -+ unsigned int sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); -+ struct bfd_elf_section_data *data = elf_section_data (sec); -+ bfd_byte *contents = data->this_hdr.contents; -+ -+ /* Actually delete the bytes. */ -+ sec->size -= count; -+ memmove (contents + addr, contents + addr + count, toaddr - addr - count); -+ -+ /* Adjust the location of all of the relocs. Note that we need not -+ adjust the addends, since all PC-relative references must be against -+ symbols, which we will adjust below. */ -+ for (i = 0; i < sec->reloc_count; i++) -+ if (data->relocs[i].r_offset > addr && data->relocs[i].r_offset < toaddr) -+ data->relocs[i].r_offset -= count; -+ -+ /* Adjust the local symbols defined in this section. */ -+ for (i = 0; i < symtab_hdr->sh_info; i++) -+ { -+ Elf_Internal_Sym *sym = (Elf_Internal_Sym *) symtab_hdr->contents + i; -+ if (sym->st_shndx == sec_shndx) -+ { -+ /* If the symbol is in the range of memory we just moved, we -+ have to adjust its value. */ -+ if (sym->st_value > addr && sym->st_value <= toaddr) -+ sym->st_value -= count; -+ -+ /* If the symbol *spans* the bytes we just deleted (i.e. its -+ *end* is in the moved bytes but its *start* isn't), then we -+ must adjust its size. -+ -+ This test needs to use the original value of st_value, otherwise -+ we might accidentally decrease size when deleting bytes right -+ before the symbol. But since deleted relocs can't span across -+ symbols, we can't have both a st_value and a st_size decrease, -+ so it is simpler to just use an else. */ -+ else if (sym->st_value <= addr -+ && sym->st_value + sym->st_size > addr -+ && sym->st_value + sym->st_size <= toaddr) -+ sym->st_size -= count; -+ } -+ } -+ -+ /* Now adjust the global symbols defined in this section. */ -+ symcount = ((symtab_hdr->sh_size / sizeof (ElfNN_External_Sym)) -+ - symtab_hdr->sh_info); -+ -+ for (i = 0; i < symcount; i++) -+ { -+ struct elf_link_hash_entry *sym_hash = sym_hashes[i]; -+ -+ /* The '--wrap SYMBOL' option is causing a pain when the object file, -+ containing the definition of __wrap_SYMBOL, includes a direct -+ call to SYMBOL as well. Since both __wrap_SYMBOL and SYMBOL reference -+ the same symbol (which is __wrap_SYMBOL), but still exist as two -+ different symbols in 'sym_hashes', we don't want to adjust -+ the global symbol __wrap_SYMBOL twice. -+ -+ The same problem occurs with symbols that are versioned_hidden, as -+ foo becomes an alias for foo@BAR, and hence they need the same -+ treatment. */ -+ if (link_info->wrap_hash != NULL -+ || sym_hash->versioned != unversioned) -+ { -+ struct elf_link_hash_entry **cur_sym_hashes; -+ -+ /* Loop only over the symbols which have already been checked. */ -+ for (cur_sym_hashes = sym_hashes; cur_sym_hashes < &sym_hashes[i]; -+ cur_sym_hashes++) -+ { -+ /* If the current symbol is identical to 'sym_hash', that means -+ the symbol was already adjusted (or at least checked). */ -+ if (*cur_sym_hashes == sym_hash) -+ break; -+ } -+ /* Don't adjust the symbol again. */ -+ if (cur_sym_hashes < &sym_hashes[i]) -+ continue; -+ } -+ -+ if ((sym_hash->root.type == bfd_link_hash_defined -+ || sym_hash->root.type == bfd_link_hash_defweak) -+ && sym_hash->root.u.def.section == sec) -+ { -+ /* As above, adjust the value if needed. */ -+ if (sym_hash->root.u.def.value > addr -+ && sym_hash->root.u.def.value <= toaddr) -+ sym_hash->root.u.def.value -= count; -+ -+ /* As above, adjust the size if needed. */ -+ else if (sym_hash->root.u.def.value <= addr -+ && sym_hash->root.u.def.value + sym_hash->size > addr -+ && sym_hash->root.u.def.value + sym_hash->size <= toaddr) -+ sym_hash->size -= count; -+ } -+ } -+ -+ return true; -+} -+ -+/* Relax pcalau12i,addi.d => pcaddi. */ -+static bool -+loongarch_relax_pcala_addi (bfd *abfd, asection *sec, -+ Elf_Internal_Rela *rel_hi, bfd_vma symval) -+{ -+ bfd_byte *contents = elf_section_data (sec)->this_hdr.contents; -+ Elf_Internal_Rela *rel_lo = rel_hi + 2; -+ uint32_t pca = bfd_get (32, abfd, contents + rel_hi->r_offset); -+ uint32_t add = bfd_get (32, abfd, contents + rel_lo->r_offset); -+ uint32_t rd = pca & 0x1f; -+ bfd_vma pc = sec_addr (sec) + rel_hi->r_offset; -+ const uint32_t addi_d = 0x02c00000; -+ const uint32_t pcaddi = 0x18000000; -+ -+ /* Is pcalau12i + addi.d insns? */ -+ if ((ELFNN_R_TYPE (rel_lo->r_info) != R_LARCH_PCALA_LO12) -+ || (ELFNN_R_TYPE ((rel_lo + 1)->r_info) != R_LARCH_RELAX) -+ || (ELFNN_R_TYPE ((rel_hi + 1)->r_info) != R_LARCH_RELAX) -+ || (rel_hi->r_offset + 4 != rel_lo->r_offset) -+ || ((add & addi_d) != addi_d) -+ /* Is pcalau12i $rd + addi.d $rd,$rd? */ -+ || ((add & 0x1f) != rd) -+ || (((add >> 5) & 0x1f) != rd) -+ /* Can be relaxed to pcaddi? */ -+ || (symval & 0x3) /* 4 bytes align. */ -+ || ((bfd_signed_vma)(symval - pc) < (bfd_signed_vma)(int32_t)0xffe00000) -+ || ((bfd_signed_vma)(symval - pc) > (bfd_signed_vma)(int32_t)0x1ffffc)) -+ return false; -+ -+ pca = pcaddi | rd; -+ bfd_put (32, abfd, pca, contents + rel_hi->r_offset); -+ -+ /* Adjust relocations. */ -+ rel_hi->r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel_hi->r_info), -+ R_LARCH_PCREL20_S2); -+ rel_lo->r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel_hi->r_info), -+ R_LARCH_DELETE); -+ -+ return true; -+} -+ -+/* Relax pcalau12i,ld.d => pcalau12i,addi.d. */ -+static bool -+loongarch_relax_pcala_ld (bfd *abfd, asection *sec, -+ Elf_Internal_Rela *rel_hi) -+{ -+ bfd_byte *contents = elf_section_data (sec)->this_hdr.contents; -+ Elf_Internal_Rela *rel_lo = rel_hi + 2; -+ uint32_t pca = bfd_get (32, abfd, contents + rel_hi->r_offset); -+ uint32_t ld = bfd_get (32, abfd, contents + rel_lo->r_offset); -+ uint32_t rd = pca & 0x1f; -+ const uint32_t ld_d = 0x28c00000; -+ uint32_t addi_d = 0x02c00000; -+ -+ if ((ELFNN_R_TYPE (rel_lo->r_info) != R_LARCH_GOT_PC_LO12) -+ || (ELFNN_R_TYPE ((rel_lo + 1)->r_info) != R_LARCH_RELAX) -+ || (ELFNN_R_TYPE ((rel_hi + 1)->r_info) != R_LARCH_RELAX) -+ || (rel_hi->r_offset + 4 != rel_lo->r_offset) -+ || ((ld & 0x1f) != rd) -+ || (((ld >> 5) & 0x1f) != rd) -+ || ((ld & ld_d) != ld_d)) -+ return false; -+ -+ addi_d = addi_d | (rd << 5) | rd; -+ bfd_put (32, abfd, addi_d, contents + rel_lo->r_offset); -+ -+ rel_hi->r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel_hi->r_info), -+ R_LARCH_PCALA_HI20); -+ rel_lo->r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel_lo->r_info), -+ R_LARCH_PCALA_LO12); -+ return true; -+} -+ -+/* Called by after_allocation to set the information of data segment -+ before relaxing. */ -+ -+void -+bfd_elfNN_loongarch_set_data_segment_info (struct bfd_link_info *info, -+ int *data_segment_phase) -+{ -+ struct loongarch_elf_link_hash_table *htab = loongarch_elf_hash_table (info); -+ htab->data_segment_phase = data_segment_phase; -+} -+ -+/* Implement R_LARCH_ALIGN by deleting excess alignment NOPs. -+ Once we've handled an R_LARCH_ALIGN, we can't relax anything else. */ -+static bool -+loongarch_relax_align (bfd *abfd, asection *sec, -+ asection *sym_sec, -+ struct bfd_link_info *link_info, -+ Elf_Internal_Rela *rel, -+ bfd_vma symval) -+{ -+ bfd_byte *contents = elf_section_data (sec)->this_hdr.contents; -+ bfd_vma alignment = 1, pos; -+ while (alignment <= rel->r_addend) -+ alignment *= 2; -+ -+ symval -= rel->r_addend; -+ bfd_vma aligned_addr = ((symval - 1) & ~(alignment - 1)) + alignment; -+ bfd_vma nop_bytes = aligned_addr - symval; -+ -+ /* Once we've handled an R_LARCH_ALIGN, we can't relax anything else. */ -+ sec->sec_flg0 = true; -+ -+ /* Make sure there are enough NOPs to actually achieve the alignment. */ -+ if (rel->r_addend < nop_bytes) -+ { -+ _bfd_error_handler -+ (_("%pB(%pA+%#" PRIx64 "): %" PRId64 " bytes required for alignment " -+ "to %" PRId64 "-byte boundary, but only %" PRId64 " present"), -+ abfd, sym_sec, (uint64_t) rel->r_offset, -+ (int64_t) nop_bytes, (int64_t) alignment, (int64_t) rel->r_addend); -+ bfd_set_error (bfd_error_bad_value); -+ return false; -+ } -+ -+ /* Delete the reloc. */ -+ rel->r_info = ELFNN_R_INFO (0, R_LARCH_NONE); -+ -+ /* If the number of NOPs is already correct, there's nothing to do. */ -+ if (nop_bytes == rel->r_addend) -+ return true; -+ -+ /* Write as many LOONGARCH NOPs as we need. */ -+ for (pos = 0; pos < (nop_bytes & -4); pos += 4) -+ bfd_putl32 (LARCH_NOP, contents + rel->r_offset + pos); -+ -+ /* Delete the excess NOPs. */ -+ return loongarch_relax_delete_bytes (abfd, sec, rel->r_offset + nop_bytes, -+ rel->r_addend - nop_bytes, link_info); -+} -+ -+static bool -+loongarch_elf_relax_section (bfd *abfd, asection *sec, -+ struct bfd_link_info *info, -+ bool *again) -+{ -+ struct loongarch_elf_link_hash_table *htab = loongarch_elf_hash_table (info); -+ Elf_Internal_Shdr *symtab_hdr = &elf_symtab_hdr (abfd); -+ struct bfd_elf_section_data *data = elf_section_data (sec); -+ Elf_Internal_Rela *relocs; -+ *again = false; -+ -+ if (bfd_link_relocatable (info) -+ || sec->sec_flg0 -+ || (sec->flags & SEC_RELOC) == 0 -+ || sec->reloc_count == 0 -+ || elf_seg_map (info->output_bfd) == NULL -+ || (info->disable_target_specific_optimizations -+ && info->relax_pass == 0) -+ /* The exp_seg_relro_adjust is enum phase_enum (0x4), -+ and defined in ld/ldexp.h. */ -+ || *(htab->data_segment_phase) == 4) -+ return true; -+ -+ if (data->relocs) -+ relocs = data->relocs; -+ else if (!(relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, -+ info->keep_memory))) -+ return true; -+ -+ if (!data->this_hdr.contents -+ && !bfd_malloc_and_get_section (abfd, sec, &data->this_hdr.contents)) -+ return true; -+ -+ if (symtab_hdr->sh_info != 0 -+ && !symtab_hdr->contents -+ && !(symtab_hdr->contents = -+ (unsigned char *) bfd_elf_get_elf_syms (abfd, symtab_hdr, -+ symtab_hdr->sh_info, -+ 0, NULL, NULL, NULL))) -+ return true; -+ -+ data->relocs = relocs; -+ -+ for (unsigned int i = 0; i < sec->reloc_count; i++) -+ { -+ Elf_Internal_Rela *rel = relocs + i; -+ asection *sym_sec; -+ bfd_vma symval; -+ unsigned long r_symndx = ELFNN_R_SYM (rel->r_info); -+ bool local_got = false; -+ char symtype; -+ struct elf_link_hash_entry *h = NULL; -+ -+ if (r_symndx < symtab_hdr->sh_info) -+ { -+ Elf_Internal_Sym *sym = (Elf_Internal_Sym *)symtab_hdr->contents -+ + r_symndx; -+ if (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC) -+ continue; -+ -+ if (sym->st_shndx == SHN_UNDEF) -+ { -+ sym_sec = sec; -+ symval = rel->r_offset; -+ } -+ else -+ { -+ sym_sec = elf_elfsections (abfd)[sym->st_shndx]->bfd_section; -+ symval = sym->st_value; -+ } -+ symtype = ELF_ST_TYPE (sym->st_info); -+ } -+ else -+ { -+ r_symndx = ELFNN_R_SYM (rel->r_info) - symtab_hdr->sh_info; -+ h = elf_sym_hashes (abfd)[r_symndx]; -+ -+ while (h->root.type == bfd_link_hash_indirect -+ || h->root.type == bfd_link_hash_warning) -+ h = (struct elf_link_hash_entry *) h->root.u.i.link; -+ -+ /* Disable the relaxation for ifunc. */ -+ if (h != NULL && h->type == STT_GNU_IFUNC) -+ continue; -+ -+ if ((h->root.type == bfd_link_hash_defined -+ || h->root.type == bfd_link_hash_defweak) -+ && h->root.u.def.section != NULL -+ && h->root.u.def.section->output_section != NULL) -+ { -+ symval = h->root.u.def.value; -+ sym_sec = h->root.u.def.section; -+ } -+ else -+ continue; -+ -+ if (h && bfd_link_executable (info) -+ && SYMBOL_REFERENCES_LOCAL (info, h)) -+ local_got = true; -+ symtype = h->type; -+ } -+ -+ if (sym_sec->sec_info_type == SEC_INFO_TYPE_MERGE -+ && (sym_sec->flags & SEC_MERGE)) -+ { -+ if (symtype == STT_SECTION) -+ symval += rel->r_addend; -+ -+ symval = _bfd_merged_section_offset (abfd, &sym_sec, -+ elf_section_data (sym_sec)->sec_info, -+ symval); -+ -+ if (symtype != STT_SECTION) -+ symval += rel->r_addend; -+ } -+ else -+ symval += rel->r_addend; -+ -+ symval += sec_addr (sym_sec); -+ -+ switch (ELFNN_R_TYPE (rel->r_info)) -+ { -+ case R_LARCH_ALIGN: -+ if (2 == info->relax_pass) -+ loongarch_relax_align (abfd, sec, sym_sec, info, rel, symval); -+ break; -+ case R_LARCH_DELETE: -+ if (info->relax_pass == 1) -+ { -+ loongarch_relax_delete_bytes (abfd, sec, rel->r_offset, 4, info); -+ rel->r_info = ELFNN_R_INFO (0, R_LARCH_NONE); -+ } -+ break; -+ case R_LARCH_PCALA_HI20: -+ if (info->relax_pass == 0) -+ { -+ if (i + 4 > sec->reloc_count) -+ break; -+ loongarch_relax_pcala_addi (abfd, sec, rel, symval); -+ } -+ break; -+ case R_LARCH_GOT_PC_HI20: -+ if (local_got) -+ { -+ if (i + 4 > sec->reloc_count) -+ break; -+ if (loongarch_relax_pcala_ld (abfd, sec, rel)) -+ { -+ loongarch_relax_pcala_addi (abfd, sec, rel, symval); -+ } -+ } -+ break; -+ default: -+ break; -+ } -+ } -+ -+ return true; -+} -+ - /* Finish up dynamic symbol handling. We set the contents of various - dynamic sections here. */ - -@@ -3529,12 +4040,6 @@ loongarch_elf_finish_dynamic_symbol (bfd *output_bfd, - { - struct loongarch_elf_link_hash_table *htab = loongarch_elf_hash_table (info); - const struct elf_backend_data *bed = get_elf_backend_data (output_bfd); -- asection *rela_dyn = bfd_get_section_by_name (output_bfd, ".rela.dyn"); -- struct bfd_link_order *lo = NULL; -- Elf_Internal_Rela *slot = NULL, *last_slot = NULL; -- -- if (rela_dyn) -- lo = rela_dyn->map_head.link_order; - - if (h->plt.offset != MINUS_ONE) - { -@@ -3544,7 +4049,6 @@ loongarch_elf_finish_dynamic_symbol (bfd *output_bfd, - uint32_t plt_entry[PLT_ENTRY_INSNS]; - bfd_byte *loc; - Elf_Internal_Rela rela; -- asection *rela_sec = NULL; - - if (htab->elf.splt) - { -@@ -3602,26 +4106,7 @@ loongarch_elf_finish_dynamic_symbol (bfd *output_bfd, - + h->root.u.def.section->output_section->vma - + h->root.u.def.section->output_offset); - -- /* Find the space after dyn sort. */ -- while (slot == last_slot || slot->r_offset != 0) -- { -- if (slot != last_slot) -- { -- slot++; -- continue; -- } -- -- BFD_ASSERT (lo != NULL); -- rela_sec = lo->u.indirect.section; -- lo = lo->next; -- -- slot = (Elf_Internal_Rela *)rela_sec->contents; -- last_slot = (Elf_Internal_Rela *)(rela_sec->contents + -- rela_sec->size); -- } -- -- bed->s->swap_reloca_out (output_bfd, &rela, (bfd_byte *)slot); -- rela_sec->reloc_count++; -+ loongarch_elf_append_rela (output_bfd, relplt, &rela); - } - else - { -@@ -3788,7 +4273,7 @@ loongarch_finish_dyn (bfd *output_bfd, struct bfd_link_info *info, bfd *dynobj, - /* Finish up local dynamic symbol handling. We set the contents of - various dynamic sections here. */ - --static bool -+static int - elfNN_loongarch_finish_local_dynamic_symbol (void **slot, void *inf) - { - struct elf_link_hash_entry *h = (struct elf_link_hash_entry *) *slot; -@@ -3797,6 +4282,33 @@ elfNN_loongarch_finish_local_dynamic_symbol (void **slot, void *inf) - return loongarch_elf_finish_dynamic_symbol (info->output_bfd, info, h, NULL); - } - -+/* Value of struct elf_backend_data->elf_backend_output_arch_local_syms, -+ this function is called before elf_link_sort_relocs. -+ So relocation R_LARCH_IRELATIVE for local ifunc can be append to -+ .rela.dyn (.rela.got) by loongarch_elf_append_rela. */ -+ -+static bool -+elf_loongarch_output_arch_local_syms -+ (bfd *output_bfd ATTRIBUTE_UNUSED, -+ struct bfd_link_info *info, -+ void *flaginfo ATTRIBUTE_UNUSED, -+ int (*func) (void *, const char *, -+ Elf_Internal_Sym *, -+ asection *, -+ struct elf_link_hash_entry *) ATTRIBUTE_UNUSED) -+{ -+ struct loongarch_elf_link_hash_table *htab = loongarch_elf_hash_table (info); -+ if (htab == NULL) -+ return false; -+ -+ /* Fill PLT and GOT entries for local STT_GNU_IFUNC symbols. */ -+ htab_traverse (htab->loc_hash_table, -+ elfNN_loongarch_finish_local_dynamic_symbol, -+ info); -+ -+ return true; -+} -+ - static bool - loongarch_elf_finish_dynamic_sections (bfd *output_bfd, - struct bfd_link_info *info) -@@ -3875,10 +4387,6 @@ loongarch_elf_finish_dynamic_sections (bfd *output_bfd, - elf_section_data (output_section)->this_hdr.sh_entsize = GOT_ENTRY_SIZE; - } - -- /* Fill PLT and GOT entries for local STT_GNU_IFUNC symbols. */ -- htab_traverse (htab->loc_hash_table, -- (void *) elfNN_loongarch_finish_local_dynamic_symbol, info); -- - return true; - } - -@@ -4143,6 +4651,8 @@ elf_loongarch64_hash_symbol (struct elf_link_hash_entry *h) - #define elf_backend_size_dynamic_sections loongarch_elf_size_dynamic_sections - #define elf_backend_relocate_section loongarch_elf_relocate_section - #define elf_backend_finish_dynamic_symbol loongarch_elf_finish_dynamic_symbol -+#define elf_backend_output_arch_local_syms \ -+ elf_loongarch_output_arch_local_syms - #define elf_backend_finish_dynamic_sections \ - loongarch_elf_finish_dynamic_sections - #define elf_backend_object_p loongarch_elf_object_p -@@ -4151,5 +4661,8 @@ elf_loongarch64_hash_symbol (struct elf_link_hash_entry *h) - #define elf_backend_grok_prstatus loongarch_elf_grok_prstatus - #define elf_backend_grok_psinfo loongarch_elf_grok_psinfo - #define elf_backend_hash_symbol elf_loongarch64_hash_symbol -+#define bfd_elfNN_bfd_relax_section loongarch_elf_relax_section -+ -+#define elf_backend_dtrel_excludes_plt 1 - - #include "elfNN-target.h" -diff --git a/bfd/elfxx-loongarch.c b/bfd/elfxx-loongarch.c -index 1253e79..f27c9fd 100644 ---- a/bfd/elfxx-loongarch.c -+++ b/bfd/elfxx-loongarch.c -@@ -34,7 +34,7 @@ typedef struct loongarch_reloc_howto_type_struct - /* The first must be reloc_howto_type! */ - reloc_howto_type howto; - bfd_reloc_code_real_type bfd_type; -- bool (*adjust_reloc_bits)(reloc_howto_type *, bfd_vma *); -+ bool (*adjust_reloc_bits)(bfd *, reloc_howto_type *, bfd_vma *); - const char *larch_reloc_type_name; - } loongarch_reloc_howto_type; - -@@ -52,13 +52,17 @@ typedef struct loongarch_reloc_howto_type_struct - { EMPTY_HOWTO (C), BFD_RELOC_NONE, NULL, NULL } - - static bool --reloc_bits (reloc_howto_type *howto, bfd_vma *val); -+reloc_bits (bfd *abfd, reloc_howto_type *howto, bfd_vma *val); - static bool --reloc_bits_b16 (reloc_howto_type *howto, bfd_vma *fix_val); --static bool --reloc_bits_b21 (reloc_howto_type *howto, bfd_vma *fix_val); --static bool --reloc_bits_b26 (reloc_howto_type *howto, bfd_vma *val); -+reloc_sign_bits (bfd *abfd, reloc_howto_type *howto, bfd_vma *fix_val); -+ -+static bfd_reloc_status_type -+loongarch_elf_add_sub_reloc (bfd *, arelent *, asymbol *, void *, -+ asection *, bfd *, char **); -+ -+static bfd_reloc_status_type -+loongarch_elf_add_sub_reloc_uleb128 (bfd *, arelent *, asymbol *, void *, -+ asection *, bfd *, char **); - - /* This does not include any relocation information, but should be - good enough for GDB or objdump to read the file. */ -@@ -447,7 +451,7 @@ static loongarch_reloc_howto_type loongarch_howto_table[] = - 0x3fffc00, /* dst_mask */ - false, /* pcrel_offset */ - BFD_RELOC_LARCH_SOP_POP_32_S_10_16_S2, /* bfd_reloc_code_real_type */ -- reloc_bits_b16, /* adjust_reloc_bits */ -+ reloc_sign_bits, /* adjust_reloc_bits */ - NULL), /* larch_reloc_type_name */ - - LOONGARCH_HOWTO (R_LARCH_SOP_POP_32_S_5_20, /* type (43). */ -@@ -483,7 +487,7 @@ static loongarch_reloc_howto_type loongarch_howto_table[] = - false, /* pcrel_offset */ - BFD_RELOC_LARCH_SOP_POP_32_S_0_5_10_16_S2, - /* bfd_reloc_code_real_type */ -- reloc_bits_b21, /* adjust_reloc_bits */ -+ reloc_sign_bits, /* adjust_reloc_bits */ - NULL), /* larch_reloc_type_name */ - - LOONGARCH_HOWTO (R_LARCH_SOP_POP_32_S_0_10_10_16_S2, /* type (45). */ -@@ -501,7 +505,7 @@ static loongarch_reloc_howto_type loongarch_howto_table[] = - false, /* pcrel_offset */ - BFD_RELOC_LARCH_SOP_POP_32_S_0_10_10_16_S2, - /* bfd_reloc_code_real_type */ -- reloc_bits_b26, /* adjust_reloc_bits */ -+ reloc_sign_bits, /* adjust_reloc_bits */ - NULL), /* larch_reloc_type_name */ - - LOONGARCH_HOWTO (R_LARCH_SOP_POP_32_U, /* type (46). */ -@@ -521,175 +525,185 @@ static loongarch_reloc_howto_type loongarch_howto_table[] = - reloc_bits, /* adjust_reloc_bits */ - NULL), /* larch_reloc_type_name */ - -+ /* 8-bit in-place addition, for local label subtraction. */ - LOONGARCH_HOWTO (R_LARCH_ADD8, /* type (47). */ - 0, /* rightshift. */ -- 4, /* size. */ -+ 1, /* size. */ - 8, /* bitsize. */ - false, /* pc_relative. */ - 0, /* bitpos. */ -- complain_overflow_signed, /* complain_on_overflow. */ -- bfd_elf_generic_reloc, /* special_function. */ -+ complain_overflow_dont, /* complain_on_overflow. */ -+ loongarch_elf_add_sub_reloc, /* special_function. */ - "R_LARCH_ADD8", /* name. */ - false, /* partial_inplace. */ -- 0, /* src_mask */ -- ALL_ONES, /* dst_mask */ -- false, /* pcrel_offset */ -- BFD_RELOC_LARCH_ADD8, /* bfd_reloc_code_real_type */ -- NULL, /* adjust_reloc_bits */ -- NULL), /* larch_reloc_type_name */ -+ 0, /* src_mask. */ -+ 0xff, /* dst_mask. */ -+ false, /* pcrel_offset. */ -+ BFD_RELOC_LARCH_ADD8, /* bfd_reloc_code_real_type. */ -+ NULL, /* adjust_reloc_bits. */ -+ NULL), /* larch_reloc_type_name. */ - -+ /* 16-bit in-place addition, for local label subtraction. */ - LOONGARCH_HOWTO (R_LARCH_ADD16, /* type (48). */ - 0, /* rightshift. */ -- 4, /* size. */ -+ 2, /* size. */ - 16, /* bitsize. */ - false, /* pc_relative. */ - 0, /* bitpos. */ -- complain_overflow_signed, /* complain_on_overflow. */ -- bfd_elf_generic_reloc, /* special_function. */ -+ complain_overflow_dont, /* complain_on_overflow. */ -+ loongarch_elf_add_sub_reloc, /* special_function. */ - "R_LARCH_ADD16", /* name. */ - false, /* partial_inplace. */ -- 0, /* src_mask */ -- ALL_ONES, /* dst_mask */ -- false, /* pcrel_offset */ -- BFD_RELOC_LARCH_ADD16, /* bfd_reloc_code_real_type */ -- NULL, /* adjust_reloc_bits */ -- NULL), /* larch_reloc_type_name */ -+ 0, /* src_mask. */ -+ 0xffff, /* dst_mask. */ -+ false, /* pcrel_offset. */ -+ BFD_RELOC_LARCH_ADD16, /* bfd_reloc_code_real_type. */ -+ NULL, /* adjust_reloc_bits. */ -+ NULL), /* larch_reloc_type_name. */ - -+ /* 24-bit in-place addition, for local label subtraction. */ - LOONGARCH_HOWTO (R_LARCH_ADD24, /* type (49). */ - 0, /* rightshift. */ -- 4, /* size. */ -+ 3, /* size. */ - 24, /* bitsize. */ - false, /* pc_relative. */ - 0, /* bitpos. */ -- complain_overflow_signed, /* complain_on_overflow. */ -- bfd_elf_generic_reloc, /* special_function. */ -+ complain_overflow_dont, /* complain_on_overflow. */ -+ loongarch_elf_add_sub_reloc, /* special_function. */ - "R_LARCH_ADD24", /* name. */ - false, /* partial_inplace. */ -- 0, /* src_mask */ -- ALL_ONES, /* dst_mask */ -- false, /* pcrel_offset */ -- BFD_RELOC_LARCH_ADD24, /* bfd_reloc_code_real_type */ -- NULL, /* adjust_reloc_bits */ -- NULL), /* larch_reloc_type_name */ -+ 0, /* src_mask. */ -+ 0xffffff, /* dst_mask. */ -+ false, /* pcrel_offset. */ -+ BFD_RELOC_LARCH_ADD24, /* bfd_reloc_code_real_type. */ -+ NULL, /* adjust_reloc_bits. */ -+ NULL), /* larch_reloc_type_name. */ - -+ /* 32-bit in-place addition, for local label subtraction. */ - LOONGARCH_HOWTO (R_LARCH_ADD32, /* type (50). */ - 0, /* rightshift. */ - 4, /* size. */ - 32, /* bitsize. */ - false, /* pc_relative. */ - 0, /* bitpos. */ -- complain_overflow_signed, /* complain_on_overflow. */ -- bfd_elf_generic_reloc, /* special_function. */ -+ complain_overflow_dont, /* complain_on_overflow. */ -+ loongarch_elf_add_sub_reloc, /* special_function. */ - "R_LARCH_ADD32", /* name. */ - false, /* partial_inplace. */ -- 0, /* src_mask */ -- ALL_ONES, /* dst_mask */ -- false, /* pcrel_offset */ -- BFD_RELOC_LARCH_ADD32, /* bfd_reloc_code_real_type */ -- NULL, /* adjust_reloc_bits */ -- NULL), /* larch_reloc_type_name */ -+ 0, /* src_mask. */ -+ 0xffffffff, /* dst_mask. */ -+ false, /* pcrel_offset. */ -+ BFD_RELOC_LARCH_ADD32, /* bfd_reloc_code_real_type. */ -+ NULL, /* adjust_reloc_bits. */ -+ NULL), /* larch_reloc_type_name. */ - -+ /* 64-bit in-place addition, for local label subtraction. */ - LOONGARCH_HOWTO (R_LARCH_ADD64, /* type (51). */ - 0, /* rightshift. */ - 8, /* size. */ - 64, /* bitsize. */ - false, /* pc_relative. */ - 0, /* bitpos. */ -- complain_overflow_signed, /* complain_on_overflow. */ -- bfd_elf_generic_reloc, /* special_function. */ -+ complain_overflow_dont, /* complain_on_overflow. */ -+ loongarch_elf_add_sub_reloc, /* special_function. */ - "R_LARCH_ADD64", /* name. */ - false, /* partial_inplace. */ -- 0, /* src_mask */ -- ALL_ONES, /* dst_mask */ -- false, /* pcrel_offset */ -- BFD_RELOC_LARCH_ADD64, /* bfd_reloc_code_real_type */ -- NULL, /* adjust_reloc_bits */ -- NULL), /* larch_reloc_type_name */ -+ 0, /* src_mask. */ -+ ALL_ONES, /* dst_mask. */ -+ false, /* pcrel_offset. */ -+ BFD_RELOC_LARCH_ADD64, /* bfd_reloc_code_real_type. */ -+ NULL, /* adjust_reloc_bits. */ -+ NULL), /* larch_reloc_type_name. */ - -+ /* 8-bit in-place subtraction, for local label subtraction. */ - LOONGARCH_HOWTO (R_LARCH_SUB8, /* type (52). */ - 0, /* rightshift. */ -- 4, /* size. */ -+ 1, /* size. */ - 8, /* bitsize. */ - false, /* pc_relative. */ - 0, /* bitpos. */ -- complain_overflow_signed, /* complain_on_overflow. */ -- bfd_elf_generic_reloc, /* special_function. */ -+ complain_overflow_dont, /* complain_on_overflow. */ -+ loongarch_elf_add_sub_reloc, /* special_function. */ - "R_LARCH_SUB8", /* name. */ - false, /* partial_inplace. */ -- 0, /* src_mask */ -- ALL_ONES, /* dst_mask */ -- false, /* pcrel_offset */ -- BFD_RELOC_LARCH_SUB8, /* bfd_reloc_code_real_type */ -- NULL, /* adjust_reloc_bits */ -- NULL), /* larch_reloc_type_name */ -+ 0, /* src_mask. */ -+ 0xff, /* dst_mask. */ -+ false, /* pcrel_offset. */ -+ BFD_RELOC_LARCH_SUB8, /* bfd_reloc_code_real_type. */ -+ NULL, /* adjust_reloc_bits. */ -+ NULL), /* larch_reloc_type_name. */ - -+ /* 16-bit in-place subtraction, for local label subtraction. */ - LOONGARCH_HOWTO (R_LARCH_SUB16, /* type (53). */ - 0, /* rightshift. */ -- 4, /* size. */ -+ 2, /* size. */ - 16, /* bitsize. */ - false, /* pc_relative. */ - 0, /* bitpos. */ -- complain_overflow_signed, /* complain_on_overflow. */ -- bfd_elf_generic_reloc, /* special_function. */ -+ complain_overflow_dont, /* complain_on_overflow. */ -+ loongarch_elf_add_sub_reloc, /* special_function. */ - "R_LARCH_SUB16", /* name. */ - false, /* partial_inplace. */ -- 0, /* src_mask */ -- ALL_ONES, /* dst_mask */ -- false, /* pcrel_offset */ -- BFD_RELOC_LARCH_SUB16, /* bfd_reloc_code_real_type */ -- NULL, /* adjust_reloc_bits */ -- NULL), /* larch_reloc_type_name */ -+ 0, /* src_mask. */ -+ 0xffff, /* dst_mask. */ -+ false, /* pcrel_offset. */ -+ BFD_RELOC_LARCH_SUB16, /* bfd_reloc_code_real_type. */ -+ NULL, /* adjust_reloc_bits. */ -+ NULL), /* larch_reloc_type_name. */ - -+ /* 24-bit in-place subtraction, for local label subtraction. */ - LOONGARCH_HOWTO (R_LARCH_SUB24, /* type (54). */ - 0, /* rightshift. */ -- 4, /* size. */ -+ 3, /* size. */ - 24, /* bitsize. */ - false, /* pc_relative. */ - 0, /* bitpos. */ -- complain_overflow_signed, /* complain_on_overflow. */ -- bfd_elf_generic_reloc, /* special_function. */ -+ complain_overflow_dont, /* complain_on_overflow. */ -+ loongarch_elf_add_sub_reloc, /* special_function. */ - "R_LARCH_SUB24", /* name. */ - false, /* partial_inplace. */ -- 0, /* src_mask */ -- ALL_ONES, /* dst_mask */ -- false, /* pcrel_offset */ -- BFD_RELOC_LARCH_SUB24, /* bfd_reloc_code_real_type */ -- NULL, /* adjust_reloc_bits */ -- NULL), /* larch_reloc_type_name */ -+ 0, /* src_mask. */ -+ 0xffffff, /* dst_mask. */ -+ false, /* pcrel_offset. */ -+ BFD_RELOC_LARCH_SUB24, /* bfd_reloc_code_real_type. */ -+ NULL, /* adjust_reloc_bits. */ -+ NULL), /* larch_reloc_type_name. */ - -+ /* 32-bit in-place subtraction, for local label subtraction. */ - LOONGARCH_HOWTO (R_LARCH_SUB32, /* type (55). */ - 0, /* rightshift. */ - 4, /* size. */ - 32, /* bitsize. */ - false, /* pc_relative. */ - 0, /* bitpos. */ -- complain_overflow_signed, /* complain_on_overflow. */ -- bfd_elf_generic_reloc, /* special_function. */ -+ complain_overflow_dont, /* complain_on_overflow. */ -+ loongarch_elf_add_sub_reloc, /* special_function. */ - "R_LARCH_SUB32", /* name. */ - false, /* partial_inplace. */ -- 0, /* src_mask */ -- ALL_ONES, /* dst_mask */ -- false, /* pcrel_offset */ -- BFD_RELOC_LARCH_SUB32, /* bfd_reloc_code_real_type */ -- NULL, /* adjust_reloc_bits */ -- NULL), /* larch_reloc_type_name */ -+ 0, /* src_mask. */ -+ 0xffffffff, /* dst_mask. */ -+ false, /* pcrel_offset. */ -+ BFD_RELOC_LARCH_SUB32, /* bfd_reloc_code_real_type. */ -+ NULL, /* adjust_reloc_bits. */ -+ NULL), /* larch_reloc_type_name. */ - -+ /* 64-bit in-place subtraction, for local label subtraction. */ - LOONGARCH_HOWTO (R_LARCH_SUB64, /* type (56). */ - 0, /* rightshift. */ - 8, /* size. */ - 64, /* bitsize. */ - false, /* pc_relative. */ - 0, /* bitpos. */ -- complain_overflow_signed, /* complain_on_overflow. */ -- bfd_elf_generic_reloc, /* special_function. */ -+ complain_overflow_dont, /* complain_on_overflow. */ -+ loongarch_elf_add_sub_reloc, /* special_function. */ - "R_LARCH_SUB64", /* name. */ - false, /* partial_inplace. */ -- 0, /* src_mask */ -- ALL_ONES, /* dst_mask */ -- false, /* pcrel_offset */ -- BFD_RELOC_LARCH_SUB64, /* bfd_reloc_code_real_type */ -- NULL, /* adjust_reloc_bits */ -- NULL), /* larch_reloc_type_name */ -+ 0, /* src_mask. */ -+ ALL_ONES, /* dst_mask. */ -+ false, /* pcrel_offset. */ -+ BFD_RELOC_LARCH_SUB64, /* bfd_reloc_code_real_type. */ -+ NULL, /* adjust_reloc_bits. */ -+ NULL), /* larch_reloc_type_name. */ - - LOONGARCH_HOWTO (R_LARCH_GNU_VTINHERIT, /* type (57). */ - 0, /* rightshift. */ -@@ -742,12 +756,12 @@ static loongarch_reloc_howto_type loongarch_howto_table[] = - bfd_elf_generic_reloc, /* special_function. */ - "R_LARCH_B16", /* name. */ - false, /* partial_inplace. */ -- 0x3fffc00, /* src_mask */ -- 0x3fffc00, /* dst_mask */ -- false, /* pcrel_offset */ -- BFD_RELOC_LARCH_B16, /* bfd_reloc_code_real_type */ -- reloc_bits_b16, /* adjust_reloc_bits */ -- "b16"), /* larch_reloc_type_name */ -+ 0, /* src_mask. */ -+ 0x3fffc00, /* dst_mask. */ -+ false, /* pcrel_offset. */ -+ BFD_RELOC_LARCH_B16, /* bfd_reloc_code_real_type. */ -+ reloc_sign_bits, /* adjust_reloc_bits. */ -+ "b16"), /* larch_reloc_type_name. */ - - LOONGARCH_HOWTO (R_LARCH_B21, /* type (65). */ - 2, /* rightshift. */ -@@ -759,12 +773,12 @@ static loongarch_reloc_howto_type loongarch_howto_table[] = - bfd_elf_generic_reloc, /* special_function. */ - "R_LARCH_B21", /* name. */ - false, /* partial_inplace. */ -- 0xfc0003e0, /* src_mask */ -- 0xfc0003e0, /* dst_mask */ -- false, /* pcrel_offset */ -- BFD_RELOC_LARCH_B21, /* bfd_reloc_code_real_type */ -- reloc_bits_b21, /* adjust_reloc_bits */ -- "b21"), /* larch_reloc_type_name */ -+ 0, /* src_mask. */ -+ 0x3fffc1f, /* dst_mask. */ -+ false, /* pcrel_offset. */ -+ BFD_RELOC_LARCH_B21, /* bfd_reloc_code_real_type. */ -+ reloc_sign_bits, /* adjust_reloc_bits. */ -+ "b21"), /* larch_reloc_type_name. */ - - LOONGARCH_HOWTO (R_LARCH_B26, /* type (66). */ - 2, /* rightshift. */ -@@ -776,12 +790,12 @@ static loongarch_reloc_howto_type loongarch_howto_table[] = - bfd_elf_generic_reloc, /* special_function. */ - "R_LARCH_B26", /* name. */ - false, /* partial_inplace. */ -- 0, /* src_mask */ -- 0x03ffffff, /* dst_mask */ -- false, /* pcrel_offset */ -- BFD_RELOC_LARCH_B26, /* bfd_reloc_code_real_type */ -- reloc_bits_b26, /* adjust_reloc_bits */ -- "b26"), /* larch_reloc_type_name */ -+ 0, /* src_mask. */ -+ 0x03ffffff, /* dst_mask. */ -+ false, /* pcrel_offset. */ -+ BFD_RELOC_LARCH_B26, /* bfd_reloc_code_real_type. */ -+ reloc_sign_bits, /* adjust_reloc_bits. */ -+ "b26"), /* larch_reloc_type_name. */ - - LOONGARCH_HOWTO (R_LARCH_ABS_HI20, /* type (67). */ - 12, /* rightshift. */ -@@ -1078,7 +1092,7 @@ static loongarch_reloc_howto_type loongarch_howto_table[] = - 12, /* bitsize. */ - false, /* pc_relative. */ - 10, /* bitpos. */ -- complain_overflow_signed, /* complain_on_overflow. */ -+ complain_overflow_unsigned, /* complain_on_overflow. */ - bfd_elf_generic_reloc, /* special_function. */ - "R_LARCH_TLS_LE_LO12", /* name. */ - false, /* partial_inplace. */ -@@ -1146,7 +1160,7 @@ static loongarch_reloc_howto_type loongarch_howto_table[] = - 12, /* bitsize. */ - false, /* pc_relative. */ - 10, /* bitpos. */ -- complain_overflow_unsigned, /* complain_on_overflow. */ -+ complain_overflow_signed, /* complain_on_overflow. */ - bfd_elf_generic_reloc, /* special_function. */ - "R_LARCH_TLS_IE_PC_LO12", /* name. */ - false, /* partial_inplace. */ -@@ -1191,7 +1205,7 @@ static loongarch_reloc_howto_type loongarch_howto_table[] = - reloc_bits, /* adjust_reloc_bits */ - "ie64_pc_hi12"), /* larch_reloc_type_name */ - -- LOONGARCH_HOWTO (R_LARCH_TLS_IE_HI20, /* type (91). */ -+ LOONGARCH_HOWTO (R_LARCH_TLS_IE_HI20, /* type (91). */ - 12, /* rightshift. */ - 4, /* size. */ - 20, /* bitsize. */ -@@ -1327,13 +1341,14 @@ static loongarch_reloc_howto_type loongarch_howto_table[] = - reloc_bits, /* adjust_reloc_bits */ - "gd_hi20"), /* larch_reloc_type_name */ - -+ /* 32-bit PC relative. */ - LOONGARCH_HOWTO (R_LARCH_32_PCREL, /* type (99). */ - 0, /* rightshift. */ - 4, /* size. */ - 32, /* bitsize. */ - true, /* pc_relative. */ - 0, /* bitpos. */ -- complain_overflow_dont, /* complain_on_overflow. */ -+ complain_overflow_signed, /* complain_on_overflow. */ - bfd_elf_generic_reloc, /* special_function. */ - "R_LARCH_32_PCREL", /* name. */ - false, /* partial_inplace. */ -@@ -1344,6 +1359,7 @@ static loongarch_reloc_howto_type loongarch_howto_table[] = - NULL, /* adjust_reloc_bits */ - NULL), /* larch_reloc_type_name */ - -+ /* The paired relocation may be relaxed. */ - LOONGARCH_HOWTO (R_LARCH_RELAX, /* type (100). */ - 0, /* rightshift */ - 1, /* size */ -@@ -1361,6 +1377,176 @@ static loongarch_reloc_howto_type loongarch_howto_table[] = - NULL, /* adjust_reloc_bits */ - NULL), /* larch_reloc_type_name */ - -+ /* Delete relaxed instruction. */ -+ LOONGARCH_HOWTO (R_LARCH_DELETE, /* type (101). */ -+ 0, /* rightshift. */ -+ 0, /* size. */ -+ 0, /* bitsize. */ -+ false, /* pc_relative. */ -+ 0, /* bitpos. */ -+ complain_overflow_dont, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ -+ "R_LARCH_DELETE", /* name. */ -+ false, /* partial_inplace. */ -+ 0, /* src_mask. */ -+ 0, /* dst_mask. */ -+ false, /* pcrel_offset. */ -+ BFD_RELOC_LARCH_DELETE, /* bfd_reloc_code_real_type. */ -+ NULL, /* adjust_reloc_bits. */ -+ NULL), /* larch_reloc_type_name. */ -+ -+ /* Indicates an alignment statement. The addend field encodes how many -+ bytes of NOPs follow the statement. The desired alignment is the -+ addend rounded up to the next power of two. */ -+ LOONGARCH_HOWTO (R_LARCH_ALIGN, /* type (102). */ -+ 0, /* rightshift. */ -+ 0, /* size. */ -+ 0, /* bitsize. */ -+ false, /* pc_relative. */ -+ 0, /* bitpos. */ -+ complain_overflow_dont, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ -+ "R_LARCH_ALIGN", /* name. */ -+ false, /* partial_inplace. */ -+ 0, /* src_mask. */ -+ 0, /* dst_mask. */ -+ false, /* pcrel_offset. */ -+ BFD_RELOC_LARCH_ALIGN, /* bfd_reloc_code_real_type. */ -+ NULL, /* adjust_reloc_bits. */ -+ NULL), /* larch_reloc_type_name. */ -+ -+ /* pcala_hi20 + pcala_lo12 relaxed to pcrel20_s2. */ -+ LOONGARCH_HOWTO (R_LARCH_PCREL20_S2, /* type (103). */ -+ 2, /* rightshift. */ -+ 4, /* size. */ -+ 20, /* bitsize. */ -+ false, /* pc_relative. */ -+ 5, /* bitpos. */ -+ complain_overflow_signed, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ -+ "R_LARCH_PCREL20_S2", /* name. */ -+ false, /* partial_inplace. */ -+ 0, /* src_mask. */ -+ 0x1ffffe0, /* dst_mask. */ -+ false, /* pcrel_offset. */ -+ BFD_RELOC_LARCH_PCREL20_S2, /* bfd_reloc_code_real_type. */ -+ reloc_sign_bits, /* adjust_reloc_bits. */ -+ NULL), /* larch_reloc_type_name. */ -+ -+ /* Canonical Frame Address. */ -+ LOONGARCH_HOWTO (R_LARCH_CFA, /* type (104). */ -+ 0, /* rightshift. */ -+ 0, /* size. */ -+ 0, /* bitsize. */ -+ false, /* pc_relative. */ -+ 0, /* bitpos. */ -+ complain_overflow_dont, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ -+ "R_LARCH_CFA", /* name. */ -+ false, /* partial_inplace. */ -+ 0, /* src_mask. */ -+ 0, /* dst_mask. */ -+ false, /* pcrel_offset. */ -+ BFD_RELOC_LARCH_CFA, /* bfd_reloc_code_real_type. */ -+ NULL, /* adjust_reloc_bits. */ -+ NULL), /* larch_reloc_type_name. */ -+ -+ /* 6-bit in-place addition, for local label subtraction -+ to calculate DW_CFA_advance_loc. */ -+ LOONGARCH_HOWTO (R_LARCH_ADD6, /* type (105). */ -+ 0, /* rightshift. */ -+ 1, /* size. */ -+ 8, /* bitsize. */ -+ false, /* pc_relative. */ -+ 0, /* bitpos. */ -+ complain_overflow_dont, /* complain_on_overflow. */ -+ loongarch_elf_add_sub_reloc, /* special_function. */ -+ "R_LARCH_ADD6", /* name. */ -+ false, /* partial_inplace. */ -+ 0, /* src_mask. */ -+ 0x3f, /* dst_mask. */ -+ false, /* pcrel_offset. */ -+ BFD_RELOC_LARCH_ADD6, /* bfd_reloc_code_real_type. */ -+ reloc_bits, /* adjust_reloc_bits. */ -+ NULL), /* larch_reloc_type_name. */ -+ -+ /* 6-bit in-place subtraction, for local label subtraction -+ to calculate DW_CFA_advance_loc. */ -+ LOONGARCH_HOWTO (R_LARCH_SUB6, /* type (106). */ -+ 0, /* rightshift. */ -+ 1, /* size. */ -+ 8, /* bitsize. */ -+ false, /* pc_relative. */ -+ 0, /* bitpos. */ -+ complain_overflow_dont, /* complain_on_overflow. */ -+ loongarch_elf_add_sub_reloc, /* special_function. */ -+ "R_LARCH_SUB6", /* name. */ -+ false, /* partial_inplace. */ -+ 0, /* src_mask. */ -+ 0x3f, /* dst_mask. */ -+ false, /* pcrel_offset. */ -+ BFD_RELOC_LARCH_SUB6, /* bfd_reloc_code_real_type. */ -+ reloc_bits, /* adjust_reloc_bits. */ -+ NULL), /* larch_reloc_type_name. */ -+ -+ /* The length of unsigned-leb128 is variable, just assume the -+ size is one byte here. -+ uleb128 in-place addition, for local label subtraction. */ -+ LOONGARCH_HOWTO (R_LARCH_ADD_ULEB128, /* type (107). */ -+ 0, /* rightshift. */ -+ 1, /* size. */ -+ 0, /* bitsize. */ -+ false, /* pc_relative. */ -+ 0, /* bitpos. */ -+ complain_overflow_dont, /* complain_on_overflow. */ -+ loongarch_elf_add_sub_reloc_uleb128, /* special_function. */ -+ "R_LARCH_ADD_ULEB128", /* name. */ -+ false, /* partial_inplace. */ -+ 0, /* src_mask. */ -+ 0, /* dst_mask. */ -+ false, /* pcrel_offset. */ -+ BFD_RELOC_LARCH_ADD_ULEB128, /* bfd_reloc_code_real_type. */ -+ NULL, /* adjust_reloc_bits. */ -+ NULL), /* larch_reloc_type_name. */ -+ -+ /* The length of unsigned-leb128 is variable, just assume the -+ size is one byte here. -+ uleb128 in-place subtraction, for local label subtraction. */ -+ LOONGARCH_HOWTO (R_LARCH_SUB_ULEB128, /* type (108). */ -+ 0, /* rightshift. */ -+ 1, /* size. */ -+ 0, /* bitsize. */ -+ false, /* pc_relative. */ -+ 0, /* bitpos. */ -+ complain_overflow_dont, /* complain_on_overflow. */ -+ loongarch_elf_add_sub_reloc_uleb128, /* special_function. */ -+ "R_LARCH_SUB_ULEB128", /* name. */ -+ false, /* partial_inplace. */ -+ 0, /* src_mask. */ -+ 0, /* dst_mask. */ -+ false, /* pcrel_offset. */ -+ BFD_RELOC_LARCH_SUB_ULEB128, /* bfd_reloc_code_real_type. */ -+ NULL, /* adjust_reloc_bits. */ -+ NULL), /* larch_reloc_type_name. */ -+ -+ /* 64-bit PC relative. */ -+ LOONGARCH_HOWTO (R_LARCH_64_PCREL, /* type (109). */ -+ 0, /* rightshift. */ -+ 8, /* size. */ -+ 64, /* bitsize. */ -+ true, /* pc_relative. */ -+ 0, /* bitpos. */ -+ complain_overflow_signed, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ -+ "R_LARCH_64_PCREL", /* name. */ -+ false, /* partial_inplace. */ -+ 0, /* src_mask */ -+ 0xffffffffffffffff, /* dst_mask */ -+ false, /* pcrel_offset */ -+ BFD_RELOC_LARCH_64_PCREL, /* bfd_reloc_code_real_type */ -+ NULL, /* adjust_reloc_bits */ -+ NULL), /* larch_reloc_type_name */ -+ - }; - - reloc_howto_type * -@@ -1464,13 +1650,19 @@ loongarch_larch_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, - BFD_RELOC_LARCH_SOP_POP_32_S_10_16 - BFD_RELOC_LARCH_SOP_POP_32_S_5_20 - BFD_RELOC_LARCH_SOP_POP_32_U. */ -+ - static bool --reloc_bits (reloc_howto_type *howto, bfd_vma *fix_val) -+reloc_bits (bfd *abfd ATTRIBUTE_UNUSED, -+ reloc_howto_type *howto, -+ bfd_vma *fix_val) - { -- bfd_signed_vma val = ((bfd_signed_vma)(*fix_val)) >> howto->rightshift; -+ bfd_signed_vma val = (bfd_signed_vma)(*fix_val); -+ bfd_signed_vma mask = ((bfd_signed_vma)0x1 << howto->bitsize) - 1; -+ -+ val = val >> howto->rightshift; - - /* Perform insn bits field. */ -- val = val & (((bfd_vma)0x1 << howto->bitsize) - 1); -+ val = val & mask; - val <<= howto->bitpos; - - *fix_val = (bfd_vma)val; -@@ -1478,141 +1670,208 @@ reloc_bits (reloc_howto_type *howto, bfd_vma *fix_val) - return true; - } - --/* Adjust val to perform insn -- R_LARCH_SOP_POP_32_S_10_16_S2 -- R_LARCH_B16. */ - static bool --reloc_bits_b16 (reloc_howto_type *howto, bfd_vma *fix_val) -+reloc_sign_bits (bfd *abfd, reloc_howto_type *howto, bfd_vma *fix_val) - { - if (howto->complain_on_overflow != complain_overflow_signed) - return false; - -- bfd_signed_vma val = *fix_val; -+ bfd_signed_vma val = (bfd_signed_vma)(*fix_val); - -- /* Judge whether 4 bytes align. */ -- if (val & ((0x1UL << howto->rightshift) - 1)) -- return false; -+ /* Check alignment. FIXME: if rightshift is not alingment. */ -+ if (howto->rightshift -+ && (val & ((((bfd_signed_vma) 1) << howto->rightshift) - 1))) -+ { -+ (*_bfd_error_handler) (_("%pB: relocation %s right shift %d error 0x%lx"), -+ abfd, howto->name, howto->rightshift, (long) val); -+ bfd_set_error (bfd_error_bad_value); -+ return false; -+ } - -- int bitsize = howto->bitsize + howto->rightshift; -- bfd_signed_vma sig_bit = (val >> (bitsize - 1)) & 0x1; -+ bfd_signed_vma mask = ((bfd_signed_vma)0x1 << (howto->bitsize -+ + howto->rightshift - 1)) - 1; - -- /* If val < 0, sign bit is 1. */ -- if (sig_bit) -+ /* Positive number: high part is all 0; -+ Negative number: if high part is not all 0, high part must be all 1. -+ high part: from sign bit to highest bit. */ -+ if ((val & ~mask) && ((val & ~mask) != ~mask)) - { -- /* Signed bits is 1. */ -- if ((LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize - 1) & val) -- != LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize - 1)) -- return false; -+ (*_bfd_error_handler) (_("%pB: relocation %s overflow 0x%lx"), -+ abfd, howto->name, (long) val); -+ bfd_set_error (bfd_error_bad_value); -+ return false; - } -- else -+ -+ val = val >> howto->rightshift; -+ /* can delete? */ -+ mask = ((bfd_signed_vma)0x1 << howto->bitsize) - 1; -+ val = val & mask; -+ -+ switch (howto->type) - { -- /* Signed bits is 0. */ -- if (LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize) & val) -- return false; -+ case R_LARCH_SOP_POP_32_S_0_10_10_16_S2: -+ case R_LARCH_B26: -+ /* Perform insn bits field. 15:0<<10, 25:16>>16. */ -+ val = ((val & 0xffff) << 10) | ((val >> 16) & 0x3ff); -+ break; -+ case R_LARCH_SOP_POP_32_S_0_5_10_16_S2: -+ case R_LARCH_B21: -+ /* Perform insn bits field. 15:0<<10, 20:16>>16. */ -+ val = ((val & 0xffff) << 10) | ((val >> 16) & 0x1f); -+ break; -+ default: -+ val <<= howto->bitpos; -+ break; - } - -- /* Perform insn bits field. */ -- val >>= howto->rightshift; -- val = val & (((bfd_vma)0x1 << howto->bitsize) - 1); -- val <<= howto->bitpos; -- - *fix_val = val; -- - return true; - } - --/* Reloc type : -- R_LARCH_SOP_POP_32_S_0_5_10_16_S2 -- R_LARCH_B21. */ --static bool --reloc_bits_b21 (reloc_howto_type *howto, -- bfd_vma *fix_val) -+bool -+loongarch_adjust_reloc_bitsfield (bfd *abfd, reloc_howto_type *howto, -+ bfd_vma *fix_val) - { -- if (howto->complain_on_overflow != complain_overflow_signed) -- return false; -- -- bfd_signed_vma val = *fix_val; -- -- if (val & ((0x1UL << howto->rightshift) - 1)) -- return false; -+ BFD_ASSERT (((loongarch_reloc_howto_type *)howto)->adjust_reloc_bits); -+ return ((loongarch_reloc_howto_type *) -+ howto)->adjust_reloc_bits (abfd, howto, fix_val); -+} - -- int bitsize = howto->bitsize + howto->rightshift; -- bfd_signed_vma sig_bit = (val >> (bitsize - 1)) & 0x1; -+static bfd_reloc_status_type -+loongarch_elf_add_sub_reloc (bfd *abfd, -+ arelent *reloc_entry, -+ asymbol *symbol, -+ void *data, -+ asection *input_section, -+ bfd *output_bfd, -+ char **error_message ATTRIBUTE_UNUSED) -+{ -+ reloc_howto_type *howto = reloc_entry->howto; -+ bfd_vma relocation; - -- /* If val < 0. */ -- if (sig_bit) -- { -- if ((LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize - 1) & val) -- != LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize - 1)) -- return false; -- } -- else -+ if (output_bfd != NULL -+ && (symbol->flags & BSF_SECTION_SYM) == 0 -+ && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0)) - { -- if (LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize) & val) -- return false; -+ reloc_entry->address += input_section->output_offset; -+ return bfd_reloc_ok; - } - -- /* Perform insn bits field. */ -- val >>= howto->rightshift; -- val = val & (((bfd_vma)0x1 << howto->bitsize) - 1); -+ if (output_bfd != NULL) -+ return bfd_reloc_continue; - -- /* Perform insn bits field. 15:0<<10, 20:16>>16. */ -- val = ((val & 0xffff) << 10) | ((val >> 16) & 0x1f); -+ relocation = symbol->value + symbol->section->output_section->vma -+ + symbol->section->output_offset + reloc_entry->addend; - -- *fix_val = val; -+ bfd_size_type octets = reloc_entry->address -+ * bfd_octets_per_byte (abfd, input_section); -+ if (!bfd_reloc_offset_in_range (reloc_entry->howto, abfd, -+ input_section, octets)) -+ return bfd_reloc_outofrange; - -- return true; --} -+ bfd_vma old_value = bfd_get (howto->bitsize, abfd, -+ data + reloc_entry->address); - --/* Reloc type: -- R_LARCH_SOP_POP_32_S_0_10_10_16_S2 -- R_LARCH_B26. */ --static bool --reloc_bits_b26 (reloc_howto_type *howto, -- bfd_vma *fix_val) --{ -- /* Return false if overflow. */ -- if (howto->complain_on_overflow != complain_overflow_signed) -- return false; -- -- bfd_signed_vma val = *fix_val; -+ switch (howto->type) -+ { -+ case R_LARCH_ADD6: -+ case R_LARCH_ADD8: -+ case R_LARCH_ADD16: -+ case R_LARCH_ADD32: -+ case R_LARCH_ADD64: -+ relocation = old_value + relocation; -+ break; -+ -+ case R_LARCH_SUB6: -+ case R_LARCH_SUB8: -+ case R_LARCH_SUB16: -+ case R_LARCH_SUB32: -+ case R_LARCH_SUB64: -+ relocation = old_value - relocation; -+ break; -+ } - -- if (val & ((0x1UL << howto->rightshift) - 1)) -- return false; -+ bfd_put (howto->bitsize, abfd, relocation, data + reloc_entry->address); - -- int bitsize = howto->bitsize + howto->rightshift; -- bfd_signed_vma sig_bit = (val >> (bitsize - 1)) & 0x1; -+ return bfd_reloc_ok; -+} - -- /* If val < 0. */ -- if (sig_bit) -- { -- if ((LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize - 1) & val) -- != LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize - 1)) -- return false; -- } -- else -+static bfd_reloc_status_type -+loongarch_elf_add_sub_reloc_uleb128 (bfd *abfd, -+ arelent *reloc_entry, -+ asymbol *symbol, -+ void *data, -+ asection *input_section, -+ bfd *output_bfd, -+ char **error_message ATTRIBUTE_UNUSED) -+{ -+ reloc_howto_type *howto = reloc_entry->howto; -+ bfd_vma relocation; -+ -+ if (output_bfd != NULL -+ && (symbol->flags & BSF_SECTION_SYM) == 0 -+ && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0)) -+ { -+ reloc_entry->address += input_section->output_offset; -+ return bfd_reloc_ok; -+ } -+ -+ if (output_bfd != NULL) -+ return bfd_reloc_continue; -+ -+ relocation = symbol->value + symbol->section->output_section->vma -+ + symbol->section->output_offset + reloc_entry->addend; -+ -+ bfd_size_type octets = reloc_entry->address -+ * bfd_octets_per_byte (abfd, input_section); -+ if (!bfd_reloc_offset_in_range (reloc_entry->howto, abfd, -+ input_section, octets)) -+ return bfd_reloc_outofrange; -+ -+ unsigned int len = 0; -+ bfd_byte *p = data + reloc_entry->address; -+ bfd_vma old_value = _bfd_read_unsigned_leb128 (abfd, p, &len); -+ -+ switch (howto->type) - { -- if (LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize) & val) -- return false; -- } -- -- /* Perform insn bits field. */ -- val >>= howto->rightshift; -- val = val & (((bfd_vma)0x1 << howto->bitsize) - 1); -+ case R_LARCH_ADD_ULEB128: -+ relocation = old_value + relocation; -+ break; - -- /* Perform insn bits field. 25:16>>16, 15:0<<10. */ -- val = ((val & 0xffff) << 10) | ((val >> 16) & 0x3ff); -+ case R_LARCH_SUB_ULEB128: -+ relocation = old_value - relocation; -+ break; -+ } - -- *fix_val = val; -+ bfd_vma mask = (1 << (7 * len)) - 1; -+ relocation = relocation & mask; -+ loongarch_write_unsigned_leb128 (p, len, relocation); -+ return bfd_reloc_ok; -+} - -- return true; -+/* Write VALUE in uleb128 format to P. -+ LEN is the uleb128 value length. -+ Return a pointer to the byte following the last byte that was written. */ -+bfd_byte * -+loongarch_write_unsigned_leb128 (bfd_byte *p, unsigned int len, bfd_vma value) -+{ -+ bfd_byte c; -+ do -+ { -+ c = value & 0x7f; -+ if (len > 1) -+ c |= 0x80; -+ *(p++) = c; -+ value >>= 7; -+ len--; -+ } -+ while (len); -+ return p; - } - --bool --loongarch_adjust_reloc_bitsfield (reloc_howto_type *howto, -- bfd_vma *fix_val) -+int loongarch_get_uleb128_length (bfd_byte *buf) - { -- BFD_ASSERT (((loongarch_reloc_howto_type *)howto)->adjust_reloc_bits); -- return ((loongarch_reloc_howto_type *) -- howto)->adjust_reloc_bits(howto, fix_val); -+ unsigned int len = 0; -+ _bfd_read_unsigned_leb128 (NULL, buf, &len); -+ return len; - } -diff --git a/bfd/elfxx-loongarch.h b/bfd/elfxx-loongarch.h -index 1a6b6df..627c5db 100644 ---- a/bfd/elfxx-loongarch.h -+++ b/bfd/elfxx-loongarch.h -@@ -34,7 +34,17 @@ extern bfd_reloc_code_real_type - loongarch_larch_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, - const char *l_r_name); - --bool loongarch_adjust_reloc_bitsfield (reloc_howto_type *howto, bfd_vma *fix_val); -+bool -+loongarch_adjust_reloc_bitsfield (bfd *, reloc_howto_type *, bfd_vma *); -+void -+bfd_elf32_loongarch_set_data_segment_info (struct bfd_link_info *, int *); -+void -+bfd_elf64_loongarch_set_data_segment_info (struct bfd_link_info *, int *); -+ -+bfd_byte * -+loongarch_write_unsigned_leb128 (bfd_byte *p, unsigned int len, bfd_vma value); -+ -+int loongarch_get_uleb128_length (bfd_byte *buf); - - /* TRUE if this is a PLT reference to a local IFUNC. */ - #define PLT_LOCAL_IFUNC_P(INFO, H) \ -diff --git a/bfd/libbfd.h b/bfd/libbfd.h -index e759351..460505b 100644 ---- a/bfd/libbfd.h -+++ b/bfd/libbfd.h -@@ -3514,6 +3514,15 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", - "BFD_RELOC_LARCH_TLS_GD_HI20", - "BFD_RELOC_LARCH_32_PCREL", - "BFD_RELOC_LARCH_RELAX", -+ "BFD_RELOC_LARCH_DELETE", -+ "BFD_RELOC_LARCH_ALIGN", -+ "BFD_RELOC_LARCH_PCREL20_S2", -+ "BFD_RELOC_LARCH_CFA", -+ "BFD_RELOC_LARCH_ADD6", -+ "BFD_RELOC_LARCH_SUB6", -+ "BFD_RELOC_LARCH_ADD_ULEB128", -+ "BFD_RELOC_LARCH_SUB_ULEB128", -+ "BFD_RELOC_LARCH_64_PCREL", - "@@overflow: BFD_RELOC_UNUSED@@", - }; - #endif -diff --git a/bfd/reloc.c b/bfd/reloc.c -index db4f30d..77e705c 100644 ---- a/bfd/reloc.c -+++ b/bfd/reloc.c -@@ -8310,6 +8310,31 @@ ENUMX - ENUMX - BFD_RELOC_LARCH_RELAX - -+ENUMX -+ BFD_RELOC_LARCH_DELETE -+ -+ENUMX -+ BFD_RELOC_LARCH_ALIGN -+ -+ENUMX -+ BFD_RELOC_LARCH_PCREL20_S2 -+ -+ENUMX -+ BFD_RELOC_LARCH_CFA -+ -+ENUMX -+ BFD_RELOC_LARCH_ADD6 -+ENUMX -+ BFD_RELOC_LARCH_SUB6 -+ -+ENUMX -+ BFD_RELOC_LARCH_ADD_ULEB128 -+ENUMX -+ BFD_RELOC_LARCH_SUB_ULEB128 -+ -+ENUMX -+ BFD_RELOC_LARCH_64_PCREL -+ - ENUMDOC - LARCH relocations. - -diff --git a/binutils/readelf.c b/binutils/readelf.c -index c9887f1..bcc432c 100644 ---- a/binutils/readelf.c -+++ b/binutils/readelf.c -@@ -14019,6 +14019,60 @@ target_specific_reloc_handling (Filedata *filedata, - - switch (filedata->file_header.e_machine) - { -+ case EM_LOONGARCH: -+ { -+ switch (reloc_type) -+ { -+ /* For .uleb128 .LFE1-.LFB1, loongarch write 0 to object file -+ at assembly time. */ -+ case 107: /* R_LARCH_ADD_ULEB128. */ -+ case 108: /* R_LARCH_SUB_ULEB128. */ -+ { -+ uint64_t value = 0; -+ unsigned int reloc_size = 0; -+ int leb_ret = 0; -+ -+ if (reloc->r_offset < (size_t) (end - start)) -+ value = read_leb128 (start + reloc->r_offset, end, false, -+ &reloc_size, &leb_ret); -+ if (leb_ret != 0 || reloc_size == 0 || reloc_size > 8) -+ error (_("LoongArch ULEB128 field at 0x%lx contains invalid " -+ "ULEB128 value\n"), -+ (long) reloc->r_offset); -+ -+ else if (sym_index >= num_syms) -+ error (_("%s reloc contains invalid symbol index " -+ "%" PRIu64 "\n"), -+ (reloc_type == 107 -+ ? "R_LARCH_ADD_ULEB128" -+ : "R_LARCH_SUB_ULEB128"), -+ sym_index); -+ else -+ { -+ if (reloc_type == 107) -+ value += reloc->r_addend + symtab[sym_index].st_value; -+ else -+ value -= reloc->r_addend + symtab[sym_index].st_value; -+ -+ /* Write uleb128 value to p. */ -+ bfd_byte *p = start + reloc->r_offset; -+ do -+ { -+ bfd_byte c = value & 0x7f; -+ value >>= 7; -+ if (--reloc_size != 0) -+ c |= 0x80; -+ *p++ = c; -+ } -+ while (reloc_size); -+ } -+ -+ return true; -+ } -+ } -+ break; -+ } -+ - case EM_MSP430: - case EM_MSP430_OLD: - { -@@ -14041,8 +14095,8 @@ target_specific_reloc_handling (Filedata *filedata, - case 23: /* R_MSP430X_GNU_SUB_ULEB128 */ - /* PR 21139. */ - if (sym_index >= num_syms) -- error (_("MSP430 SYM_DIFF reloc contains invalid symbol index" -- " %" PRIu64 "\n"), sym_index); -+ error (_("%s reloc contains invalid symbol index " -+ "%" PRIu64 "\n"), "MSP430 SYM_DIFF", sym_index); - else - saved_sym = symtab + sym_index; - return true; -@@ -14092,9 +14146,8 @@ target_specific_reloc_handling (Filedata *filedata, - " contains invalid ULEB128 value\n"), - reloc->r_offset); - else if (sym_index >= num_syms) -- error (_("MSP430 reloc contains invalid symbol index " -- "%" PRIu64 "\n"), -- sym_index); -+ error (_("%s reloc contains invalid symbol index " -+ "%" PRIu64 "\n"), "MSP430", sym_index); - else - { - value = reloc->r_addend + (symtab[sym_index].st_value -@@ -14139,9 +14192,8 @@ target_specific_reloc_handling (Filedata *filedata, - return true; - case 33: /* R_MN10300_SYM_DIFF */ - if (sym_index >= num_syms) -- error (_("MN10300_SYM_DIFF reloc contains invalid symbol index " -- "%" PRIu64 "\n"), -- sym_index); -+ error (_("%s reloc contains invalid symbol index " -+ "%" PRIu64 "\n"), "MN10300_SYM_DIFF", sym_index); - else - saved_sym = symtab + sym_index; - return true; -@@ -14154,9 +14206,8 @@ target_specific_reloc_handling (Filedata *filedata, - uint64_t value; - - if (sym_index >= num_syms) -- error (_("MN10300 reloc contains invalid symbol index " -- "%" PRIu64 "\n"), -- sym_index); -+ error (_("%s reloc contains invalid symbol index " -+ "%" PRIu64 "\n"), "MN10300", sym_index); - else - { - value = reloc->r_addend + (symtab[sym_index].st_value -@@ -14199,8 +14250,8 @@ target_specific_reloc_handling (Filedata *filedata, - case 0x80: /* R_RL78_SYM. */ - saved_sym1 = saved_sym2; - if (sym_index >= num_syms) -- error (_("RL78_SYM reloc contains invalid symbol index " -- "%" PRIu64 "\n"), sym_index); -+ error (_("%s reloc contains invalid symbol index " -+ "%" PRIu64 "\n"), "RL78_SYM", sym_index); - else - { - saved_sym2 = symtab[sym_index].st_value; -@@ -14745,6 +14796,8 @@ is_32bit_inplace_add_reloc (Filedata * filedata, unsigned int reloc_type) - /* Please keep this table alpha-sorted for ease of visual lookup. */ - switch (filedata->file_header.e_machine) - { -+ case EM_LOONGARCH: -+ return reloc_type == 50; /* R_LARCH_ADD32. */ - case EM_RISCV: - return reloc_type == 35; /* R_RISCV_ADD32. */ - default: -@@ -14761,6 +14814,8 @@ is_32bit_inplace_sub_reloc (Filedata * filedata, unsigned int reloc_type) - /* Please keep this table alpha-sorted for ease of visual lookup. */ - switch (filedata->file_header.e_machine) - { -+ case EM_LOONGARCH: -+ return reloc_type == 55; /* R_LARCH_SUB32. */ - case EM_RISCV: - return reloc_type == 39; /* R_RISCV_SUB32. */ - default: -@@ -14777,6 +14832,8 @@ is_64bit_inplace_add_reloc (Filedata * filedata, unsigned int reloc_type) - /* Please keep this table alpha-sorted for ease of visual lookup. */ - switch (filedata->file_header.e_machine) - { -+ case EM_LOONGARCH: -+ return reloc_type == 51; /* R_LARCH_ADD64. */ - case EM_RISCV: - return reloc_type == 36; /* R_RISCV_ADD64. */ - default: -@@ -14793,6 +14850,8 @@ is_64bit_inplace_sub_reloc (Filedata * filedata, unsigned int reloc_type) - /* Please keep this table alpha-sorted for ease of visual lookup. */ - switch (filedata->file_header.e_machine) - { -+ case EM_LOONGARCH: -+ return reloc_type == 56; /* R_LARCH_SUB64. */ - case EM_RISCV: - return reloc_type == 40; /* R_RISCV_SUB64. */ - default: -@@ -14809,6 +14868,8 @@ is_16bit_inplace_add_reloc (Filedata * filedata, unsigned int reloc_type) - /* Please keep this table alpha-sorted for ease of visual lookup. */ - switch (filedata->file_header.e_machine) - { -+ case EM_LOONGARCH: -+ return reloc_type == 48; /* R_LARCH_ADD16. */ - case EM_RISCV: - return reloc_type == 34; /* R_RISCV_ADD16. */ - default: -@@ -14825,6 +14886,8 @@ is_16bit_inplace_sub_reloc (Filedata * filedata, unsigned int reloc_type) - /* Please keep this table alpha-sorted for ease of visual lookup. */ - switch (filedata->file_header.e_machine) - { -+ case EM_LOONGARCH: -+ return reloc_type == 53; /* R_LARCH_SUB16. */ - case EM_RISCV: - return reloc_type == 38; /* R_RISCV_SUB16. */ - default: -@@ -14841,6 +14904,8 @@ is_8bit_inplace_add_reloc (Filedata * filedata, unsigned int reloc_type) - /* Please keep this table alpha-sorted for ease of visual lookup. */ - switch (filedata->file_header.e_machine) - { -+ case EM_LOONGARCH: -+ return reloc_type == 47; /* R_LARCH_ADD8. */ - case EM_RISCV: - return reloc_type == 33; /* R_RISCV_ADD8. */ - default: -@@ -14857,6 +14922,8 @@ is_8bit_inplace_sub_reloc (Filedata * filedata, unsigned int reloc_type) - /* Please keep this table alpha-sorted for ease of visual lookup. */ - switch (filedata->file_header.e_machine) - { -+ case EM_LOONGARCH: -+ return reloc_type == 52; /* R_LARCH_SUB8. */ - case EM_RISCV: - return reloc_type == 37; /* R_RISCV_SUB8. */ - default: -@@ -14864,6 +14931,21 @@ is_8bit_inplace_sub_reloc (Filedata * filedata, unsigned int reloc_type) - } - } - -+/* Like is_32bit_abs_reloc except that it returns TRUE iff RELOC_TYPE is -+ a 6-bit inplace add RELA relocation used in DWARF debug sections. */ -+ -+static bool -+is_6bit_inplace_add_reloc (Filedata * filedata, unsigned int reloc_type) -+{ -+ switch (filedata->file_header.e_machine) -+ { -+ case EM_LOONGARCH: -+ return reloc_type == 105; /* R_LARCH_ADD6. */ -+ default: -+ return false; -+ } -+} -+ - /* Like is_32bit_abs_reloc except that it returns TRUE iff RELOC_TYPE is - a 6-bit inplace sub RELA relocation used in DWARF debug sections. */ - -@@ -14872,6 +14954,8 @@ is_6bit_inplace_sub_reloc (Filedata * filedata, unsigned int reloc_type) - { - switch (filedata->file_header.e_machine) - { -+ case EM_LOONGARCH: -+ return reloc_type == 106; /* R_LARCH_SUB6. */ - case EM_RISCV: - return reloc_type == 52; /* R_RISCV_SUB6. */ - default: -@@ -15119,7 +15203,8 @@ apply_relocations (Filedata *filedata, - reloc_inplace = true; - } - else if ((reloc_subtract = is_6bit_inplace_sub_reloc (filedata, -- reloc_type))) -+ reloc_type)) -+ || is_6bit_inplace_add_reloc (filedata, reloc_type)) - { - reloc_size = 1; - reloc_inplace = true; -@@ -15211,7 +15296,8 @@ apply_relocations (Filedata *filedata, - reloc_size); - } - else if (is_6bit_abs_reloc (filedata, reloc_type) -- || is_6bit_inplace_sub_reloc (filedata, reloc_type)) -+ || is_6bit_inplace_sub_reloc (filedata, reloc_type) -+ || is_6bit_inplace_add_reloc (filedata, reloc_type)) - { - if (reloc_subtract) - addend -= sym->st_value; -diff --git a/binutils/testsuite/binutils-all/readelf.exp b/binutils/testsuite/binutils-all/readelf.exp -index 2a785c6..f963c6b 100644 ---- a/binutils/testsuite/binutils-all/readelf.exp -+++ b/binutils/testsuite/binutils-all/readelf.exp -@@ -489,18 +489,23 @@ if {![binutils_assemble $srcdir/$subdir/z.s tmpdir/z.o]} then { - readelf_test {--decompress --hex-dump .debug_loc} $tempfile readelf.z - } - --set hpux "" -+set flags "" - - # Skip the next test for the RISCV architectures because they - # do not support .ULEB128 pseudo-ops with non-constant values. - if ![istarget "riscv*-*-*"] then { - - if [istarget "hppa*64*-*-hpux*"] { -- set hpux "--defsym HPUX=1" -+ set flags "--defsym HPUX=1" - } - -+ # LoongArch relax align add nops, so label subtractions will increase -+ if [istarget "loongarch*-*-*"] { -+ set flags "-mno-relax" -+ } -+ - # Assemble the DWARF-5 test file. -- if {![binutils_assemble_flags $srcdir/$subdir/dw5.S tmpdir/dw5.o $hpux]} then { -+ if {![binutils_assemble_flags $srcdir/$subdir/dw5.S tmpdir/dw5.o $flags]} then { - unsupported "readelf -wiaoRlL dw5 (failed to assemble)" - } else { - -@@ -612,7 +617,7 @@ if ![is_remote host] { - } - - # Check dwarf-5 support for DW_OP_addrx. --if {![binutils_assemble_flags $srcdir/$subdir/dw5-op.S tmpdir/dw5-op.o $hpux]} then { -+if {![binutils_assemble_flags $srcdir/$subdir/dw5-op.S tmpdir/dw5-op.o $flags]} then { - unsupported "readelf -wi dw5-op (failed to assemble)" - } else { - -diff --git a/gas/compress-debug.c b/gas/compress-debug.c -index 7c97913..0753b21 100644 ---- a/gas/compress-debug.c -+++ b/gas/compress-debug.c -@@ -102,7 +102,7 @@ compress_finish (bool use_zstd, void *ctx, char **next_out, - { - #if HAVE_ZSTD - ZSTD_outBuffer ob = { *next_out, *avail_out, 0 }; -- ZSTD_inBuffer ib = { 0 }; -+ ZSTD_inBuffer ib = { 0, 0, 0 }; - size_t ret = ZSTD_compressStream2 (ctx, &ob, &ib, ZSTD_e_end); - *out_size = ob.pos; - *next_out += ob.pos; -diff --git a/gas/config/tc-loongarch.c b/gas/config/tc-loongarch.c -index dd47581..51c272b 100644 ---- a/gas/config/tc-loongarch.c -+++ b/gas/config/tc-loongarch.c -@@ -20,6 +20,7 @@ - see . */ - - #include "as.h" -+#include "subsegs.h" - #include "dw2gencfi.h" - #include "loongarch-lex.h" - #include "elf/loongarch.h" -@@ -70,6 +71,7 @@ struct loongarch_cl_insn - long where; - /* The relocs associated with the instruction, if any. */ - fixS *fixp[MAX_RELOC_NUMBER_A_INSN]; -+ long macro_id; - }; - - #ifndef DEFAULT_ARCH -@@ -104,6 +106,16 @@ const char *md_shortopts = "O::g::G:"; - - static const char default_arch[] = DEFAULT_ARCH; - -+/* The lowest 4-bit is the bytes of instructions. */ -+#define RELAX_BRANCH_16 0xc0000014 -+#define RELAX_BRANCH_21 0xc0000024 -+#define RELAX_BRANCH_26 0xc0000048 -+ -+#define RELAX_BRANCH(x) \ -+ (((x) & 0xf0000000) == 0xc0000000) -+#define RELAX_BRANCH_ENCODE(x) \ -+ (BFD_RELOC_LARCH_B16 == (x) ? RELAX_BRANCH_16 : RELAX_BRANCH_21) -+ - enum options - { - OPTION_IGNORE = OPTION_MD_BASE, -@@ -116,6 +128,8 @@ enum options - OPTION_LA_LOCAL_WITH_ABS, - OPTION_LA_GLOBAL_WITH_PCREL, - OPTION_LA_GLOBAL_WITH_ABS, -+ OPTION_RELAX, -+ OPTION_NO_RELAX, - - OPTION_END_OF_ENUM, - }; -@@ -130,6 +144,9 @@ struct option md_longopts[] = - { "mla-global-with-pcrel", no_argument, NULL, OPTION_LA_GLOBAL_WITH_PCREL }, - { "mla-global-with-abs", no_argument, NULL, OPTION_LA_GLOBAL_WITH_ABS }, - -+ { "mrelax", no_argument, NULL, OPTION_RELAX }, -+ { "mno-relax", no_argument, NULL, OPTION_NO_RELAX }, -+ - { NULL, no_argument, NULL, 0 } - }; - -@@ -158,6 +175,10 @@ md_parse_option (int c, const char *arg) - { - LARCH_opts.ase_ilp32 = 1; - LARCH_opts.ase_lp64 = 1; -+ LARCH_opts.ase_lsx = 1; -+ LARCH_opts.ase_lasx = 1; -+ LARCH_opts.ase_lvz = 1; -+ LARCH_opts.ase_lbt = 1; - LARCH_opts.ase_abi = lp64[suf[4]]; - } - else if (strncasecmp (arg, "ilp32", 5) == 0 && ilp32[suf[5]] != 0) -@@ -195,6 +216,14 @@ md_parse_option (int c, const char *arg) - LARCH_opts.ase_gabs = 1; - break; - -+ case OPTION_RELAX: -+ LARCH_opts.relax = 1; -+ break; -+ -+ case OPTION_NO_RELAX: -+ LARCH_opts.relax = 0; -+ break; -+ - case OPTION_IGNORE: - break; - -@@ -205,8 +234,14 @@ md_parse_option (int c, const char *arg) - return ret; - } - -+static const char *const *r_abi_names = NULL; -+static const char *const *f_abi_names = NULL; - static struct htab *r_htab = NULL; -+static struct htab *r_deprecated_htab = NULL; - static struct htab *f_htab = NULL; -+static struct htab *f_deprecated_htab = NULL; -+static struct htab *fc_htab = NULL; -+static struct htab *fcn_htab = NULL; - static struct htab *c_htab = NULL; - static struct htab *cr_htab = NULL; - static struct htab *v_htab = NULL; -@@ -223,6 +258,10 @@ loongarch_after_parse_args () - LARCH_opts.ase_abi = EF_LOONGARCH_ABI_DOUBLE_FLOAT; - LARCH_opts.ase_ilp32 = 1; - LARCH_opts.ase_lp64 = 1; -+ LARCH_opts.ase_lsx = 1; -+ LARCH_opts.ase_lasx = 1; -+ LARCH_opts.ase_lvz = 1; -+ LARCH_opts.ase_lbt = 1; - } - else if (strcmp (default_arch, "loongarch32") == 0) - { -@@ -250,7 +289,11 @@ loongarch_after_parse_args () - /* Init ilp32/lp64 registers names. */ - if (!r_htab) - r_htab = str_htab_create (), str_hash_insert (r_htab, "", 0, 0); -+ if (!r_deprecated_htab) -+ r_deprecated_htab = str_htab_create (), -+ str_hash_insert (r_deprecated_htab, "", 0, 0); - -+ r_abi_names = loongarch_r_normal_name; - for (i = 0; i < ARRAY_SIZE (loongarch_r_normal_name); i++) - str_hash_insert (r_htab, loongarch_r_normal_name[i], (void *) (i + 1), 0); - -@@ -265,11 +308,29 @@ loongarch_after_parse_args () - { - if (!f_htab) - f_htab = str_htab_create (), str_hash_insert (f_htab, "", 0, 0); -+ if (!f_deprecated_htab) -+ f_deprecated_htab = str_htab_create (), -+ str_hash_insert (f_deprecated_htab, "", 0, 0); - -+ f_abi_names = loongarch_f_normal_name; - for (i = 0; i < ARRAY_SIZE (loongarch_f_normal_name); i++) - str_hash_insert (f_htab, loongarch_f_normal_name[i], (void *) (i + 1), - 0); - -+ if (!fc_htab) -+ fc_htab = str_htab_create (), str_hash_insert (fc_htab, "", 0, 0); -+ -+ for (i = 0; i < ARRAY_SIZE (loongarch_fc_normal_name); i++) -+ str_hash_insert (fc_htab, loongarch_fc_normal_name[i], (void *) (i + 1), -+ 0); -+ -+ if (!fcn_htab) -+ fcn_htab = str_htab_create (), str_hash_insert (fcn_htab, "", 0, 0); -+ -+ for (i = 0; i < ARRAY_SIZE (loongarch_fc_numeric_name); i++) -+ str_hash_insert (fcn_htab, loongarch_fc_numeric_name[i], (void *) (i + 1), -+ 0); -+ - if (!c_htab) - c_htab = str_htab_create (), str_hash_insert (c_htab, "", 0, 0); - -@@ -302,22 +363,24 @@ loongarch_after_parse_args () - /* Init lp64 registers alias. */ - if (LARCH_opts.ase_lp64) - { -+ r_abi_names = loongarch_r_lp64_name; - for (i = 0; i < ARRAY_SIZE (loongarch_r_lp64_name); i++) - str_hash_insert (r_htab, loongarch_r_lp64_name[i], (void *) (i + 1), - 0); -- for (i = 0; i < ARRAY_SIZE (loongarch_r_lp64_name1); i++) -- str_hash_insert (r_htab, loongarch_r_lp64_name1[i], (void *) (i + 1), -- 0); -+ for (i = 0; i < ARRAY_SIZE (loongarch_r_lp64_name_deprecated); i++) -+ str_hash_insert (r_deprecated_htab, loongarch_r_lp64_name_deprecated[i], -+ (void *) (i + 1), 0); - } - - /* Init float-lp64 registers alias */ - if ((LARCH_opts.ase_sf || LARCH_opts.ase_df) && LARCH_opts.ase_lp64) - { -+ f_abi_names = loongarch_f_lp64_name; - for (i = 0; i < ARRAY_SIZE (loongarch_f_lp64_name); i++) - str_hash_insert (f_htab, loongarch_f_lp64_name[i], - (void *) (i + 1), 0); -- for (i = 0; i < ARRAY_SIZE (loongarch_f_lp64_name1); i++) -- str_hash_insert (f_htab, loongarch_f_lp64_name1[i], -+ for (i = 0; i < ARRAY_SIZE (loongarch_f_lp64_name_deprecated); i++) -+ str_hash_insert (f_deprecated_htab, loongarch_f_lp64_name_deprecated[i], - (void *) (i + 1), 0); - } - } -@@ -460,7 +523,6 @@ get_internal_label (expressionS *label_expr, unsigned long label, - int augend /* 0 for previous, 1 for next. */) - { - assert (label < INTERNAL_LABEL_SPECIAL); -- if (augend == 0 && internal_label_count[label] == 0) - as_fatal (_("internal error: we have no internal label yet")); - label_expr->X_op = O_symbol; - label_expr->X_add_symbol = -@@ -617,13 +679,26 @@ loongarch_args_parser_can_match_arg_helper (char esc_ch1, char esc_ch2, - as_fatal ( - _("not support reloc bit-field\nfmt: %c%c %s\nargs: %s"), - esc_ch1, esc_ch2, bit_field, arg); -+ - if (ip->reloc_info[0].type >= BFD_RELOC_LARCH_B16 -- && ip->reloc_info[0].type < BFD_RELOC_LARCH_RELAX) -+ && ip->reloc_info[0].type < BFD_RELOC_LARCH_64_PCREL) - { - /* As we compact stack-relocs, it is no need for pop operation. - But break out until here in order to check the imm field. - May be reloc_num > 1 if implement relax? */ - ip->reloc_num += reloc_num; -+ reloc_type = ip->reloc_info[0].type; -+ -+ if (LARCH_opts.relax && ip->macro_id -+ && (BFD_RELOC_LARCH_PCALA_HI20 == reloc_type -+ || BFD_RELOC_LARCH_PCALA_LO12 == reloc_type -+ || BFD_RELOC_LARCH_GOT_PC_HI20 == reloc_type -+ || BFD_RELOC_LARCH_GOT_PC_LO12 == reloc_type)) -+ { -+ ip->reloc_info[ip->reloc_num].type = BFD_RELOC_LARCH_RELAX; -+ ip->reloc_info[ip->reloc_num].value = const_0; -+ ip->reloc_num++; -+ } - break; - } - reloc_num++; -@@ -636,11 +711,40 @@ loongarch_args_parser_can_match_arg_helper (char esc_ch1, char esc_ch2, - imm = (intptr_t) str_hash_find (r_htab, arg); - ip->match_now = 0 < imm; - ret = imm - 1; -+ if (ip->match_now) -+ break; -+ /* Handle potential usage of deprecated register aliases. */ -+ imm = (intptr_t) str_hash_find (r_deprecated_htab, arg); -+ ip->match_now = 0 < imm; -+ ret = imm - 1; -+ if (ip->match_now && !ip->macro_id) -+ as_warn (_("register alias %s is deprecated, use %s instead"), -+ arg, r_abi_names[ret]); - break; - case 'f': -- imm = (intptr_t) str_hash_find (f_htab, arg); -+ switch (esc_ch2) -+ { -+ case 'c': -+ imm = (intptr_t) str_hash_find (fc_htab, arg); -+ if (0 >= imm) -+ { -+ imm = (intptr_t) str_hash_find (fcn_htab, arg); -+ } -+ break; -+ default: -+ imm = (intptr_t) str_hash_find (f_htab, arg); -+ } -+ ip->match_now = 0 < imm; -+ ret = imm - 1; -+ if (ip->match_now && !ip->macro_id) -+ break; -+ /* Handle potential usage of deprecated register aliases. */ -+ imm = (intptr_t) str_hash_find (f_deprecated_htab, arg); - ip->match_now = 0 < imm; - ret = imm - 1; -+ if (ip->match_now) -+ as_warn (_("register alias %s is deprecated, use %s instead"), -+ arg, f_abi_names[ret]); - break; - case 'c': - switch (esc_ch2) -@@ -743,7 +847,8 @@ get_loongarch_opcode (struct loongarch_cl_insn *insn) - for (it = ase->opcodes; it->name; it++) - { - if ((!it->include || (it->include && *it->include)) -- && (!it->exclude || (it->exclude && !(*it->exclude)))) -+ && (!it->exclude || (it->exclude && !(*it->exclude))) -+ && !(it->pinfo & INSN_DIS_ALIAS)) - str_hash_insert (ase->name_hash_entry, it->name, - (void *) it, 0); - } -@@ -835,8 +940,11 @@ move_insn (struct loongarch_cl_insn *insn, fragS *frag, long where) - insn->where = where; - for (i = 0; i < insn->reloc_num; i++) - { -- insn->fixp[i]->fx_frag = frag; -- insn->fixp[i]->fx_where = where; -+ if (insn->fixp[i]) -+ { -+ insn->fixp[i]->fx_frag = frag; -+ insn->fixp[i]->fx_where = where; -+ } - } - install_insn (insn); - } -@@ -849,11 +957,22 @@ append_fixed_insn (struct loongarch_cl_insn *insn) - move_insn (insn, frag_now, f - frag_now->fr_literal); - } - -+/* Add instructions based on the worst-case scenario firstly. */ -+static void -+append_relaxed_branch_insn (struct loongarch_cl_insn *insn, int max_chars, -+ int var, relax_substateT subtype, symbolS *symbol, offsetT offset) -+{ -+ frag_grow (max_chars); -+ move_insn (insn, frag_now, frag_more (0) - frag_now->fr_literal); -+ frag_var (rs_machine_dependent, max_chars, var, -+ subtype, symbol, offset, NULL); -+} -+ - static void - append_fixp_and_insn (struct loongarch_cl_insn *ip) - { - reloc_howto_type *howto; -- bfd_reloc_code_real_type reloc_type; -+ bfd_reloc_code_real_type r_type; - struct reloc_info *reloc_info = ip->reloc_info; - size_t i; - -@@ -861,20 +980,62 @@ append_fixp_and_insn (struct loongarch_cl_insn *ip) - - for (i = 0; i < ip->reloc_num; i++) - { -- reloc_type = reloc_info[i].type; -- howto = bfd_reloc_type_lookup (stdoutput, reloc_type); -- if (howto == NULL) -- as_fatal (_("no HOWTO loong relocation number %d"), reloc_type); -- -- ip->fixp[i] = -- fix_new_exp (ip->frag, ip->where, bfd_get_reloc_size (howto), -- &reloc_info[i].value, FALSE, reloc_type); -+ r_type = reloc_info[i].type; -+ -+ if (r_type != BFD_RELOC_UNUSED) -+ { -+ -+ gas_assert (&(reloc_info[i].value)); -+ if (BFD_RELOC_LARCH_B16 == r_type || BFD_RELOC_LARCH_B21 == r_type) -+ { -+ int min_bytes = 4; /* One branch instruction. */ -+ unsigned max_bytes = 8; /* Branch and jump instructions. */ -+ -+ if (now_seg == absolute_section) -+ { -+ as_bad (_("relaxable branches not supported in absolute section")); -+ return; -+ } -+ -+ append_relaxed_branch_insn (ip, max_bytes, min_bytes, -+ RELAX_BRANCH_ENCODE (r_type), -+ reloc_info[i].value.X_add_symbol, -+ reloc_info[i].value.X_add_number); -+ return; -+ } -+ else -+ { -+ howto = bfd_reloc_type_lookup (stdoutput, r_type); -+ if (howto == NULL) -+ as_fatal (_("no HOWTO loong relocation number %d"), r_type); -+ -+ ip->fixp[i] = fix_new_exp (ip->frag, ip->where, -+ bfd_get_reloc_size (howto), -+ &reloc_info[i].value, FALSE, r_type); -+ } -+ } - } - - if (ip->insn_length < ip->relax_max_length) - as_fatal (_("Internal error: not support relax now")); - else - append_fixed_insn (ip); -+ -+ /* We need to start a new frag after any instruction that can be -+ optimized away or compressed by the linker during relaxation, to prevent -+ the assembler from computing static offsets across such an instruction. -+ -+ This is necessary to get correct .eh_frame cfa info. If one cfa's two -+ symbol is not in the same frag, it will generate relocs to calculate -+ symbol subtraction. (gas/dw2gencfi.c:output_cfi_insn: -+ if (symbol_get_frag (to) == symbol_get_frag (from))) */ -+ if (LARCH_opts.relax -+ && (BFD_RELOC_LARCH_PCALA_HI20 == reloc_info[0].type -+ || BFD_RELOC_LARCH_GOT_PC_HI20 == reloc_info[0].type)) -+ { -+ frag_wane (frag_now); -+ frag_new (0); -+ } - } - - /* Ask helper for returning a malloced c_str or NULL. */ -@@ -968,7 +1129,7 @@ assember_macro_helper (const char *const args[], void *context_ptr) - * assuming 'not starting with space and not ending with space' or pass in - * empty c_str. */ - static void --loongarch_assemble_INSNs (char *str) -+loongarch_assemble_INSNs (char *str, struct loongarch_cl_insn *ctx) - { - char *rest; - size_t len_str = strlen(str); -@@ -991,6 +1152,7 @@ loongarch_assemble_INSNs (char *str) - - struct loongarch_cl_insn the_one = { 0 }; - the_one.name = str; -+ the_one.macro_id = ctx->macro_id; - - for (; *str && *str != ' '; str++) - ; -@@ -1014,24 +1176,27 @@ loongarch_assemble_INSNs (char *str) - append_fixp_and_insn (&the_one); - if (the_one.insn_length == 0 && the_one.insn->macro) - { -+ the_one.macro_id = 1; -+ - char *c_str = loongarch_expand_macro (the_one.insn->macro, - the_one.arg_strs, - assember_macro_helper, - &the_one, len_str); -- loongarch_assemble_INSNs (c_str); -+ loongarch_assemble_INSNs (c_str, &the_one); - free (c_str); - } - } - while (0); - - if (*rest != '\0') -- loongarch_assemble_INSNs (rest); -+ loongarch_assemble_INSNs (rest, ctx); - } - - void - md_assemble (char *str) - { -- loongarch_assemble_INSNs (str); -+ struct loongarch_cl_insn the_one = { 0 }; -+ loongarch_assemble_INSNs (str, &the_one); - } - - const char * -@@ -1062,7 +1227,7 @@ static void fix_reloc_insn (fixS *fixP, bfd_vma reloc_val, char *buf) - - insn = bfd_getl32 (buf); - -- if (!loongarch_adjust_reloc_bitsfield(howto, &reloc_val)) -+ if (!loongarch_adjust_reloc_bitsfield (NULL, howto, &reloc_val)) - as_warn_where (fixP->fx_file, fixP->fx_line, "Reloc overflow"); - - insn = (insn & (insn_t)howto->src_mask) -@@ -1137,6 +1302,22 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) - fix_reloc_insn (fixP, (bfd_vma)stack_top, buf); - break; - -+ /* LARCH only has R_LARCH_64/32, not has R_LARCH_24/16/8. -+ For BFD_RELOC_64/32, if fx_addsy and fx_subsy not null, wer need -+ generate BFD_RELOC_LARCH_ADD64/32 and BFD_RELOC_LARCH_SUB64/32 here. -+ Then will parse howto table bfd_reloc_code_real_type to generate -+ R_LARCH_ADD64/32 and R_LARCH_SUB64/32 reloc at tc_gen_reloc function. -+ If only fx_addsy not null, skip here directly, then generate -+ R_LARCH_64/32. -+ -+ For BFD_RELOC_24/16/8, if fx_addsy and fx_subsy not null, wer need -+ generate BFD_RELOC_LARCH_ADD24/16/8 and BFD_RELOC_LARCH_SUB24/16/8 here. -+ Then will parse howto table bfd_reloc_code_real_type to generate -+ R_LARCH_ADD24/16/8 and R_LARCH_SUB24/16/8 reloc at tc_gen_reloc -+ function. If only fx_addsy not null, we generate -+ BFD_RELOC_LARCH_ADD24/16/8 only, then generate R_LARCH_24/16/8. -+ To avoid R_LARCH_ADDxx add extra value, we write 0 first -+ (use md_number_to_chars (buf, 0, fixP->fx_size)). */ - case BFD_RELOC_64: - case BFD_RELOC_32: - if (fixP->fx_r_type == BFD_RELOC_32 -@@ -1151,7 +1332,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) - break; - } - -- if (fixP->fx_subsy) -+ if (fixP->fx_addsy && fixP->fx_subsy) - { - fixP->fx_next = xmemdup (fixP, sizeof (*fixP), sizeof (*fixP)); - fixP->fx_next->fx_addsy = fixP->fx_subsy; -@@ -1186,34 +1367,37 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) - case BFD_RELOC_24: - case BFD_RELOC_16: - case BFD_RELOC_8: -- fixP->fx_next = xmemdup (fixP, sizeof (*fixP), sizeof (*fixP)); -- fixP->fx_next->fx_addsy = fixP->fx_subsy; -- fixP->fx_next->fx_subsy = NULL; -- fixP->fx_next->fx_offset = 0; -- fixP->fx_subsy = NULL; -- -- switch (fixP->fx_r_type) -+ if (fixP->fx_addsy) - { -- case BFD_RELOC_24: -- fixP->fx_r_type = BFD_RELOC_LARCH_ADD24; -- fixP->fx_next->fx_r_type = BFD_RELOC_LARCH_SUB24; -- break; -- case BFD_RELOC_16: -- fixP->fx_r_type = BFD_RELOC_LARCH_ADD16; -- fixP->fx_next->fx_r_type = BFD_RELOC_LARCH_SUB16; -- break; -- case BFD_RELOC_8: -- fixP->fx_r_type = BFD_RELOC_LARCH_ADD8; -- fixP->fx_next->fx_r_type = BFD_RELOC_LARCH_SUB8; -- break; -- default: -- break; -- } -+ fixP->fx_next = xmemdup (fixP, sizeof (*fixP), sizeof (*fixP)); -+ fixP->fx_next->fx_addsy = fixP->fx_subsy; -+ fixP->fx_next->fx_subsy = NULL; -+ fixP->fx_next->fx_offset = 0; -+ fixP->fx_subsy = NULL; -+ -+ switch (fixP->fx_r_type) -+ { -+ case BFD_RELOC_24: -+ fixP->fx_r_type = BFD_RELOC_LARCH_ADD24; -+ fixP->fx_next->fx_r_type = BFD_RELOC_LARCH_SUB24; -+ break; -+ case BFD_RELOC_16: -+ fixP->fx_r_type = BFD_RELOC_LARCH_ADD16; -+ fixP->fx_next->fx_r_type = BFD_RELOC_LARCH_SUB16; -+ break; -+ case BFD_RELOC_8: -+ fixP->fx_r_type = BFD_RELOC_LARCH_ADD8; -+ fixP->fx_next->fx_r_type = BFD_RELOC_LARCH_SUB8; -+ break; -+ default: -+ break; -+ } - -- md_number_to_chars (buf, 0, fixP->fx_size); -+ md_number_to_chars (buf, 0, fixP->fx_size); - -- if (fixP->fx_next->fx_addsy == NULL) -- fixP->fx_next->fx_done = 1; -+ if (fixP->fx_next->fx_addsy == NULL) -+ fixP->fx_next->fx_done = 1; -+ } - - if (fixP->fx_addsy == NULL) - { -@@ -1222,6 +1406,67 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) - } - break; - -+ case BFD_RELOC_LARCH_CFA: -+ if (fixP->fx_addsy && fixP->fx_subsy) -+ { -+ fixP->fx_next = xmemdup (fixP, sizeof (*fixP), sizeof (*fixP)); -+ fixP->fx_next->fx_addsy = fixP->fx_subsy; -+ fixP->fx_next->fx_subsy = NULL; -+ fixP->fx_next->fx_offset = 0; -+ fixP->fx_subsy = NULL; -+ -+ unsigned int subtype; -+ offsetT loc; -+ subtype = bfd_get_8 (NULL, &((fragS *) -+ (fixP->fx_frag->fr_opcode))->fr_literal[fixP->fx_where]); -+ loc = fixP->fx_frag->fr_fix - (subtype & 7); -+ switch (subtype) -+ { -+ case DW_CFA_advance_loc1: -+ fixP->fx_where = loc + 1; -+ fixP->fx_next->fx_where = loc + 1; -+ fixP->fx_r_type = BFD_RELOC_LARCH_ADD8; -+ fixP->fx_next->fx_r_type = BFD_RELOC_LARCH_SUB8; -+ md_number_to_chars (buf+1, 0, fixP->fx_size); -+ break; -+ -+ case DW_CFA_advance_loc2: -+ fixP->fx_size = 2; -+ fixP->fx_next->fx_size = 2; -+ fixP->fx_where = loc + 1; -+ fixP->fx_next->fx_where = loc + 1; -+ fixP->fx_r_type = BFD_RELOC_LARCH_ADD16; -+ fixP->fx_next->fx_r_type = BFD_RELOC_LARCH_SUB16; -+ md_number_to_chars (buf+1, 0, fixP->fx_size); -+ break; -+ -+ case DW_CFA_advance_loc4: -+ fixP->fx_size = 4; -+ fixP->fx_next->fx_size = 4; -+ fixP->fx_where = loc; -+ fixP->fx_next->fx_where = loc; -+ fixP->fx_r_type = BFD_RELOC_LARCH_ADD32; -+ fixP->fx_next->fx_r_type = BFD_RELOC_LARCH_SUB32; -+ md_number_to_chars (buf+1, 0, fixP->fx_size); -+ break; -+ -+ default: -+ if (subtype < 0x80 && (subtype & 0x40)) -+ { -+ /* DW_CFA_advance_loc. */ -+ fixP->fx_frag = (fragS *) fixP->fx_frag->fr_opcode; -+ fixP->fx_next->fx_frag = fixP->fx_frag; -+ fixP->fx_r_type = BFD_RELOC_LARCH_ADD6; -+ fixP->fx_next->fx_r_type = BFD_RELOC_LARCH_SUB6; -+ md_number_to_chars (buf, 0x40, fixP->fx_size); -+ } -+ else -+ as_fatal (_("internal: bad CFA value #%d"), subtype); -+ break; -+ } -+ } -+ break; -+ - case BFD_RELOC_LARCH_B16: - case BFD_RELOC_LARCH_B21: - case BFD_RELOC_LARCH_B26: -@@ -1236,41 +1481,38 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) - int64_t sym_addend = S_GET_VALUE (fixP->fx_addsy) + fixP->fx_offset; - int64_t pc = fixP->fx_where + fixP->fx_frag->fr_address; - fix_reloc_insn (fixP, sym_addend - pc, buf); -- fixP->fx_done = 1; -- } - -+ /* If relax, symbol value may change at link time, so reloc need to -+ be saved. */ -+ if (!LARCH_opts.relax) -+ fixP->fx_done = 1; -+ } - break; - -+ /* Because ADD_ULEB128/SUB_ULEB128 always occur in pairs. -+ So just deal with one is ok. -+ case BFD_RELOC_LARCH_ADD_ULEB128: */ -+ case BFD_RELOC_LARCH_SUB_ULEB128: -+ { -+ unsigned int len = 0; -+ len = loongarch_get_uleb128_length ((bfd_byte *)buf); -+ bfd_byte *endp = (bfd_byte*) buf + len -1; -+ /* Clean the uleb128 value to 0. Do not reduce the length. */ -+ memset (buf, 0x80, len - 1); -+ *endp = 0; -+ break; -+ } -+ - default: - break; - } - } - --int --loongarch_relax_frag (asection *sec ATTRIBUTE_UNUSED, -- fragS *fragp ATTRIBUTE_UNUSED, -- long stretch ATTRIBUTE_UNUSED) --{ -- return 0; --} -- - int - md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, - asection *segtype ATTRIBUTE_UNUSED) - { -- return 0; --} -- --int --loongarch_fix_adjustable (fixS *fix) --{ -- /* Prevent all adjustments to global symbols. */ -- if (S_IS_EXTERNAL (fix->fx_addsy) -- || S_IS_WEAK (fix->fx_addsy) -- || S_FORCE_RELOC (fix->fx_addsy, true)) -- return 0; -- -- return 1; -+ return (fragp->fr_var = 4); - } - - /* Translate internal representation of relocation info to BFD target -@@ -1297,19 +1539,56 @@ tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) - return reloc; - } - --/* Convert a machine dependent frag. */ -+/* Standard calling conventions leave the CFA at SP on entry. */ - void --md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec ATTRIBUTE_UNUSED, -- fragS *fragp ATTRIBUTE_UNUSED) -+loongarch_cfi_frame_initial_instructions (void) - { -- /* fragp->fr_fix += 8; */ -+ cfi_add_CFA_def_cfa_register (3 /* $sp */); - } - --/* Standard calling conventions leave the CFA at SP on entry. */ - void --loongarch_cfi_frame_initial_instructions (void) -+loongarch_pre_output_hook (void) - { -- cfi_add_CFA_def_cfa_register (3 /* $sp */); -+ const frchainS *frch; -+ segT s; -+ -+ if (!LARCH_opts.relax) -+ return; -+ -+ /* Save the current segment info. */ -+ segT seg = now_seg; -+ subsegT subseg = now_subseg; -+ -+ for (s = stdoutput->sections; s; s = s->next) -+ for (frch = seg_info (s)->frchainP; frch; frch = frch->frch_next) -+ { -+ fragS *frag; -+ -+ for (frag = frch->frch_root; frag; frag = frag->fr_next) -+ { -+ if (frag->fr_type == rs_cfa) -+ { -+ expressionS exp; -+ expressionS *symval; -+ -+ symval = symbol_get_value_expression (frag->fr_symbol); -+ exp.X_op = O_subtract; -+ exp.X_add_symbol = symval->X_add_symbol; -+ exp.X_add_number = 0; -+ exp.X_op_symbol = symval->X_op_symbol; -+ -+ /* We must set the segment before creating a frag after all -+ frag chains have been chained together. */ -+ subseg_set (s, frch->frch_subseg); -+ -+ fix_new_exp (frag, (int) frag->fr_offset, 1, &exp, 0, -+ BFD_RELOC_LARCH_CFA); -+ } -+ } -+ } -+ -+ /* Restore the original segment info. */ -+ subseg_set (seg, subseg); - } - - void -@@ -1325,6 +1604,58 @@ md_show_usage (FILE *stream) - /* FIXME */ - } - -+static void -+loongarch_make_nops (char *buf, bfd_vma bytes) -+{ -+ bfd_vma i = 0; -+ -+ /* Fill with 4-byte NOPs. */ -+ for ( ; i < bytes; i += 4) -+ number_to_chars_littleendian (buf + i, LARCH_NOP, 4); -+} -+ -+/* Called from md_do_align. Used to create an alignment frag in a -+ code section by emitting a worst-case NOP sequence that the linker -+ will later relax to the correct number of NOPs. We can't compute -+ the correct alignment now because of other linker relaxations. */ -+ -+bool -+loongarch_frag_align_code (int n) -+{ -+ bfd_vma bytes = (bfd_vma) 1 << n; -+ bfd_vma insn_alignment = 4; -+ bfd_vma worst_case_bytes = bytes - insn_alignment; -+ char *nops; -+ expressionS ex; -+ -+ /* If we are moving to a smaller alignment than the instruction size, then no -+ alignment is required. */ -+ if (bytes <= insn_alignment) -+ return true; -+ -+ /* When not relaxing, loongarch_handle_align handles code alignment. */ -+ if (!LARCH_opts.relax) -+ return false; -+ -+ nops = frag_more (worst_case_bytes); -+ -+ ex.X_op = O_constant; -+ ex.X_add_number = worst_case_bytes; -+ -+ loongarch_make_nops (nops, worst_case_bytes); -+ -+ fix_new_exp (frag_now, nops - frag_now->fr_literal, 0, -+ &ex, false, BFD_RELOC_LARCH_ALIGN); -+ -+ /* We need to start a new frag after the alignment which may be removed by -+ the linker, to prevent the assembler from computing static offsets. -+ This is necessary to get correct EH info. */ -+ frag_wane (frag_now); -+ frag_new (0); -+ -+ return true; -+} -+ - /* Fill in an rs_align_code fragment. We want to fill 'andi $r0,$r0,0'. */ - void - loongarch_handle_align (fragS *fragp) -@@ -1360,8 +1691,210 @@ loongarch_handle_align (fragS *fragp) - fragp->fr_var = size; - } - -+/* Scan uleb128 subtraction expressions and insert fixups for them. -+ e.g., .uleb128 .L1 - .L0 -+ Because relaxation may change the value of the subtraction, we -+ must resolve them at link-time. */ -+ -+static void -+loongarch_insert_uleb128_fixes (bfd *abfd ATTRIBUTE_UNUSED, -+ asection *sec, void *xxx ATTRIBUTE_UNUSED) -+{ -+ segment_info_type *seginfo = seg_info (sec); -+ struct frag *fragP; -+ -+ subseg_set (sec, 0); -+ -+ for (fragP = seginfo->frchainP->frch_root; -+ fragP; fragP = fragP->fr_next) -+ { -+ expressionS *exp, *exp_dup; -+ -+ if (fragP->fr_type != rs_leb128 || fragP->fr_symbol == NULL) -+ continue; -+ -+ exp = symbol_get_value_expression (fragP->fr_symbol); -+ -+ if (exp->X_op != O_subtract) -+ continue; -+ -+ /* FIXME: Skip for .sleb128. */ -+ if (fragP->fr_subtype != 0) -+ continue; -+ -+ exp_dup = xmemdup (exp, sizeof (*exp), sizeof (*exp)); -+ exp_dup->X_op = O_symbol; -+ exp_dup->X_op_symbol = NULL; -+ -+ exp_dup->X_add_symbol = exp->X_add_symbol; -+ fix_new_exp (fragP, fragP->fr_fix, 0, -+ exp_dup, 0, BFD_RELOC_LARCH_ADD_ULEB128); -+ -+ /* From binutils/testsuite/binutils-all/dw5.S -+ section .debug_rnglists -+ .uleb128 .Letext0-.Ltext0 Range length (*.LLRL2) -+ Offset Info Type Symbol's Value Symbol's Name + Addend -+0000000000000015 0000000200000079 R_LARCH_ADD_ULEB128 0000000000000000 .text + 2 -+0000000000000015 000000020000007a R_LARCH_SUB_ULEB128 0000000000000000 .text + 0. */ -+ -+ /* Only the ADD_ULEB128 has X_add_number (Addend)? */ -+ exp_dup->X_add_number = 0; -+ exp_dup->X_add_symbol = exp->X_op_symbol; -+ fix_new_exp (fragP, fragP->fr_fix, 0, -+ exp_dup, 0, BFD_RELOC_LARCH_SUB_ULEB128); -+ } -+} -+ -+void -+loongarch_md_finish (void) -+{ -+ /* Insert relocations for uleb128 directives, so the values can be recomputed -+ at link time. */ -+ if (LARCH_opts.relax) -+ bfd_map_over_sections (stdoutput, loongarch_insert_uleb128_fixes, NULL); -+} -+ - void - loongarch_elf_final_processing (void) - { - elf_elfheader (stdoutput)->e_flags = LARCH_opts.ase_abi; - } -+ -+/* Compute the length of a branch sequence, and adjust the stored length -+ accordingly. If FRAGP is NULL, the worst-case length is returned. */ -+static unsigned -+loongarch_relaxed_branch_length (fragS *fragp, asection *sec, int update) -+{ -+ int length = 4; -+ -+ if (!fragp) -+ return 8; -+ -+ if (fragp->fr_symbol != NULL -+ && S_IS_DEFINED (fragp->fr_symbol) -+ && !S_IS_WEAK (fragp->fr_symbol) -+ && sec == S_GET_SEGMENT (fragp->fr_symbol)) -+ { -+ offsetT val = S_GET_VALUE (fragp->fr_symbol) + fragp->fr_offset; -+ -+ val -= fragp->fr_address + fragp->fr_fix; -+ -+ if (RELAX_BRANCH_16 == fragp->fr_subtype -+ && OUT_OF_RANGE (val, 16, 2)) -+ { -+ length = 8; -+ if (update) -+ fragp->fr_subtype = RELAX_BRANCH_26; -+ } -+ -+ if (RELAX_BRANCH_21 == fragp->fr_subtype -+ && OUT_OF_RANGE (val, 21, 2)) -+ { -+ length = 8; -+ if (update) -+ fragp->fr_subtype = RELAX_BRANCH_26; -+ } -+ -+ if (RELAX_BRANCH_26 == fragp->fr_subtype) -+ length = 8; -+ } -+ -+ return length; -+} -+ -+int -+loongarch_relax_frag (asection *sec ATTRIBUTE_UNUSED, -+ fragS *fragp ATTRIBUTE_UNUSED, -+ long stretch ATTRIBUTE_UNUSED) -+{ -+ if (RELAX_BRANCH (fragp->fr_subtype)) -+ { -+ offsetT old_var = fragp->fr_var; -+ fragp->fr_var = loongarch_relaxed_branch_length (fragp, sec, true); -+ return fragp->fr_var - old_var; -+ } -+ return 0; -+} -+ -+/* Expand far branches to multi-instruction sequences. -+ Branch instructions: -+ beq, bne, blt, bgt, bltz, bgtz, ble, bge, blez, bgez -+ bltu, bgtu, bleu, bgeu -+ beqz, bnez, bceqz, bcnez. */ -+ -+static void -+loongarch_convert_frag_branch (fragS *fragp) -+{ -+ bfd_byte *buf; -+ expressionS exp; -+ fixS *fixp; -+ insn_t insn; -+ -+ buf = (bfd_byte *)fragp->fr_literal + fragp->fr_fix; -+ -+ exp.X_op = O_symbol; -+ exp.X_add_symbol = fragp->fr_symbol; -+ exp.X_add_number = fragp->fr_offset; -+ -+ gas_assert ((fragp->fr_subtype & 0xf) == fragp->fr_var); -+ -+ /* blt $t0, $t1, .L1 -+ nop -+ change to: -+ bge $t0, $t1, .L2 -+ b .L1 -+ .L2: -+ nop */ -+ switch (fragp->fr_subtype) -+ { -+ case RELAX_BRANCH_26: -+ insn = bfd_getl32 (buf); -+ /* Invert the branch condition. */ -+ if (LARCH_FLOAT_BRANCH == (insn & LARCH_BRANCH_OPCODE_MASK)) -+ insn ^= LARCH_FLOAT_BRANCH_INVERT_BIT; -+ else -+ insn ^= LARCH_BRANCH_INVERT_BIT; -+ insn |= ENCODE_BRANCH16_IMM (8); /* Set target to PC + 8. */ -+ bfd_putl32 (insn, buf); -+ buf += 4; -+ -+ /* Add the B instruction and jump to the original target. */ -+ bfd_putl32 (LARCH_B, buf); -+ fixp = fix_new_exp (fragp, buf - (bfd_byte *)fragp->fr_literal, -+ 4, &exp, false, BFD_RELOC_LARCH_B26); -+ buf += 4; -+ break; -+ case RELAX_BRANCH_21: -+ fixp = fix_new_exp (fragp, buf - (bfd_byte *)fragp->fr_literal, -+ 4, &exp, false, BFD_RELOC_LARCH_B21); -+ buf += 4; -+ break; -+ case RELAX_BRANCH_16: -+ fixp = fix_new_exp (fragp, buf - (bfd_byte *)fragp->fr_literal, -+ 4, &exp, false, BFD_RELOC_LARCH_B16); -+ buf += 4; -+ break; -+ -+ default: -+ abort(); -+ } -+ -+ fixp->fx_file = fragp->fr_file; -+ fixp->fx_line = fragp->fr_line; -+ -+ gas_assert (buf == (bfd_byte *)fragp->fr_literal -+ + fragp->fr_fix + fragp->fr_var); -+ -+ fragp->fr_fix += fragp->fr_var; -+} -+ -+/* Relax a machine dependent frag. This returns the amount by which -+ the current size of the frag should change. */ -+ -+void -+md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec ATTRIBUTE_UNUSED, -+ fragS *fragp) -+{ -+ gas_assert (RELAX_BRANCH (fragp->fr_subtype)); -+ loongarch_convert_frag_branch (fragp); -+} -diff --git a/gas/config/tc-loongarch.h b/gas/config/tc-loongarch.h -index c75a819..c75d888 100644 ---- a/gas/config/tc-loongarch.h -+++ b/gas/config/tc-loongarch.h -@@ -21,6 +21,8 @@ - #ifndef TC_LOONGARCH - #define TC_LOONGARCH - -+#include "opcode/loongarch.h" -+ - #define TARGET_BYTES_BIG_ENDIAN 0 - #define TARGET_ARCH bfd_arch_loongarch - -@@ -47,16 +49,55 @@ extern int loongarch_relax_frag (asection *, struct frag *, long); - #define md_undefined_symbol(name) (0) - #define md_operand(x) - --/* This is called to see whether a reloc against a defined symbol -- should be converted into a reloc against a section. */ --extern int loongarch_fix_adjustable (struct fix *fix); --#define tc_fix_adjustable(fixp) loongarch_fix_adjustable(fixp) -+extern bool loongarch_frag_align_code (int); -+#define md_do_align(N, FILL, LEN, MAX, LABEL) \ -+ if ((N) != 0 && !(FILL) && !need_pass_2 && subseg_text_p (now_seg)) \ -+ { \ -+ if (loongarch_frag_align_code (N)) \ -+ goto LABEL; \ -+ } -+ -+/* The following two macros let the linker resolve all the relocs -+ due to relaxation. -+ -+ This is called to see whether a reloc against a defined symbol -+ should be converted into a reloc against a section. -+ -+ If relax and norelax have different value may cause ld ".eh_frame_hdr -+ refers to overlapping FDEs" error when link relax .o and norelax .o. */ -+#define tc_fix_adjustable(fixp) 0 -+ -+/* Tne difference between same-section symbols may be affected by linker -+ relaxation, so do not resolve such expressions in the assembler. */ -+#define md_allow_local_subtract(l,r,s) 0 - - /* Values passed to md_apply_fix don't include symbol values. */ - #define TC_FORCE_RELOCATION_SUB_LOCAL(FIX, SEG) 1 -+ - #define TC_VALIDATE_FIX_SUB(FIX, SEG) 1 - #define DIFF_EXPR_OK 1 - -+/* Postpone text-section label subtraction calculation until linking, since -+ linker relaxations might change the deltas. */ -+#define TC_FORCE_RELOCATION_SUB_SAME(FIX, SEC) \ -+ (LARCH_opts.relax ? \ -+ (GENERIC_FORCE_RELOCATION_SUB_SAME (FIX, SEC) \ -+ || ((SEC)->flags & SEC_CODE) != 0 \ -+ || ((SEC)->flags & SEC_DEBUGGING) != 0 \ -+ || TC_FORCE_RELOCATION (FIX)) \ -+ : (GENERIC_FORCE_RELOCATION_SUB_SAME (FIX, SEC))) \ -+ -+#define TC_LINKRELAX_FIXUP(seg) ((seg->flags & SEC_CODE) \ -+ || (seg->flags & SEC_DEBUGGING)) -+ -+#define TC_FORCE_RELOCATION_LOCAL(FIX) 1 -+ -+/* Adjust debug_line after relaxation. */ -+#define DWARF2_USE_FIXED_ADVANCE_PC 1 -+ -+/* Values passed to md_apply_fix don't include symbol values. */ -+#define MD_APPLY_SYM_VALUE(FIX) 0 -+ - #define TARGET_USE_CFIPOP 1 - #define DWARF2_DEFAULT_RETURN_COLUMN 1 /* $ra. */ - #define DWARF2_CIE_DATA_ALIGNMENT -4 -@@ -65,13 +106,16 @@ extern int loongarch_fix_adjustable (struct fix *fix); - loongarch_cfi_frame_initial_instructions - extern void loongarch_cfi_frame_initial_instructions (void); - -+#define tc_symbol_new_hook(sym) \ -+ if (0 == strcmp (sym->bsym->name, FAKE_LABEL_NAME)) \ -+ S_SET_OTHER (sym, STV_HIDDEN); -+ - #define tc_parse_to_dw2regnum tc_loongarch_parse_to_dw2regnum - extern void tc_loongarch_parse_to_dw2regnum (expressionS *); - --/* A enumerated values to specific how to deal with align in '.text'. -- Now we want to fill 'andi $r0,$r0,0x0'. -- Here is the type 0, will fill andi insn later. */ --#define NOP_OPCODE (0x00) -+extern void loongarch_pre_output_hook (void); -+#define md_pre_output_hook loongarch_pre_output_hook () -+#define GAS_SORT_RELOCS 1 - - #define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0 - -@@ -90,4 +134,7 @@ struct reloc_info - expressionS value; - }; - -+#define md_finish loongarch_md_finish -+extern void loongarch_md_finish (void); -+ - #endif -diff --git a/gas/testsuite/gas/all/align.d b/gas/testsuite/gas/all/align.d -index c701f25..43c1413 100644 ---- a/gas/testsuite/gas/all/align.d -+++ b/gas/testsuite/gas/all/align.d -@@ -3,8 +3,9 @@ - # The RX port will always replace zeros in any aligned area with NOPs, - # even if the user requested that they filled with zeros. - # RISC-V handles alignment via relaxation and therefor won't have object files --# with the expected alignment. --#notarget: riscv*-* rx-* -+# LoongArch handles alignment via relaxation and therefor won't have object -+# files with the expected alignment. -+#notarget: loongarch*-* riscv*-* rx-* - - # Test the alignment pseudo-op. - -diff --git a/gas/testsuite/gas/all/gas.exp b/gas/testsuite/gas/all/gas.exp -index 81d1121..706cc79 100644 ---- a/gas/testsuite/gas/all/gas.exp -+++ b/gas/testsuite/gas/all/gas.exp -@@ -67,14 +67,14 @@ if { ![istarget alpha*-*-*vms*] - && ![istarget ft32-*-*] - && ![istarget hppa*-*-*] - && ![istarget microblaze-*-*] -+ && ![istarget loongarch*-*-*] - && ![istarget mn10300-*-*] - && ![istarget msp430*-*-*] - && ![istarget powerpc*-*-aix*] - && ![istarget riscv*-*-*] - && ![istarget rl78-*-*] - && ![istarget rs6000*-*-aix*] -- && ![istarget rx-*-*] -- && ![istarget loongarch*-*-*] } then { -+ && ![istarget rx-*-*] } then { - gas_test_error "diff1.s" "" "difference of two undefined symbols" - } - -@@ -165,11 +165,11 @@ switch -glob $target_triplet { - # These targets fail redef2 because they disallow redefined - # symbols on relocs. - setup_xfail "m68hc1*-*-*" "m6811-*-*" "m6812-*-*" "rl78-*-*" -- setup_xfail "riscv*-*-*" "rx-*-*" "vax*-*-*" "xgate*-*-*" "z8k-*-*" -+ setup_xfail "loongarch*-*-*" "riscv*-*-*" "rx-*-*" "vax*-*-*" "xgate*-*-*" "z8k-*-*" - setup_xfail "avr-*-*" - run_dump_test redef2 - setup_xfail "m68hc1*-*-*" "m6811-*-*" "m6812-*-*" "rl78-*-*" -- setup_xfail "riscv*-*-*" "rx-*-*" "vax*-*-*" "xgate*-*-*" "z8k-*-*" -+ setup_xfail "loongarch*-*-*" "riscv*-*-*" "rx-*-*" "vax*-*-*" "xgate*-*-*" "z8k-*-*" - setup_xfail "avr-*-*" - # rs6000-aix disallows redefinition via .comm. - if [is_xcoff_format] { -@@ -281,7 +281,7 @@ if { ![istarget *c30*-*-*] - # The vax fails because VMS can apparently actually handle this - # case in relocs, so gas doesn't handle it itself. - # msp430, mn10[23]00 and riscv emit two relocs to handle the difference of two symbols. -- setup_xfail "am3*-*-*" "mn10200-*-*" "mn10300*-*-*" "msp430*-*-*" "riscv*-*-*" "vax*-*-vms*" -+ setup_xfail "am3*-*-*" "loongarch*-*-*" "mn10200-*-*" "mn10300*-*-*" "msp430*-*-*" "riscv*-*-*" "vax*-*-vms*" - do_930509a - } - -diff --git a/gas/testsuite/gas/all/relax.d b/gas/testsuite/gas/all/relax.d -index f394043..00fba6d 100644 ---- a/gas/testsuite/gas/all/relax.d -+++ b/gas/testsuite/gas/all/relax.d -@@ -4,6 +4,10 @@ - # because symbol values are not known until after linker relaxation has been - # performed. - #notarget : riscv*-*-* -+# LoongArch doesn't resolve .uleb operands that are the difference of two -+# symbols because gas write zero to object file and generate add_uleb128 and -+# sub_uleb128 reloc pair. -+#xfail: loongarch*-*-* - - .*: .* - -diff --git a/gas/testsuite/gas/elf/dwarf-5-irp.d b/gas/testsuite/gas/elf/dwarf-5-irp.d -index 048a6d5..6bcdc66 100644 ---- a/gas/testsuite/gas/elf/dwarf-5-irp.d -+++ b/gas/testsuite/gas/elf/dwarf-5-irp.d -@@ -5,7 +5,8 @@ - # The bfin target does not allow .subsection with an equated symbol as operand. - # The d30v target emits sufficiently different debug info, apparently also covering padding it inserts. - # The riscv targets do not support the subtraction of symbols. --#xfail: am33*-* bfin-* cr16-* crx-* d30v-* ft32-* mn10*-* msp430-* nds32*-* riscv*-* rl78-* -+# The loongarch targets do not support the subtraction of symbols. -+#xfail: am33*-* bfin-* cr16-* crx-* d30v-* ft32-* loongarch*-* mn10*-* msp430-* nds32*-* riscv*-* rl78-* - - Raw dump of debug contents .* - #... -diff --git a/gas/testsuite/gas/elf/dwarf-5-loc0.d b/gas/testsuite/gas/elf/dwarf-5-loc0.d -index 9439d10..9338271 100644 ---- a/gas/testsuite/gas/elf/dwarf-5-loc0.d -+++ b/gas/testsuite/gas/elf/dwarf-5-loc0.d -@@ -3,7 +3,8 @@ - #name: DWARF5 .loc 0 - # The am33 cr16 crx ft32 mn10 msp430 nds32 and rl78 targets do not evaluate the subtraction of symbols at assembly time. - # The riscv targets do not support the subtraction of symbols. --#xfail: am3*-* cr16-* crx-* ft32*-* mn10*-* msp430-* nds32*-* riscv*-* rl78-* -+# The loongarch targets do not support the subtraction of symbols. -+#xfail: am3*-* cr16-* crx-* ft32*-* loongarch*-* mn10*-* msp430-* nds32*-* riscv*-* rl78-* - - Contents of the \.debug_line section: - -diff --git a/gas/testsuite/gas/elf/dwarf-5-macro-include.d b/gas/testsuite/gas/elf/dwarf-5-macro-include.d -index 32ea638..c39425a 100644 ---- a/gas/testsuite/gas/elf/dwarf-5-macro-include.d -+++ b/gas/testsuite/gas/elf/dwarf-5-macro-include.d -@@ -4,7 +4,7 @@ - # The am33 cr16 crx ft32 mn10* msp430 nds32* and rl78 targets do not evaluate the subtraction of symbols at assembly time. - # The d30v target emits sufficiently different debug info, apparently also covering padding it inserts. - # The riscv targets do not support the subtraction of symbols. --#xfail: am33*-* cr16-* crx-* d30v-* ft32-* mn10*-* msp430-* nds32*-* riscv*-* rl78-* -+#xfail: am33*-* cr16-* crx-* d30v-* ft32-* loongarch*-* mn10*-* msp430-* nds32*-* riscv*-* rl78-* - - Raw dump of debug contents .* - #... -diff --git a/gas/testsuite/gas/elf/dwarf-5-macro.d b/gas/testsuite/gas/elf/dwarf-5-macro.d -index 794e17a..b2613bd 100644 ---- a/gas/testsuite/gas/elf/dwarf-5-macro.d -+++ b/gas/testsuite/gas/elf/dwarf-5-macro.d -@@ -4,7 +4,7 @@ - # The am33 cr16 crx ft32 mn10* msp430 nds32* and rl78 targets do not evaluate the subtraction of symbols at assembly time. - # The d30v target emits sufficiently different debug info, apparently also covering padding it inserts. - # The riscv targets do not support the subtraction of symbols. --#xfail: am33*-* cr16-* crx-* d30v-* ft32-* mn10*-* msp430-* nds32*-* riscv*-* rl78-* -+#xfail: am33*-* cr16-* crx-* d30v-* ft32-* loongarch*-* mn10*-* msp430-* nds32*-* riscv*-* rl78-* - - Raw dump of debug contents .* - #... -diff --git a/gas/testsuite/gas/elf/dwarf2-11.d b/gas/testsuite/gas/elf/dwarf2-11.d -index 2c30e55..44f5cd1 100644 ---- a/gas/testsuite/gas/elf/dwarf2-11.d -+++ b/gas/testsuite/gas/elf/dwarf2-11.d -@@ -3,7 +3,8 @@ - #name: DWARF2 11 - # The am33 cr16 crx ft32 mn10 msp430 nds32 and rl78 targets do not evaluate the subtraction of symbols at assembly time. - # The riscv targets do not support the subtraction of symbols. --#xfail: am3*-* cr16-* crx-* ft32*-* mn10*-* msp430-* nds32*-* riscv*-* rl78-* -+# The loongarch targets do not support the subtraction of symbols. -+#xfail: am3*-* cr16-* crx-* ft32*-* loongarch*-* mn10*-* msp430-* nds32*-* riscv*-* rl78-* - - Contents of the \.debug_line section: - -diff --git a/gas/testsuite/gas/elf/dwarf2-15.d b/gas/testsuite/gas/elf/dwarf2-15.d -index 939c615..3ec9f27 100644 ---- a/gas/testsuite/gas/elf/dwarf2-15.d -+++ b/gas/testsuite/gas/elf/dwarf2-15.d -@@ -3,7 +3,8 @@ - #name: DWARF2 15 - # The am33 cr16 crx ft32 mn10 msp430 nds32 and rl78 targets do not evaluate the subtraction of symbols at assembly time. - # The riscv targets do not support the subtraction of symbols. --#xfail: am3*-* cr16-* crx-* ft32*-* mn10*-* msp430-* nds32*-* riscv*-* rl78-* -+# The loongarch targets do not support the subtraction of symbols. -+#xfail: am3*-* cr16-* crx-* ft32*-* loongarch*-* mn10*-* msp430-* nds32*-* riscv*-* rl78-* - - Hex dump of section '\.rodata': - 0x00000000 01 *.* -diff --git a/gas/testsuite/gas/elf/dwarf2-16.d b/gas/testsuite/gas/elf/dwarf2-16.d -index 8e35d49..32b5776 100644 ---- a/gas/testsuite/gas/elf/dwarf2-16.d -+++ b/gas/testsuite/gas/elf/dwarf2-16.d -@@ -4,7 +4,8 @@ - # The am33 cr16 crx ft32 mn10 msp430 nds32 and rl78 targets do not evaluate the subtraction of symbols at assembly time. - # The mep target tries to relay code sections which breaks symbolic view computations. - # The riscv targets do not support the subtraction of symbols. --#xfail: am3*-* cr16-* crx-* ft32*-* mep-* mn10*-* msp430-* nds32*-* riscv*-* rl78-* -+# The loongarch targets do not support the subtraction of symbols. -+#xfail: am3*-* cr16-* crx-* ft32*-* mep-* loongarch*-* mn10*-* msp430-* nds32*-* riscv*-* rl78-* - - Hex dump of section '\.rodata': - 0x00000000 01 *.* -diff --git a/gas/testsuite/gas/elf/dwarf2-17.d b/gas/testsuite/gas/elf/dwarf2-17.d -index 881477c..4c2f2e3 100644 ---- a/gas/testsuite/gas/elf/dwarf2-17.d -+++ b/gas/testsuite/gas/elf/dwarf2-17.d -@@ -4,7 +4,8 @@ - # The am33 cr16 crx ft32 mn10 msp430 nds32 and rl78 targets do not evaluate the subtraction of symbols at assembly time. - # The mep target tries to relay code sections which breaks symbolic view computations. - # The riscv targets do not support the subtraction of symbols. --#xfail: am3*-* cr16-* crx-* ft32*-* mep-* mn10*-* msp430-* nds32*-* riscv*-* rl78-* -+# The loongarch targets do not support the subtraction of symbols. -+#xfail: am3*-* cr16-* crx-* ft32*-* loongarch*-* mep-* mn10*-* msp430-* nds32*-* riscv*-* rl78-* - - Hex dump of section '\.rodata': - 0x00000000 00 *.* -diff --git a/gas/testsuite/gas/elf/dwarf2-18.d b/gas/testsuite/gas/elf/dwarf2-18.d -index fbaebaa..18157c6 100644 ---- a/gas/testsuite/gas/elf/dwarf2-18.d -+++ b/gas/testsuite/gas/elf/dwarf2-18.d -@@ -3,7 +3,8 @@ - #name: DWARF2 18 - # The am33 cr16 crx ft32 mn10 msp430 nds32 and rl78 targets do not evaluate the subtraction of symbols at assembly time. - # The riscv targets do not support the subtraction of symbols. --#xfail: am3*-* cr16-* crx-* ft32*-* mn10*-* msp430-* nds32*-* riscv*-* rl78-* -+# The loongarch targets do not support the subtraction of symbols. -+#xfail: am3*-* cr16-* crx-* ft32*-* loongarch*-* mn10*-* msp430-* nds32*-* riscv*-* rl78-* - - Hex dump of section '\.rodata': - 0x00000000 0100 *.* -diff --git a/gas/testsuite/gas/elf/dwarf2-19.d b/gas/testsuite/gas/elf/dwarf2-19.d -index 55d0caf..133294a 100644 ---- a/gas/testsuite/gas/elf/dwarf2-19.d -+++ b/gas/testsuite/gas/elf/dwarf2-19.d -@@ -4,7 +4,8 @@ - # The am33 cr16 crx ft32 mn10 msp430 nds32 and rl78 targets do not evaluate the subtraction of symbols at assembly time. - # The mep targets turns some view computations into complex relocations. - # The riscv targets do not support the subtraction of symbols. --#xfail: am3*-* cr16-* crx-* ft32*-* mep-* mn10*-* msp430-* nds32*-* riscv*-* rl78-* -+# The loongarch targets do not support the subtraction of symbols. -+#xfail: am3*-* cr16-* crx-* ft32*-* mep-* loongarch*-* mn10*-* msp430-* nds32*-* riscv*-* rl78-* - - Hex dump of section '\.rodata': - 0x00000000 01000102 *.* -diff --git a/gas/testsuite/gas/elf/dwarf2-5.d b/gas/testsuite/gas/elf/dwarf2-5.d -index ced12e7..886f1a1 100644 ---- a/gas/testsuite/gas/elf/dwarf2-5.d -+++ b/gas/testsuite/gas/elf/dwarf2-5.d -@@ -4,7 +4,8 @@ - # The am33 cr16 crx ft32 mn10 msp430 nds32 rl78 and rx targets do not evaluate the subtraction of symbols at assembly time. - # The mep target tries to relay code sections which breaks symbolic view computations. - # The riscv targets do not support the subtraction of symbols. --#xfail: am3*-* cr16-* crx-* ft32*-* mep-* mn10*-* msp430-* nds32*-* riscv*-* rl78-* rx-* -+# The loongarch targets do not support the subtraction of symbols. -+#xfail: am3*-* cr16-* crx-* ft32*-* loongarch*-* mep-* mn10*-* msp430-* nds32*-* riscv*-* rl78-* rx-* - - Hex dump of section '\.rodata': - 0x00000000 01010201 010203 *.* -diff --git a/gas/testsuite/gas/elf/ehopt0.d b/gas/testsuite/gas/elf/ehopt0.d -index a13c4f2..64c5fb5 100644 ---- a/gas/testsuite/gas/elf/ehopt0.d -+++ b/gas/testsuite/gas/elf/ehopt0.d -@@ -1,5 +1,8 @@ - #objdump: -s -j .eh_frame - #name: elf ehopt0 -+# The loongarch target do not evaluate .eh_frame fde cfa advance loc at assembly time. -+# Because loongarch use add/sub reloc evaluate cfa advance loc, so gas should write 0 to cfa advance loc address. -+#xfail: loongarch*-* - - .*: +file format .* - -diff --git a/gas/testsuite/gas/elf/elf.exp b/gas/testsuite/gas/elf/elf.exp -index e274135..4890dd9 100644 ---- a/gas/testsuite/gas/elf/elf.exp -+++ b/gas/testsuite/gas/elf/elf.exp -@@ -72,6 +72,9 @@ if { [is_elf_format] } then { - if {[istarget "csky*-*-*"]} { - set target_machine -csky - } -+ if {[istarget "loongarch*-*-*"]} then { -+ set dump_opts {{as -mno-relax}} -+ } - if {[istarget "m32r*-*-*"]} then { - set target_machine -m32r - } -diff --git a/gas/testsuite/gas/elf/section11.d b/gas/testsuite/gas/elf/section11.d -index 427aea6..277fa6d 100644 ---- a/gas/testsuite/gas/elf/section11.d -+++ b/gas/testsuite/gas/elf/section11.d -@@ -2,8 +2,8 @@ - #readelf: -S --wide - #name: Disabling section padding - # The RX port uses non standard section names. --#xfail: rx-*-* --# RISC-V handles alignment via linker relaxation, so object files don't have -+#xfail: loongarch*-* rx-*-* -+# LoongArch and RISC-V handles alignment via linker relaxation, so object files don't have - # the expected alignment. - #xfail: riscv*-*-* - -diff --git a/gas/testsuite/gas/lns/lns.exp b/gas/testsuite/gas/lns/lns.exp -index 244b0e2..26dc253 100644 ---- a/gas/testsuite/gas/lns/lns.exp -+++ b/gas/testsuite/gas/lns/lns.exp -@@ -31,6 +31,7 @@ if { ![istarget s390*-*-*] } { - || [istarget cr16-*-*] - || [istarget crx-*-*] - || [istarget ft32*-*] -+ || [istarget loongarch*-*-*] - || [istarget mn10*-*-*] - || [istarget msp430-*-*] - || [istarget nds32*-*-*] -diff --git a/gas/testsuite/gas/loongarch/64_pcrel.d b/gas/testsuite/gas/loongarch/64_pcrel.d -new file mode 100644 -index 0000000..66b80a3 ---- /dev/null -+++ b/gas/testsuite/gas/loongarch/64_pcrel.d -@@ -0,0 +1,11 @@ -+#as: -+#objdump: -dr -+ -+.*:[ ]+file format .* -+ -+ -+Disassembly of section .text: -+ -+00000000.* <.text>: -+[ ]+0:[ ]+03400000[ ]+nop[ ]+ -+[ ]+0:[ ]+R_LARCH_64_PCREL[ ]+\*ABS\* -diff --git a/gas/testsuite/gas/loongarch/64_pcrel.s b/gas/testsuite/gas/loongarch/64_pcrel.s -new file mode 100644 -index 0000000..932e1bf ---- /dev/null -+++ b/gas/testsuite/gas/loongarch/64_pcrel.s -@@ -0,0 +1,2 @@ -+nop -+.reloc 0, R_LARCH_64_PCREL, 0 -diff --git a/gas/testsuite/gas/loongarch/deprecated_reg_aliases.d b/gas/testsuite/gas/loongarch/deprecated_reg_aliases.d -new file mode 100644 -index 0000000..3ea0806 ---- /dev/null -+++ b/gas/testsuite/gas/loongarch/deprecated_reg_aliases.d -@@ -0,0 +1,18 @@ -+#name: Deprecated register aliases -+#as-new: -+#objdump: -d -+#warning_output: deprecated_reg_aliases.l -+#skip: loongarch32-*-* -+ -+.*:[ ]+file format .* -+ -+ -+Disassembly of section .text: -+ -+0000000000000000 : -+[ ]+0:[ ]+14acf125[ ]+lu12i\.w[ ]+\$a1, 354185 -+[ ]+4:[ ]+038048a5[ ]+ori[ ]+\$a1, \$a1, 0x12 -+[ ]+8:[ ]+16024685[ ]+lu32i\.d[ ]+\$a1, 4660 -+[ ]+c:[ ]+08200420[ ]+fmadd\.d[ ]+\$fa0, \$fa1, \$fa1, \$fa0 -+[ ]+10:[ ]+380c16a4[ ]+ldx\.d[ ]+\$a0, \$r21, \$a1 -+[ ]+14:[ ]+4c000020[ ]+ret[ ]+ -diff --git a/gas/testsuite/gas/loongarch/deprecated_reg_aliases.l b/gas/testsuite/gas/loongarch/deprecated_reg_aliases.l -new file mode 100644 -index 0000000..b82c209 ---- /dev/null -+++ b/gas/testsuite/gas/loongarch/deprecated_reg_aliases.l -@@ -0,0 +1,7 @@ -+.*Assembler messages: -+.*:2: Warning: register alias \$v1 is deprecated, use \$a1 instead -+.*:3: Warning: register alias \$fv0 is deprecated, use \$fa0 instead -+.*:3: Warning: register alias \$fv1 is deprecated, use \$fa1 instead -+.*:3: Warning: register alias \$fv1 is deprecated, use \$fa1 instead -+.*:4: Warning: register alias \$v0 is deprecated, use \$a0 instead -+.*:4: Warning: register alias \$x is deprecated, use \$r21 instead -diff --git a/gas/testsuite/gas/loongarch/deprecated_reg_aliases.s b/gas/testsuite/gas/loongarch/deprecated_reg_aliases.s -new file mode 100644 -index 0000000..7848346 ---- /dev/null -+++ b/gas/testsuite/gas/loongarch/deprecated_reg_aliases.s -@@ -0,0 +1,5 @@ -+foo: -+ li.d $v1, 0x123456789012 -+ fmadd.d $fv0, $fv1, $fv1, $fa0 -+ ldx.d $v0, $x, $a1 -+ ret -diff --git a/gas/testsuite/gas/loongarch/float_op.d b/gas/testsuite/gas/loongarch/float_op.d -index cdc41d4..f9d3b89 100644 ---- a/gas/testsuite/gas/loongarch/float_op.d -+++ b/gas/testsuite/gas/loongarch/float_op.d -@@ -49,8 +49,8 @@ Disassembly of section .text: - [ ]+9c:[ ]+0114b424 [ ]+movfr2gr.s[ ]+[ ]+\$a0, \$fa1 - [ ]+a0:[ ]+0114b824 [ ]+movfr2gr.d[ ]+[ ]+\$a0, \$fa1 - [ ]+a4:[ ]+0114bc24 [ ]+movfrh2gr.s [ ]+\$a0, \$fa1 --[ ]+a8:[ ]+0114c0a4 [ ]+movgr2fcsr[ ]+[ ]+\$a0, \$a1 --[ ]+ac:[ ]+0114c8a4 [ ]+movfcsr2gr[ ]+[ ]+\$a0, \$a1 -+[ ]+a8:[ ]+0114c0a0 [ ]+movgr2fcsr[ ]+[ ]+\$fcsr0, \$a1 -+[ ]+ac:[ ]+0114c804 [ ]+movfcsr2gr[ ]+[ ]+\$a0, \$fcsr0 - [ ]+b0:[ ]+0114d020 [ ]+movfr2cf[ ]+[ ]+\$fcc0, \$fa1 - [ ]+b4:[ ]+0114d4a0 [ ]+movcf2fr[ ]+[ ]+\$fa0, \$fcc5 - [ ]+b8:[ ]+0114d8a0 [ ]+movgr2cf[ ]+[ ]+\$fcc0, \$a1 -diff --git a/gas/testsuite/gas/loongarch/float_op.s b/gas/testsuite/gas/loongarch/float_op.s -index da1a198..2e3ec5b 100644 ---- a/gas/testsuite/gas/loongarch/float_op.s -+++ b/gas/testsuite/gas/loongarch/float_op.s -@@ -40,8 +40,8 @@ movgr2frh.w $f0,$r5 - movfr2gr.s $r4,$f1 - movfr2gr.d $r4,$f1 - movfrh2gr.s $r4,$f1 --movgr2fcsr $r4,$r5 --movfcsr2gr $r4,$r5 -+movgr2fcsr $fcsr0,$r5 -+movfcsr2gr $r4,$fcsr0 - movfr2cf $fcc0,$f1 - movcf2fr $f0,$fcc5 - movgr2cf $fcc0,$r5 -diff --git a/gas/testsuite/gas/loongarch/imm_ins.d b/gas/testsuite/gas/loongarch/imm_ins.d -index 0ceaead..f00110c 100644 ---- a/gas/testsuite/gas/loongarch/imm_ins.d -+++ b/gas/testsuite/gas/loongarch/imm_ins.d -@@ -8,11 +8,11 @@ - Disassembly of section .text: - - 00000000.* <.text>: --[ ]+0:[ ]+03848c0c[ ]+ori[ ]+\$t0,[ ]+\$zero,[ ]+0x123 --[ ]+4:[ ]+15ffe00d[ ]+lu12i.w[ ]+\$t1,[ ]+-256\(0xfff00\) --[ ]+8:[ ]+16001fed[ ]+lu32i.d[ ]+\$t1,[ ]+255\(0xff\) --[ ]+c:[ ]+02bffc0e[ ]+addi.w[ ]+\$t2,[ ]+\$zero,[ ]+-1\(0xfff\) --[ ]+10:[ ]+1601ffee[ ]+lu32i.d[ ]+\$t2,[ ]+4095\(0xfff\) -+[ ]+0:[ ]+03848c0c[ ]+li.w[ ]+\$t0,[ ]+0x123 -+[ ]+4:[ ]+15ffe00d[ ]+lu12i.w[ ]+\$t1,[ ]+-256 -+[ ]+8:[ ]+16001fed[ ]+lu32i.d[ ]+\$t1,[ ]+255 -+[ ]+c:[ ]+02bffc0e[ ]+li.w[ ]+\$t2,[ ]+-1 -+[ ]+10:[ ]+1601ffee[ ]+lu32i.d[ ]+\$t2,[ ]+4095 - [ ]+14:[ ]+0004b58b[ ]+alsl.w[ ]+\$a7,[ ]+\$t0,[ ]+\$t1,[ ]+0x2 - [ ]+18:[ ]+0006b58b[ ]+alsl.wu[ ]+\$a7,[ ]+\$t0,[ ]+\$t1,[ ]+0x2 - [ ]+1c:[ ]+0009358b[ ]+bytepick.w[ ]+\$a7,[ ]+\$t0,[ ]+\$t1,[ ]+0x2 -@@ -31,50 +31,50 @@ Disassembly of section .text: - [ ]+50:[ ]+008209ac[ ]+bstrins.d[ ]+\$t0,[ ]+\$t1,[ ]+0x2,[ ]+0x2 - [ ]+54:[ ]+00c209ac[ ]+bstrpick.d[ ]+\$t0,[ ]+\$t1,[ ]+0x2,[ ]+0x2 - [ ]+58:[ ]+00c209ac[ ]+bstrpick.d[ ]+\$t0,[ ]+\$t1,[ ]+0x2,[ ]+0x2 --[ ]+5c:[ ]+02048dac[ ]+slti[ ]+\$t0,[ ]+\$t1,[ ]+291\(0x123\) --[ ]+60:[ ]+02448dac[ ]+sltui[ ]+\$t0,[ ]+\$t1,[ ]+291\(0x123\) --[ ]+64:[ ]+02848dac[ ]+addi.w[ ]+\$t0,[ ]+\$t1,[ ]+291\(0x123\) --[ ]+68:[ ]+02c48dac[ ]+addi.d[ ]+\$t0,[ ]+\$t1,[ ]+291\(0x123\) --[ ]+6c:[ ]+03048dac[ ]+lu52i.d[ ]+\$t0,[ ]+\$t1,[ ]+291\(0x123\) -+[ ]+5c:[ ]+02048dac[ ]+slti[ ]+\$t0,[ ]+\$t1,[ ]+291 -+[ ]+60:[ ]+02448dac[ ]+sltui[ ]+\$t0,[ ]+\$t1,[ ]+291 -+[ ]+64:[ ]+02848dac[ ]+addi.w[ ]+\$t0,[ ]+\$t1,[ ]+291 -+[ ]+68:[ ]+02c48dac[ ]+addi.d[ ]+\$t0,[ ]+\$t1,[ ]+291 -+[ ]+6c:[ ]+03048dac[ ]+lu52i.d[ ]+\$t0,[ ]+\$t1,[ ]+291 - [ ]+70:[ ]+034009ac[ ]+andi[ ]+\$t0,[ ]+\$t1,[ ]+0x2 - [ ]+74:[ ]+038009ac[ ]+ori[ ]+\$t0,[ ]+\$t1,[ ]+0x2 - [ ]+78:[ ]+03c009ac[ ]+xori[ ]+\$t0,[ ]+\$t1,[ ]+0x2 --[ ]+7c:[ ]+100009ac[ ]+addu16i.d[ ]+\$t0,[ ]+\$t1,[ ]+2\(0x2\) --[ ]+80:[ ]+1400246c[ ]+lu12i.w[ ]+\$t0,[ ]+291\(0x123\) --[ ]+84:[ ]+1600246c[ ]+lu32i.d[ ]+\$t0,[ ]+291\(0x123\) --[ ]+88:[ ]+1800246c[ ]+pcaddi[ ]+\$t0,[ ]+291\(0x123\) --[ ]+8c:[ ]+1a00246c[ ]+pcalau12i[ ]+\$t0,[ ]+291\(0x123\) --[ ]+90:[ ]+1c00246c[ ]+pcaddu12i[ ]+\$t0,[ ]+291\(0x123\) --[ ]+94:[ ]+1e00246c[ ]+pcaddu18i[ ]+\$t0,[ ]+291\(0x123\) -+[ ]+7c:[ ]+100009ac[ ]+addu16i.d[ ]+\$t0,[ ]+\$t1,[ ]+2 -+[ ]+80:[ ]+1400246c[ ]+lu12i.w[ ]+\$t0,[ ]+291 -+[ ]+84:[ ]+1600246c[ ]+lu32i.d[ ]+\$t0,[ ]+291 -+[ ]+88:[ ]+1800246c[ ]+pcaddi[ ]+\$t0,[ ]+291 -+[ ]+8c:[ ]+1a00246c[ ]+pcalau12i[ ]+\$t0,[ ]+291 -+[ ]+90:[ ]+1c00246c[ ]+pcaddu12i[ ]+\$t0,[ ]+291 -+[ ]+94:[ ]+1e00246c[ ]+pcaddu18i[ ]+\$t0,[ ]+291 - [ ]+98:[ ]+04048c0c[ ]+csrrd[ ]+\$t0,[ ]+0x123 - [ ]+9c:[ ]+04048c2c[ ]+csrwr[ ]+\$t0,[ ]+0x123 - [ ]+a0:[ ]+040009ac[ ]+csrxchg[ ]+\$t0,[ ]+\$t1,[ ]+0x2 --[ ]+a4:[ ]+060009a2[ ]+cacop[ ]+0x2,[ ]+\$t1,[ ]+2\(0x2\) -+[ ]+a4:[ ]+060009a2[ ]+cacop[ ]+0x2,[ ]+\$t1,[ ]+2 - [ ]+a8:[ ]+064009ac[ ]+lddir[ ]+\$t0,[ ]+\$t1,[ ]+0x2 - [ ]+ac:[ ]+06440980[ ]+ldpte[ ]+\$t0,[ ]+0x2 - [ ]+b0:[ ]+0649b9a2[ ]+invtlb[ ]+0x2,[ ]+\$t1,[ ]+\$t2 --[ ]+b4:[ ]+200101ac[ ]+ll.w[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+b8:[ ]+210101ac[ ]+sc.w[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+bc:[ ]+220101ac[ ]+ll.d[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+c0:[ ]+230101ac[ ]+sc.d[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+c4:[ ]+240101ac[ ]+ldptr.w[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+c8:[ ]+250101ac[ ]+stptr.w[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+cc:[ ]+260101ac[ ]+ldptr.d[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+d0:[ ]+270101ac[ ]+stptr.d[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+d4:[ ]+280401ac[ ]+ld.b[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+d8:[ ]+284401ac[ ]+ld.h[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+dc:[ ]+288401ac[ ]+ld.w[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+e0:[ ]+28c401ac[ ]+ld.d[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+e4:[ ]+290401ac[ ]+st.b[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+e8:[ ]+294401ac[ ]+st.h[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+ec:[ ]+298401ac[ ]+st.w[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+f0:[ ]+29c401ac[ ]+st.d[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+f4:[ ]+2a0401ac[ ]+ld.bu[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+f8:[ ]+2a4401ac[ ]+ld.hu[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+fc:[ ]+2a8401ac[ ]+ld.wu[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+100:[ ]+2ac401a2[ ]+preld[ ]+0x2,[ ]+\$t1,[ ]+256\(0x100\) -+[ ]+b4:[ ]+200101ac[ ]+ll.w[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+b8:[ ]+210101ac[ ]+sc.w[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+bc:[ ]+220101ac[ ]+ll.d[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+c0:[ ]+230101ac[ ]+sc.d[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+c4:[ ]+240101ac[ ]+ldptr.w[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+c8:[ ]+250101ac[ ]+stptr.w[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+cc:[ ]+260101ac[ ]+ldptr.d[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+d0:[ ]+270101ac[ ]+stptr.d[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+d4:[ ]+280401ac[ ]+ld.b[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+d8:[ ]+284401ac[ ]+ld.h[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+dc:[ ]+288401ac[ ]+ld.w[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+e0:[ ]+28c401ac[ ]+ld.d[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+e4:[ ]+290401ac[ ]+st.b[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+e8:[ ]+294401ac[ ]+st.h[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+ec:[ ]+298401ac[ ]+st.w[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+f0:[ ]+29c401ac[ ]+st.d[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+f4:[ ]+2a0401ac[ ]+ld.bu[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+f8:[ ]+2a4401ac[ ]+ld.hu[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+fc:[ ]+2a8401ac[ ]+ld.wu[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+100:[ ]+2ac401a2[ ]+preld[ ]+0x2,[ ]+\$t1,[ ]+256 - [ ]+104:[ ]+382c39a2[ ]+preldx[ ]+0x2,[ ]+\$t1,[ ]+\$t2 --[ ]+108:[ ]+2b048d8a[ ]+fld.s[ ]+\$ft2,[ ]+\$t0,[ ]+291\(0x123\) --[ ]+10c:[ ]+2b448d8a[ ]+fst.s[ ]+\$ft2,[ ]+\$t0,[ ]+291\(0x123\) --[ ]+110:[ ]+2b848d8a[ ]+fld.d[ ]+\$ft2,[ ]+\$t0,[ ]+291\(0x123\) --[ ]+114:[ ]+2bc48d8a[ ]+fst.d[ ]+\$ft2,[ ]+\$t0,[ ]+291\(0x123\) -+[ ]+108:[ ]+2b048d8a[ ]+fld.s[ ]+\$ft2,[ ]+\$t0,[ ]+291 -+[ ]+10c:[ ]+2b448d8a[ ]+fst.s[ ]+\$ft2,[ ]+\$t0,[ ]+291 -+[ ]+110:[ ]+2b848d8a[ ]+fld.d[ ]+\$ft2,[ ]+\$t0,[ ]+291 -+[ ]+114:[ ]+2bc48d8a[ ]+fst.d[ ]+\$ft2,[ ]+\$t0,[ ]+291 -diff --git a/gas/testsuite/gas/loongarch/imm_ins_32.d b/gas/testsuite/gas/loongarch/imm_ins_32.d -index 0a826bf..dc2eeb9 100644 ---- a/gas/testsuite/gas/loongarch/imm_ins_32.d -+++ b/gas/testsuite/gas/loongarch/imm_ins_32.d -@@ -8,7 +8,7 @@ - Disassembly of section .text: - - 00000000.* <.text>: --[ ]+0:[ ]+03848c0c[ ]+ori[ ]+\$t0,[ ]+\$zero,[ ]+0x123 -+[ ]+0:[ ]+03848c0c[ ]+li.w[ ]+\$t0,[ ]+0x123 - [ ]+4:[ ]+0004b58b[ ]+alsl.w[ ]+\$a7,[ ]+\$t0,[ ]+\$t1,[ ]+0x2 - [ ]+8:[ ]+0006b58b[ ]+alsl.wu[ ]+\$a7,[ ]+\$t0,[ ]+\$t1,[ ]+0x2 - [ ]+c:[ ]+0009358b[ ]+bytepick.w[ ]+\$a7,[ ]+\$t0,[ ]+\$t1,[ ]+0x2 -@@ -19,39 +19,39 @@ Disassembly of section .text: - [ ]+20:[ ]+0044898b[ ]+srli.w[ ]+\$a7,[ ]+\$t0,[ ]+0x2 - [ ]+24:[ ]+004889ac[ ]+srai.w[ ]+\$t0,[ ]+\$t1,[ ]+0x2 - [ ]+28:[ ]+006209ac[ ]+bstrins.w[ ]+\$t0,[ ]+\$t1,[ ]+0x2,[ ]+0x2 --[ ]+2c:[ ]+02048dac[ ]+slti[ ]+\$t0,[ ]+\$t1,[ ]+291\(0x123\) --[ ]+30:[ ]+02448dac[ ]+sltui[ ]+\$t0,[ ]+\$t1,[ ]+291\(0x123\) --[ ]+34:[ ]+02848dac[ ]+addi.w[ ]+\$t0,[ ]+\$t1,[ ]+291\(0x123\) -+[ ]+2c:[ ]+02048dac[ ]+slti[ ]+\$t0,[ ]+\$t1,[ ]+291 -+[ ]+30:[ ]+02448dac[ ]+sltui[ ]+\$t0,[ ]+\$t1,[ ]+291 -+[ ]+34:[ ]+02848dac[ ]+addi.w[ ]+\$t0,[ ]+\$t1,[ ]+291 - [ ]+38:[ ]+034009ac[ ]+andi[ ]+\$t0,[ ]+\$t1,[ ]+0x2 - [ ]+3c:[ ]+038009ac[ ]+ori[ ]+\$t0,[ ]+\$t1,[ ]+0x2 - [ ]+40:[ ]+03c009ac[ ]+xori[ ]+\$t0,[ ]+\$t1,[ ]+0x2 --[ ]+44:[ ]+1400246c[ ]+lu12i.w[ ]+\$t0,[ ]+291\(0x123\) --[ ]+48:[ ]+1800246c[ ]+pcaddi[ ]+\$t0,[ ]+291\(0x123\) --[ ]+4c:[ ]+1a00246c[ ]+pcalau12i[ ]+\$t0,[ ]+291\(0x123\) --[ ]+50:[ ]+1c00246c[ ]+pcaddu12i[ ]+\$t0,[ ]+291\(0x123\) --[ ]+54:[ ]+1e00246c[ ]+pcaddu18i[ ]+\$t0,[ ]+291\(0x123\) -+[ ]+44:[ ]+1400246c[ ]+lu12i.w[ ]+\$t0,[ ]+291 -+[ ]+48:[ ]+1800246c[ ]+pcaddi[ ]+\$t0,[ ]+291 -+[ ]+4c:[ ]+1a00246c[ ]+pcalau12i[ ]+\$t0,[ ]+291 -+[ ]+50:[ ]+1c00246c[ ]+pcaddu12i[ ]+\$t0,[ ]+291 -+[ ]+54:[ ]+1e00246c[ ]+pcaddu18i[ ]+\$t0,[ ]+291 - [ ]+58:[ ]+04048c0c[ ]+csrrd[ ]+\$t0,[ ]+0x123 - [ ]+5c:[ ]+04048c2c[ ]+csrwr[ ]+\$t0,[ ]+0x123 - [ ]+60:[ ]+040009ac[ ]+csrxchg[ ]+\$t0,[ ]+\$t1,[ ]+0x2 --[ ]+64:[ ]+060009a2[ ]+cacop[ ]+0x2,[ ]+\$t1,[ ]+2\(0x2\) -+[ ]+64:[ ]+060009a2[ ]+cacop[ ]+0x2,[ ]+\$t1,[ ]+2 - [ ]+68:[ ]+064009ac[ ]+lddir[ ]+\$t0,[ ]+\$t1,[ ]+0x2 - [ ]+6c:[ ]+06440980[ ]+ldpte[ ]+\$t0,[ ]+0x2 - [ ]+70:[ ]+0649b9a2[ ]+invtlb[ ]+0x2,[ ]+\$t1,[ ]+\$t2 --[ ]+74:[ ]+200101ac[ ]+ll.w[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+78:[ ]+210101ac[ ]+sc.w[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+7c:[ ]+220101ac[ ]+ll.d[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+80:[ ]+230101ac[ ]+sc.d[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+84:[ ]+240101ac[ ]+ldptr.w[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+88:[ ]+250101ac[ ]+stptr.w[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+8c:[ ]+284401ac[ ]+ld.h[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+90:[ ]+288401ac[ ]+ld.w[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+94:[ ]+290401ac[ ]+st.b[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+98:[ ]+294401ac[ ]+st.h[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+9c:[ ]+298401ac[ ]+st.w[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+a0:[ ]+2a0401ac[ ]+ld.bu[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+a4:[ ]+2a4401ac[ ]+ld.hu[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+a8:[ ]+2a8401ac[ ]+ld.wu[ ]+\$t0,[ ]+\$t1,[ ]+256\(0x100\) --[ ]+ac:[ ]+2ac401a2[ ]+preld[ ]+0x2,[ ]+\$t1,[ ]+256\(0x100\) -+[ ]+74:[ ]+200101ac[ ]+ll.w[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+78:[ ]+210101ac[ ]+sc.w[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+7c:[ ]+220101ac[ ]+ll.d[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+80:[ ]+230101ac[ ]+sc.d[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+84:[ ]+240101ac[ ]+ldptr.w[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+88:[ ]+250101ac[ ]+stptr.w[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+8c:[ ]+284401ac[ ]+ld.h[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+90:[ ]+288401ac[ ]+ld.w[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+94:[ ]+290401ac[ ]+st.b[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+98:[ ]+294401ac[ ]+st.h[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+9c:[ ]+298401ac[ ]+st.w[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+a0:[ ]+2a0401ac[ ]+ld.bu[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+a4:[ ]+2a4401ac[ ]+ld.hu[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+a8:[ ]+2a8401ac[ ]+ld.wu[ ]+\$t0,[ ]+\$t1,[ ]+256 -+[ ]+ac:[ ]+2ac401a2[ ]+preld[ ]+0x2,[ ]+\$t1,[ ]+256 - [ ]+b0:[ ]+382c39a2[ ]+preldx[ ]+0x2,[ ]+\$t1,[ ]+\$t2 --[ ]+b4:[ ]+2b048d8a[ ]+fld.s[ ]+\$ft2,[ ]+\$t0,[ ]+291\(0x123\) --[ ]+b8:[ ]+2b448d8a[ ]+fst.s[ ]+\$ft2,[ ]+\$t0,[ ]+291\(0x123\) -+[ ]+b4:[ ]+2b048d8a[ ]+fld.s[ ]+\$ft2,[ ]+\$t0,[ ]+291 -+[ ]+b8:[ ]+2b448d8a[ ]+fst.s[ ]+\$ft2,[ ]+\$t0,[ ]+291 -diff --git a/gas/testsuite/gas/loongarch/imm_op.d b/gas/testsuite/gas/loongarch/imm_op.d -index a017aaf..3d4cba4 100644 ---- a/gas/testsuite/gas/loongarch/imm_op.d -+++ b/gas/testsuite/gas/loongarch/imm_op.d -@@ -8,20 +8,20 @@ Disassembly of section .text: - - 00000000.* <.text>: - [ ]+0:[ ]+020000a4 [ ]+slti[ ]+[ ]+\$a0, \$a1, 0 --[ ]+4:[ ]+021ffca4 [ ]+slti[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) --[ ]+8:[ ]+022004a4 [ ]+slti[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) -+[ ]+4:[ ]+021ffca4 [ ]+slti[ ]+[ ]+\$a0, \$a1, 2047 -+[ ]+8:[ ]+022004a4 [ ]+slti[ ]+[ ]+\$a0, \$a1, -2047 - [ ]+c:[ ]+024000a4 [ ]+sltui[ ]+[ ]+\$a0, \$a1, 0 --[ ]+10:[ ]+025ffca4 [ ]+sltui[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) --[ ]+14:[ ]+026004a4 [ ]+sltui[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) -+[ ]+10:[ ]+025ffca4 [ ]+sltui[ ]+[ ]+\$a0, \$a1, 2047 -+[ ]+14:[ ]+026004a4 [ ]+sltui[ ]+[ ]+\$a0, \$a1, -2047 - [ ]+18:[ ]+028000a4 [ ]+addi.w[ ]+[ ]+\$a0, \$a1, 0 --[ ]+1c:[ ]+029ffca4 [ ]+addi.w[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) --[ ]+20:[ ]+02a004a4 [ ]+addi.w[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) -+[ ]+1c:[ ]+029ffca4 [ ]+addi.w[ ]+[ ]+\$a0, \$a1, 2047 -+[ ]+20:[ ]+02a004a4 [ ]+addi.w[ ]+[ ]+\$a0, \$a1, -2047 - [ ]+24:[ ]+02c000a4 [ ]+addi.d[ ]+[ ]+\$a0, \$a1, 0 --[ ]+28:[ ]+02dffca4 [ ]+addi.d[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) --[ ]+2c:[ ]+02e004a4 [ ]+addi.d[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) -+[ ]+28:[ ]+02dffca4 [ ]+addi.d[ ]+[ ]+\$a0, \$a1, 2047 -+[ ]+2c:[ ]+02e004a4 [ ]+addi.d[ ]+[ ]+\$a0, \$a1, -2047 - [ ]+30:[ ]+030000a4 [ ]+lu52i.d[ ]+[ ]+\$a0, \$a1, 0 --[ ]+34:[ ]+031ffca4 [ ]+lu52i.d[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) --[ ]+38:[ ]+032004a4 [ ]+lu52i.d[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) -+[ ]+34:[ ]+031ffca4 [ ]+lu52i.d[ ]+[ ]+\$a0, \$a1, 2047 -+[ ]+38:[ ]+032004a4 [ ]+lu52i.d[ ]+[ ]+\$a0, \$a1, -2047 - [ ]+3c:[ ]+034000a4 [ ]+andi[ ]+[ ]+\$a0, \$a1, 0x0 - [ ]+40:[ ]+035ffca4 [ ]+andi[ ]+[ ]+\$a0, \$a1, 0x7ff - [ ]+44:[ ]+038000a4 [ ]+ori[ ]+[ ]+\$a0, \$a1, 0x0 -@@ -29,20 +29,20 @@ Disassembly of section .text: - [ ]+4c:[ ]+03c000a4 [ ]+xori[ ]+[ ]+\$a0, \$a1, 0x0 - [ ]+50:[ ]+03dffca4 [ ]+xori[ ]+[ ]+\$a0, \$a1, 0x7ff - [ ]+54:[ ]+100000a4 [ ]+addu16i.d[ ]+[ ]+\$a0, \$a1, 0 --[ ]+58:[ ]+11fffca4 [ ]+addu16i.d[ ]+[ ]+\$a0, \$a1, 32767\(0x7fff\) --[ ]+5c:[ ]+120004a4 [ ]+addu16i.d[ ]+[ ]+\$a0, \$a1, -32767\(0x8001\) -+[ ]+58:[ ]+11fffca4 [ ]+addu16i.d[ ]+[ ]+\$a0, \$a1, 32767 -+[ ]+5c:[ ]+120004a4 [ ]+addu16i.d[ ]+[ ]+\$a0, \$a1, -32767 - [ ]+60:[ ]+14000004 [ ]+lu12i.w[ ]+[ ]+\$a0, 0 --[ ]+64:[ ]+14ffffe4 [ ]+lu12i.w[ ]+[ ]+\$a0, 524287\(0x7ffff\) --[ ]+68:[ ]+17000024 [ ]+lu32i.d[ ]+[ ]+\$a0, -524287\(0x80001\) -+[ ]+64:[ ]+14ffffe4 [ ]+lu12i.w[ ]+[ ]+\$a0, 524287 -+[ ]+68:[ ]+17000024 [ ]+lu32i.d[ ]+[ ]+\$a0, -524287 - [ ]+6c:[ ]+18000004 [ ]+pcaddi[ ]+[ ]+\$a0, 0 --[ ]+70:[ ]+18ffffe4 [ ]+pcaddi[ ]+[ ]+\$a0, 524287\(0x7ffff\) --[ ]+74:[ ]+19000024 [ ]+pcaddi[ ]+[ ]+\$a0, -524287\(0x80001\) -+[ ]+70:[ ]+18ffffe4 [ ]+pcaddi[ ]+[ ]+\$a0, 524287 -+[ ]+74:[ ]+19000024 [ ]+pcaddi[ ]+[ ]+\$a0, -524287 - [ ]+78:[ ]+1a000004 [ ]+pcalau12i[ ]+[ ]+\$a0, 0 --[ ]+7c:[ ]+1affffe4 [ ]+pcalau12i[ ]+[ ]+\$a0, 524287\(0x7ffff\) --[ ]+80:[ ]+1b000024 [ ]+pcalau12i[ ]+[ ]+\$a0, -524287\(0x80001\) -+[ ]+7c:[ ]+1affffe4 [ ]+pcalau12i[ ]+[ ]+\$a0, 524287 -+[ ]+80:[ ]+1b000024 [ ]+pcalau12i[ ]+[ ]+\$a0, -524287 - [ ]+84:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0 --[ ]+88:[ ]+1cffffe4 [ ]+pcaddu12i[ ]+[ ]+\$a0, 524287\(0x7ffff\) --[ ]+8c:[ ]+1d000024 [ ]+pcaddu12i[ ]+[ ]+\$a0, -524287\(0x80001\) -+[ ]+88:[ ]+1cffffe4 [ ]+pcaddu12i[ ]+[ ]+\$a0, 524287 -+[ ]+8c:[ ]+1d000024 [ ]+pcaddu12i[ ]+[ ]+\$a0, -524287 - [ ]+90:[ ]+1e000004 [ ]+pcaddu18i[ ]+[ ]+\$a0, 0 --[ ]+94:[ ]+1effffe4 [ ]+pcaddu18i[ ]+[ ]+\$a0, 524287\(0x7ffff\) --[ ]+98:[ ]+1f000024 [ ]+pcaddu18i[ ]+[ ]+\$a0, -524287\(0x80001\) -+[ ]+94:[ ]+1effffe4 [ ]+pcaddu18i[ ]+[ ]+\$a0, 524287 -+[ ]+98:[ ]+1f000024 [ ]+pcaddu18i[ ]+[ ]+\$a0, -524287 -diff --git a/gas/testsuite/gas/loongarch/jmp_op.d b/gas/testsuite/gas/loongarch/jmp_op.d -index 218c13f..cc544f1 100644 ---- a/gas/testsuite/gas/loongarch/jmp_op.d -+++ b/gas/testsuite/gas/loongarch/jmp_op.d -@@ -6,26 +6,45 @@ - - Disassembly of section .text: - --00000000.* <.text>: --[ ]+0:[ ]+03400000[ ]+[ ]+andi[ ]+\$zero, \$zero, 0x0 --[ ]+4:[ ]+63fffc04[ ]+[ ]+blt[ ]+\$zero, \$a0, -4\(0x3fffc\)[ ]+# 0x0 --[ ]+8:[ ]+67fff880[ ]+[ ]+bge[ ]+\$a0, \$zero, -8\(0x3fff8\)[ ]+# 0x0 --[ ]+c:[ ]+67fff404[ ]+[ ]+bge[ ]+\$zero, \$a0, -12\(0x3fff4\)[ ]+# 0x0 --[ ]+10:[ ]+43fff09f[ ]+[ ]+beqz[ ]+\$a0, -16\(0x7ffff0\)[ ]+# 0x0 --[ ]+14:[ ]+47ffec9f[ ]+[ ]+bnez[ ]+\$a0, -20\(0x7fffec\)[ ]+# 0x0 --[ ]+18:[ ]+4bffe81f[ ]+[ ]+bceqz[ ]+\$fcc0, -24\(0x7fffe8\)[ ]+# 0x0 --[ ]+1c:[ ]+4bffe51f[ ]+[ ]+bcnez[ ]+\$fcc0, -28\(0x7fffe4\)[ ]+# 0x0 --[ ]+20:[ ]+4c000080[ ]+[ ]+jirl[ ]+\$zero, \$a0, 0 --[ ]+24:[ ]+53ffdfff[ ]+[ ]+b[ ]+-36\(0xfffffdc\)[ ]+# 0x0 --[ ]+28:[ ]+57ffdbff[ ]+[ ]+bl[ ]+-40\(0xfffffd8\)[ ]+# 0x0 --[ ]+2c:[ ]+5bffd485[ ]+[ ]+beq[ ]+\$a0, \$a1, -44\(0x3ffd4\)[ ]+# 0x0 --[ ]+30:[ ]+5fffd085[ ]+[ ]+bne[ ]+\$a0, \$a1, -48\(0x3ffd0\)[ ]+# 0x0 --[ ]+34:[ ]+63ffcc85[ ]+[ ]+blt[ ]+\$a0, \$a1, -52\(0x3ffcc\)[ ]+# 0x0 --[ ]+38:[ ]+63ffc8a4[ ]+[ ]+blt[ ]+\$a1, \$a0, -56\(0x3ffc8\)[ ]+# 0x0 --[ ]+3c:[ ]+67ffc485[ ]+[ ]+bge[ ]+\$a0, \$a1, -60\(0x3ffc4\)[ ]+# 0x0 --[ ]+40:[ ]+67ffc0a4[ ]+[ ]+bge[ ]+\$a1, \$a0, -64\(0x3ffc0\)[ ]+# 0x0 --[ ]+44:[ ]+6bffbc85[ ]+[ ]+bltu[ ]+\$a0, \$a1, -68\(0x3ffbc\)[ ]+# 0x0 --[ ]+48:[ ]+6bffb8a4[ ]+[ ]+bltu[ ]+\$a1, \$a0, -72\(0x3ffb8\)[ ]+# 0x0 --[ ]+4c:[ ]+6fffb485[ ]+[ ]+bgeu[ ]+\$a0, \$a1, -76\(0x3ffb4\)[ ]+# 0x0 --[ ]+50:[ ]+6fffb0a4[ ]+[ ]+bgeu[ ]+\$a1, \$a0, -80\(0x3ffb0\)[ ]+# 0x0 --[ ]+54:[ ]+4c000020[ ]+[ ]+jirl[ ]+\$zero, \$ra, 0 -+00000000.* <.L1>: -+[ ]+0:[ ]+03400000[ ]+nop[ ]+ -+[ ]+4:[ ]+63fffc04[ ]+bgtz[ ]+\$a0,[ ]+-4[ ]+#[ ]+0[ ]+<\.L1> -+[ ]+4:[ ]+R_LARCH_B16[ ]+\.L1 -+[ ]+8:[ ]+67fff880[ ]+bgez[ ]+\$a0,[ ]+-8[ ]+#[ ]+0[ ]+<\.L1> -+[ ]+8:[ ]+R_LARCH_B16[ ]+\.L1 -+[ ]+c:[ ]+67fff404[ ]+blez[ ]+\$a0,[ ]+-12[ ]+#[ ]+0[ ]+<\.L1> -+[ ]+c:[ ]+R_LARCH_B16[ ]+\.L1 -+[ ]+10:[ ]+43fff09f[ ]+beqz[ ]+\$a0,[ ]+-16[ ]+#[ ]+0[ ]+<\.L1> -+[ ]+10:[ ]+R_LARCH_B21[ ]+\.L1 -+[ ]+14:[ ]+47ffec9f[ ]+bnez[ ]+\$a0,[ ]+-20[ ]+#[ ]+0[ ]+<\.L1> -+[ ]+14:[ ]+R_LARCH_B21[ ]+\.L1 -+[ ]+18:[ ]+4bffe81f[ ]+bceqz[ ]+\$fcc0,[ ]+-24[ ]+#[ ]+0[ ]+<\.L1> -+[ ]+18:[ ]+R_LARCH_B21[ ]+\.L1 -+[ ]+1c:[ ]+4bffe51f[ ]+bcnez[ ]+\$fcc0,[ ]+-28[ ]+#[ ]+0[ ]+<\.L1> -+[ ]+1c:[ ]+R_LARCH_B21[ ]+\.L1 -+[ ]+20:[ ]+4c000080[ ]+jr[ ]+\$a0 -+[ ]+24:[ ]+53ffdfff[ ]+b[ ]+-36[ ]+#[ ]+0[ ]+<\.L1> -+[ ]+24:[ ]+R_LARCH_B26[ ]+\.L1 -+[ ]+28:[ ]+57ffdbff[ ]+bl[ ]+-40[ ]+#[ ]+0[ ]+<\.L1> -+[ ]+28:[ ]+R_LARCH_B26[ ]+\.L1 -+[ ]+2c:[ ]+5bffd485[ ]+beq[ ]+\$a0,[ ]+\$a1,[ ]+-44[ ]+#[ ]+0[ ]+<\.L1> -+[ ]+2c:[ ]+R_LARCH_B16[ ]+\.L1 -+[ ]+30:[ ]+5fffd085[ ]+bne[ ]+\$a0,[ ]+\$a1,[ ]+-48[ ]+#[ ]+0[ ]+<\.L1> -+[ ]+30:[ ]+R_LARCH_B16[ ]+\.L1 -+[ ]+34:[ ]+63ffcc85[ ]+blt[ ]+\$a0,[ ]+\$a1,[ ]+-52[ ]+#[ ]+0[ ]+<\.L1> -+[ ]+34:[ ]+R_LARCH_B16[ ]+\.L1 -+[ ]+38:[ ]+63ffc8a4[ ]+blt[ ]+\$a1,[ ]+\$a0,[ ]+-56[ ]+#[ ]+0[ ]+<\.L1> -+[ ]+38:[ ]+R_LARCH_B16[ ]+\.L1 -+[ ]+3c:[ ]+67ffc485[ ]+bge[ ]+\$a0,[ ]+\$a1,[ ]+-60[ ]+#[ ]+0[ ]+<\.L1> -+[ ]+3c:[ ]+R_LARCH_B16[ ]+\.L1 -+[ ]+40:[ ]+67ffc0a4[ ]+bge[ ]+\$a1,[ ]+\$a0,[ ]+-64[ ]+#[ ]+0[ ]+<\.L1> -+[ ]+40:[ ]+R_LARCH_B16[ ]+\.L1 -+[ ]+44:[ ]+6bffbc85[ ]+bltu[ ]+\$a0,[ ]+\$a1,[ ]+-68[ ]+#[ ]+0[ ]+<\.L1> -+[ ]+44:[ ]+R_LARCH_B16[ ]+\.L1 -+[ ]+48:[ ]+6bffb8a4[ ]+bltu[ ]+\$a1,[ ]+\$a0,[ ]+-72[ ]+#[ ]+0[ ]+<\.L1> -+[ ]+48:[ ]+R_LARCH_B16[ ]+\.L1 -+[ ]+4c:[ ]+6fffb485[ ]+bgeu[ ]+\$a0,[ ]+\$a1,[ ]+-76[ ]+#[ ]+0[ ]+<\.L1> -+[ ]+4c:[ ]+R_LARCH_B16[ ]+\.L1 -+[ ]+50:[ ]+6fffb0a4[ ]+bgeu[ ]+\$a1,[ ]+\$a0,[ ]+-80[ ]+#[ ]+0[ ]+<\.L1> -+[ ]+50:[ ]+R_LARCH_B16[ ]+\.L1 -+[ ]+54:[ ]+4c000020[ ]+ret[ ]+ -diff --git a/gas/testsuite/gas/loongarch/la_branch_relax_1.d b/gas/testsuite/gas/loongarch/la_branch_relax_1.d -new file mode 100644 -index 0000000..7984b6d ---- /dev/null -+++ b/gas/testsuite/gas/loongarch/la_branch_relax_1.d -@@ -0,0 +1,64 @@ -+#as: -+#objdump: -dr -+ -+.*:[ ]+file format .* -+ -+ -+Disassembly of section .text: -+ -+0* <.L1>: -+[ ]+... -+[ ]+48d158:[ ]+5c00098d[ ]+bne[ ]+\$t0, \$t1, 8[ ]+# 48d160 <.L1\+0x48d160> -+[ ]+48d15c:[ ]+532ea7ed[ ]+b[ ]+-4772188[ ]+# 0 <.L1> -+[ ]+48d15c: R_LARCH_B26[ ]+.L1 -+[ ]+48d160:[ ]+5800098d[ ]+beq[ ]+\$t0, \$t1, 8[ ]+# 48d168 <.L1\+0x48d168> -+[ ]+48d164:[ ]+532e9fed[ ]+b[ ]+-4772196[ ]+# 0 <.L1> -+[ ]+48d164: R_LARCH_B26[ ]+.L1 -+[ ]+48d168:[ ]+6400098d[ ]+bge[ ]+\$t0, \$t1, 8[ ]+# 48d170 <.L1\+0x48d170> -+[ ]+48d16c:[ ]+532e97ed[ ]+b[ ]+-4772204[ ]+# 0 <.L1> -+[ ]+48d16c: R_LARCH_B26[ ]+.L1 -+[ ]+48d170:[ ]+640009ac[ ]+bge[ ]+\$t1, \$t0, 8[ ]+# 48d178 <.L1\+0x48d178> -+[ ]+48d174:[ ]+532e8fed[ ]+b[ ]+-4772212[ ]+# 0 <.L1> -+[ ]+48d174: R_LARCH_B26[ ]+.L1 -+[ ]+48d178:[ ]+64000980[ ]+bgez[ ]+\$t0, 8[ ]+# 48d180 <.L1\+0x48d180> -+[ ]+48d17c:[ ]+532e87ed[ ]+b[ ]+-4772220[ ]+# 0 <.L1> -+[ ]+48d17c: R_LARCH_B26[ ]+.L1 -+[ ]+48d180:[ ]+6400080c[ ]+blez[ ]+\$t0, 8[ ]+# 48d188 <.L1\+0x48d188> -+[ ]+48d184:[ ]+532e7fed[ ]+b[ ]+-4772228[ ]+# 0 <.L1> -+[ ]+48d184: R_LARCH_B26[ ]+.L1 -+[ ]+48d188:[ ]+600009ac[ ]+blt[ ]+\$t1, \$t0, 8[ ]+# 48d190 <.L1\+0x48d190> -+[ ]+48d18c:[ ]+532e77ed[ ]+b[ ]+-4772236[ ]+# 0 <.L1> -+[ ]+48d18c: R_LARCH_B26[ ]+.L1 -+[ ]+48d190:[ ]+6000098d[ ]+blt[ ]+\$t0, \$t1, 8[ ]+# 48d198 <.L1\+0x48d198> -+[ ]+48d194:[ ]+532e6fed[ ]+b[ ]+-4772244[ ]+# 0 <.L1> -+[ ]+48d194: R_LARCH_B26[ ]+.L1 -+[ ]+48d198:[ ]+6000080c[ ]+bgtz[ ]+\$t0, 8[ ]+# 48d1a0 <.L1\+0x48d1a0> -+[ ]+48d19c:[ ]+532e67ed[ ]+b[ ]+-4772252[ ]+# 0 <.L1> -+[ ]+48d19c: R_LARCH_B26[ ]+.L1 -+[ ]+48d1a0:[ ]+60000980[ ]+bltz[ ]+\$t0, 8[ ]+# 48d1a8 <.L1\+0x48d1a8> -+[ ]+48d1a4:[ ]+532e5fed[ ]+b[ ]+-4772260[ ]+# 0 <.L1> -+[ ]+48d1a4: R_LARCH_B26[ ]+.L1 -+[ ]+48d1a8:[ ]+6c00098d[ ]+bgeu[ ]+\$t0, \$t1, 8[ ]+# 48d1b0 <.L1\+0x48d1b0> -+[ ]+48d1ac:[ ]+532e57ed[ ]+b[ ]+-4772268[ ]+# 0 <.L1> -+[ ]+48d1ac: R_LARCH_B26[ ]+.L1 -+[ ]+48d1b0:[ ]+6c0009ac[ ]+bgeu[ ]+\$t1, \$t0, 8[ ]+# 48d1b8 <.L1\+0x48d1b8> -+[ ]+48d1b4:[ ]+532e4fed[ ]+b[ ]+-4772276[ ]+# 0 <.L1> -+[ ]+48d1b4: R_LARCH_B26[ ]+.L1 -+[ ]+48d1b8:[ ]+680009ac[ ]+bltu[ ]+\$t1, \$t0, 8[ ]+# 48d1c0 <.L1\+0x48d1c0> -+[ ]+48d1bc:[ ]+532e47ed[ ]+b[ ]+-4772284[ ]+# 0 <.L1> -+[ ]+48d1bc: R_LARCH_B26[ ]+.L1 -+[ ]+48d1c0:[ ]+6800098d[ ]+bltu[ ]+\$t0, \$t1, 8[ ]+# 48d1c8 <.L1\+0x48d1c8> -+[ ]+48d1c4:[ ]+532e3fed[ ]+b[ ]+-4772292[ ]+# 0 <.L1> -+[ ]+48d1c4: R_LARCH_B26[ ]+.L1 -+[ ]+48d1c8:[ ]+44000980[ ]+bnez[ ]+\$t0, 8[ ]+# 48d1d0 <.L1\+0x48d1d0> -+[ ]+48d1cc:[ ]+532e37ed[ ]+b[ ]+-4772300[ ]+# 0 <.L1> -+[ ]+48d1cc: R_LARCH_B26[ ]+.L1 -+[ ]+48d1d0:[ ]+40000980[ ]+beqz[ ]+\$t0, 8[ ]+# 48d1d8 <.L1\+0x48d1d8> -+[ ]+48d1d4:[ ]+532e2fed[ ]+b[ ]+-4772308[ ]+# 0 <.L1> -+[ ]+48d1d4: R_LARCH_B26[ ]+.L1 -+[ ]+48d1d8:[ ]+48000900[ ]+bcnez[ ]+\$fcc0, 8[ ]+# 48d1e0 <.L1\+0x48d1e0> -+[ ]+48d1dc:[ ]+532e27ed[ ]+b[ ]+-4772316[ ]+# 0 <.L1> -+[ ]+48d1dc: R_LARCH_B26[ ]+.L1 -+[ ]+48d1e0:[ ]+48000800[ ]+bceqz[ ]+\$fcc0, 8[ ]+# 48d1e8 <.L1\+0x48d1e8> -+[ ]+48d1e4:[ ]+532e1fed[ ]+b[ ]+-4772324[ ]+# 0 <.L1> -+[ ]+48d1e4: R_LARCH_B26[ ]+.L1 -diff --git a/gas/testsuite/gas/loongarch/la_branch_relax_1.s b/gas/testsuite/gas/loongarch/la_branch_relax_1.s -new file mode 100644 -index 0000000..53288f2 ---- /dev/null -+++ b/gas/testsuite/gas/loongarch/la_branch_relax_1.s -@@ -0,0 +1,33 @@ -+# Instruction and Relocation generating tests -+ -+.L1: -+ .fill 0x123456, 4, 0x0 -+ -+# R_LARCH_B16 -+ beq $r12, $r13, .L1 -+ bne $r12, $r13, .L1 -+ -+ blt $r12, $r13, .L1 -+ bgt $r12, $r13, .L1 -+ -+ bltz $r12, .L1 -+ bgtz $r12, .L1 -+ -+ ble $r12, $r13, .L1 -+ bge $r12, $r13, .L1 -+ -+ blez $r12, .L1 -+ bgez $r12, .L1 -+ -+ bltu $r12, $r13, .L1 -+ bgtu $r12, $r13, .L1 -+ -+ bleu $r12, $r13, .L1 -+ bgeu $r12, $r13, .L1 -+ -+# R_LARCH_B21 -+ beqz $r12, .L1 -+ bnez $r12, .L1 -+ -+ bceqz $fcc0, .L1 -+ bcnez $fcc0, .L1 -diff --git a/gas/testsuite/gas/loongarch/la_branch_relax_2.d b/gas/testsuite/gas/loongarch/la_branch_relax_2.d -new file mode 100644 -index 0000000..4a3c638 ---- /dev/null -+++ b/gas/testsuite/gas/loongarch/la_branch_relax_2.d -@@ -0,0 +1,40 @@ -+#as: -+#objdump: -dr -+ -+.*:[ ]+file format .* -+ -+ -+Disassembly of section .text: -+ -+0* <.L1>: -+[ ]+... -+[ ]+20000:[ ]+5a00018d[ ]+beq[ ]+\$t0, \$t1, -131072[ ]+# 0 <.L1> -+[ ]+20000: R_LARCH_B16[ ]+.L1 -+[ ]+20004:[ ]+5c00098d[ ]+bne[ ]+\$t0, \$t1, 8[ ]+# 2000c <.L1\+0x2000c> -+[ ]+20008:[ ]+51fffbff[ ]+b[ ]+-131080[ ]+# 0 <.L1> -+[ ]+20008: R_LARCH_B26[ ]+.L1 -+[ ]+2000c:[ ]+5c00098d[ ]+bne[ ]+\$t0, \$t1, 8[ ]+# 20014 <.L1\+0x20014> -+[ ]+20010:[ ]+52000000[ ]+b[ ]+131072[ ]+# 40010 <.L2> -+[ ]+20010: R_LARCH_B26[ ]+.L2 -+[ ]+20014:[ ]+59fffd8d[ ]+beq[ ]+\$t0, \$t1, 131068[ ]+# 40010 <.L2> -+[ ]+20014: R_LARCH_B16[ ]+.L2 -+[ ]+... -+0*40010 <.L2>: -+[ ]+... -+[ ]+440010:[ ]+40000190[ ]+beqz[ ]+\$t0, -4194304[ ]+# 40010 <.L2> -+[ ]+440010: R_LARCH_B21[ ]+.L2 -+[ ]+440014:[ ]+44000980[ ]+bnez[ ]+\$t0, 8[ ]+# 44001c <.L2\+0x40000c> -+[ ]+440018:[ ]+53fffbef[ ]+b[ ]+-4194312[ ]+# 40010 <.L2> -+[ ]+440018: R_LARCH_B26[ ]+.L2 -+[ ]+44001c:[ ]+44000980[ ]+bnez[ ]+\$t0, 8[ ]+# 440024 <.L2\+0x400014> -+[ ]+440020:[ ]+50000010[ ]+b[ ]+4194304[ ]+# 840020 <.L3> -+[ ]+440020: R_LARCH_B26[ ]+.L3 -+[ ]+440024:[ ]+43fffd8f[ ]+beqz[ ]+\$t0, 4194300[ ]+# 840020 <.L3> -+[ ]+440024: R_LARCH_B21[ ]+.L3 -+[ ]+... -+0*840020 <.L3>: -+[ ]+840020:[ ]+5800018d[ ]+beq[ ]+\$t0, \$t1, 0[ ]+# 840020 <.L3> -+[ ]+840020: R_LARCH_B16[ ]+.L4 -+0*840024 <.L5>: -+[ ]+840024:[ ]+40000180[ ]+beqz[ ]+\$t0, 0[ ]+# 840024 <.L5> -+[ ]+840024: R_LARCH_B21[ ]+.L5 -diff --git a/gas/testsuite/gas/loongarch/la_branch_relax_2.s b/gas/testsuite/gas/loongarch/la_branch_relax_2.s -new file mode 100644 -index 0000000..3e6c553 ---- /dev/null -+++ b/gas/testsuite/gas/loongarch/la_branch_relax_2.s -@@ -0,0 +1,23 @@ -+# Immediate boundary value tests -+ -+.L1: -+ .fill 0x8000, 4, 0 -+ beq $r12, $r13, .L1 # min imm -0x20000 -+ beq $r12, $r13, .L1 # out of range -+ beq $r12, $r13, .L2 # out of range -+ beq $r12, $r13, .L2 # max imm 0x1fffc -+ .fill 0x7ffe, 4, 0 -+.L2: -+ .fill 0x100000, 4, 0 -+ beqz $r12, .L2 # min imm -0x400000 -+ beqz $r12, .L2 # out of range -+ beqz $r12, .L3 # out of range -+ beqz $r12, .L3 # max imm 0x3ffffc -+ .fill 0xffffe, 4, 0 -+.L3: -+ -+# 0 imm -+.L4: -+ beq $r12, $r13, .L4 -+.L5: -+ beqz $r12, .L5 -diff --git a/gas/testsuite/gas/loongarch/li.d b/gas/testsuite/gas/loongarch/li.d -index 850a3f4..6f5bcd1 100644 ---- a/gas/testsuite/gas/loongarch/li.d -+++ b/gas/testsuite/gas/loongarch/li.d -@@ -8,14 +8,16 @@ - Disassembly of section .text: - - 00000000.* <_start>: --[ ]+0:[ ]+03803c06[ ]+ori[ ]+\$a2,[ ]+\$zero,[ ]+0xf -+[ ]+0:[ ]+03803c06[ ]+li\.w[ ]+\$a2,[ ]+0xf - [ ]+4:[ ]+1a000005[ ]+pcalau12i[ ]+\$a1,[ ]+0 --[ ]+4:[ ]+R_LARCH_PCALA_HI20[ ]+.rodata --[ ]+8:[ ]+02c000a5[ ]+addi.d[ ]+\$a1,[ ]+\$a1,[ ]+0 --[ ]+8:[ ]+R_LARCH_PCALA_LO12[ ]+.rodata --[ ]+c:[ ]+03800404[ ]+ori[ ]+\$a0,[ ]+\$zero,[ ]+0x1 --[ ]+10:[ ]+0381000b[ ]+ori[ ]+\$a7,[ ]+\$zero,[ ]+0x40 -+[ ]+4:[ ]+R_LARCH_PCALA_HI20[ ]+msg -+[ ]+4:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+8:[ ]+02c000a5[ ]+addi\.d[ ]+\$a1,[ ]+\$a1,[ ]+0 -+[ ]+8:[ ]+R_LARCH_PCALA_LO12[ ]+msg -+[ ]+8:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+c:[ ]+03800404[ ]+li\.w[ ]+\$a0,[ ]+0x1 -+[ ]+10:[ ]+0381000b[ ]+li\.w[ ]+\$a7,[ ]+0x40 - [ ]+14:[ ]+002b0000[ ]+syscall[ ]+0x0 - [ ]+18:[ ]+00150004[ ]+move[ ]+\$a0,[ ]+\$zero --[ ]+1c:[ ]+0381740b[ ]+ori[ ]+\$a7,[ ]+\$zero,[ ]+0x5d -+[ ]+1c:[ ]+0381740b[ ]+li\.w[ ]+\$a7,[ ]+0x5d - [ ]+20:[ ]+002b0000[ ]+syscall[ ]+0x0 -diff --git a/gas/testsuite/gas/loongarch/load_store_op.d b/gas/testsuite/gas/loongarch/load_store_op.d -index fc15773..e1b4dea 100644 ---- a/gas/testsuite/gas/loongarch/load_store_op.d -+++ b/gas/testsuite/gas/loongarch/load_store_op.d -@@ -8,69 +8,69 @@ Disassembly of section .text: - - 00000000.* <.text>: - [ ]+0:[ ]+200000a4 [ ]+ll.w[ ]+[ ]+\$a0, \$a1, 0 --[ ]+4:[ ]+203ffca4 [ ]+ll.w[ ]+[ ]+\$a0, \$a1, 16380\(0x3ffc\) -+[ ]+4:[ ]+203ffca4 [ ]+ll.w[ ]+[ ]+\$a0, \$a1, 16380 - [ ]+8:[ ]+210000a4 [ ]+sc.w[ ]+[ ]+\$a0, \$a1, 0 --[ ]+c:[ ]+213ffca4 [ ]+sc.w[ ]+[ ]+\$a0, \$a1, 16380\(0x3ffc\) -+[ ]+c:[ ]+213ffca4 [ ]+sc.w[ ]+[ ]+\$a0, \$a1, 16380 - [ ]+10:[ ]+220000a4 [ ]+ll.d[ ]+[ ]+\$a0, \$a1, 0 --[ ]+14:[ ]+223ffca4 [ ]+ll.d[ ]+[ ]+\$a0, \$a1, 16380\(0x3ffc\) -+[ ]+14:[ ]+223ffca4 [ ]+ll.d[ ]+[ ]+\$a0, \$a1, 16380 - [ ]+18:[ ]+230000a4 [ ]+sc.d[ ]+[ ]+\$a0, \$a1, 0 --[ ]+1c:[ ]+233ffca4 [ ]+sc.d[ ]+[ ]+\$a0, \$a1, 16380\(0x3ffc\) -+[ ]+1c:[ ]+233ffca4 [ ]+sc.d[ ]+[ ]+\$a0, \$a1, 16380 - [ ]+20:[ ]+240000a4 [ ]+ldptr.w[ ]+[ ]+\$a0, \$a1, 0 --[ ]+24:[ ]+243ffca4 [ ]+ldptr.w[ ]+[ ]+\$a0, \$a1, 16380\(0x3ffc\) -+[ ]+24:[ ]+243ffca4 [ ]+ldptr.w[ ]+[ ]+\$a0, \$a1, 16380 - [ ]+28:[ ]+250000a4 [ ]+stptr.w[ ]+[ ]+\$a0, \$a1, 0 --[ ]+2c:[ ]+253ffca4 [ ]+stptr.w[ ]+[ ]+\$a0, \$a1, 16380\(0x3ffc\) -+[ ]+2c:[ ]+253ffca4 [ ]+stptr.w[ ]+[ ]+\$a0, \$a1, 16380 - [ ]+30:[ ]+260000a4 [ ]+ldptr.d[ ]+[ ]+\$a0, \$a1, 0 --[ ]+34:[ ]+263ffca4 [ ]+ldptr.d[ ]+[ ]+\$a0, \$a1, 16380\(0x3ffc\) -+[ ]+34:[ ]+263ffca4 [ ]+ldptr.d[ ]+[ ]+\$a0, \$a1, 16380 - [ ]+38:[ ]+270000a4 [ ]+stptr.d[ ]+[ ]+\$a0, \$a1, 0 --[ ]+3c:[ ]+273ffca4 [ ]+stptr.d[ ]+[ ]+\$a0, \$a1, 16380\(0x3ffc\) -+[ ]+3c:[ ]+273ffca4 [ ]+stptr.d[ ]+[ ]+\$a0, \$a1, 16380 - [ ]+40:[ ]+280000a4 [ ]+ld.b[ ]+[ ]+\$a0, \$a1, 0 --[ ]+44:[ ]+281ffca4 [ ]+ld.b[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) --[ ]+48:[ ]+282004a4 [ ]+ld.b[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) -+[ ]+44:[ ]+281ffca4 [ ]+ld.b[ ]+[ ]+\$a0, \$a1, 2047 -+[ ]+48:[ ]+282004a4 [ ]+ld.b[ ]+[ ]+\$a0, \$a1, -2047 - [ ]+4c:[ ]+284000a4 [ ]+ld.h[ ]+[ ]+\$a0, \$a1, 0 --[ ]+50:[ ]+285ffca4 [ ]+ld.h[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) --[ ]+54:[ ]+286004a4 [ ]+ld.h[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) -+[ ]+50:[ ]+285ffca4 [ ]+ld.h[ ]+[ ]+\$a0, \$a1, 2047 -+[ ]+54:[ ]+286004a4 [ ]+ld.h[ ]+[ ]+\$a0, \$a1, -2047 - [ ]+58:[ ]+288000a4 [ ]+ld.w[ ]+[ ]+\$a0, \$a1, 0 --[ ]+5c:[ ]+289ffca4 [ ]+ld.w[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) --[ ]+60:[ ]+28a004a4 [ ]+ld.w[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) -+[ ]+5c:[ ]+289ffca4 [ ]+ld.w[ ]+[ ]+\$a0, \$a1, 2047 -+[ ]+60:[ ]+28a004a4 [ ]+ld.w[ ]+[ ]+\$a0, \$a1, -2047 - [ ]+64:[ ]+28c000a4 [ ]+ld.d[ ]+[ ]+\$a0, \$a1, 0 --[ ]+68:[ ]+28dffca4 [ ]+ld.d[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) --[ ]+6c:[ ]+28e004a4 [ ]+ld.d[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) -+[ ]+68:[ ]+28dffca4 [ ]+ld.d[ ]+[ ]+\$a0, \$a1, 2047 -+[ ]+6c:[ ]+28e004a4 [ ]+ld.d[ ]+[ ]+\$a0, \$a1, -2047 - [ ]+70:[ ]+290000a4 [ ]+st.b[ ]+[ ]+\$a0, \$a1, 0 --[ ]+74:[ ]+291ffca4 [ ]+st.b[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) --[ ]+78:[ ]+292004a4 [ ]+st.b[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) -+[ ]+74:[ ]+291ffca4 [ ]+st.b[ ]+[ ]+\$a0, \$a1, 2047 -+[ ]+78:[ ]+292004a4 [ ]+st.b[ ]+[ ]+\$a0, \$a1, -2047 - [ ]+7c:[ ]+294000a4 [ ]+st.h[ ]+[ ]+\$a0, \$a1, 0 --[ ]+80:[ ]+295ffca4 [ ]+st.h[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) --[ ]+84:[ ]+296004a4 [ ]+st.h[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) -+[ ]+80:[ ]+295ffca4 [ ]+st.h[ ]+[ ]+\$a0, \$a1, 2047 -+[ ]+84:[ ]+296004a4 [ ]+st.h[ ]+[ ]+\$a0, \$a1, -2047 - [ ]+88:[ ]+298000a4 [ ]+st.w[ ]+[ ]+\$a0, \$a1, 0 --[ ]+8c:[ ]+299ffca4 [ ]+st.w[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) --[ ]+90:[ ]+29a004a4 [ ]+st.w[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) -+[ ]+8c:[ ]+299ffca4 [ ]+st.w[ ]+[ ]+\$a0, \$a1, 2047 -+[ ]+90:[ ]+29a004a4 [ ]+st.w[ ]+[ ]+\$a0, \$a1, -2047 - [ ]+94:[ ]+29c000a4 [ ]+st.d[ ]+[ ]+\$a0, \$a1, 0 --[ ]+98:[ ]+29dffca4 [ ]+st.d[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) --[ ]+9c:[ ]+29e004a4 [ ]+st.d[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) -+[ ]+98:[ ]+29dffca4 [ ]+st.d[ ]+[ ]+\$a0, \$a1, 2047 -+[ ]+9c:[ ]+29e004a4 [ ]+st.d[ ]+[ ]+\$a0, \$a1, -2047 - [ ]+a0:[ ]+2a0000a4 [ ]+ld.bu[ ]+[ ]+\$a0, \$a1, 0 --[ ]+a4:[ ]+2a1ffca4 [ ]+ld.bu[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) --[ ]+a8:[ ]+2a2004a4 [ ]+ld.bu[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) -+[ ]+a4:[ ]+2a1ffca4 [ ]+ld.bu[ ]+[ ]+\$a0, \$a1, 2047 -+[ ]+a8:[ ]+2a2004a4 [ ]+ld.bu[ ]+[ ]+\$a0, \$a1, -2047 - [ ]+ac:[ ]+2a4000a4 [ ]+ld.hu[ ]+[ ]+\$a0, \$a1, 0 --[ ]+b0:[ ]+2a5ffca4 [ ]+ld.hu[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) --[ ]+b4:[ ]+2a6004a4 [ ]+ld.hu[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) -+[ ]+b0:[ ]+2a5ffca4 [ ]+ld.hu[ ]+[ ]+\$a0, \$a1, 2047 -+[ ]+b4:[ ]+2a6004a4 [ ]+ld.hu[ ]+[ ]+\$a0, \$a1, -2047 - [ ]+b8:[ ]+2a8000a4 [ ]+ld.wu[ ]+[ ]+\$a0, \$a1, 0 --[ ]+bc:[ ]+2a9ffca4 [ ]+ld.wu[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) --[ ]+c0:[ ]+2aa004a4 [ ]+ld.wu[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) -+[ ]+bc:[ ]+2a9ffca4 [ ]+ld.wu[ ]+[ ]+\$a0, \$a1, 2047 -+[ ]+c0:[ ]+2aa004a4 [ ]+ld.wu[ ]+[ ]+\$a0, \$a1, -2047 - [ ]+c4:[ ]+2ac000a0 [ ]+preld[ ]+[ ]+0x0, \$a1, 0 --[ ]+c8:[ ]+2adffcbf [ ]+preld[ ]+[ ]+0x1f, \$a1, 2047\(0x7ff\) --[ ]+cc:[ ]+2ae004bf [ ]+preld[ ]+[ ]+0x1f, \$a1, -2047\(0x801\) -+[ ]+c8:[ ]+2adffcbf [ ]+preld[ ]+[ ]+0x1f, \$a1, 2047 -+[ ]+cc:[ ]+2ae004bf [ ]+preld[ ]+[ ]+0x1f, \$a1, -2047 - [ ]+d0:[ ]+2b0000a0 [ ]+fld.s[ ]+[ ]+\$fa0, \$a1, 0 --[ ]+d4:[ ]+2b1ffca0 [ ]+fld.s[ ]+[ ]+\$fa0, \$a1, 2047\(0x7ff\) --[ ]+d8:[ ]+2b2004a0 [ ]+fld.s[ ]+[ ]+\$fa0, \$a1, -2047\(0x801\) -+[ ]+d4:[ ]+2b1ffca0 [ ]+fld.s[ ]+[ ]+\$fa0, \$a1, 2047 -+[ ]+d8:[ ]+2b2004a0 [ ]+fld.s[ ]+[ ]+\$fa0, \$a1, -2047 - [ ]+dc:[ ]+2b4000a0 [ ]+fst.s[ ]+[ ]+\$fa0, \$a1, 0 --[ ]+e0:[ ]+2b5ffca0 [ ]+fst.s[ ]+[ ]+\$fa0, \$a1, 2047\(0x7ff\) --[ ]+e4:[ ]+2b6004a0 [ ]+fst.s[ ]+[ ]+\$fa0, \$a1, -2047\(0x801\) -+[ ]+e0:[ ]+2b5ffca0 [ ]+fst.s[ ]+[ ]+\$fa0, \$a1, 2047 -+[ ]+e4:[ ]+2b6004a0 [ ]+fst.s[ ]+[ ]+\$fa0, \$a1, -2047 - [ ]+e8:[ ]+2b8000a0 [ ]+fld.d[ ]+[ ]+\$fa0, \$a1, 0 --[ ]+ec:[ ]+2b9ffca0 [ ]+fld.d[ ]+[ ]+\$fa0, \$a1, 2047\(0x7ff\) --[ ]+f0:[ ]+2ba004a0 [ ]+fld.d[ ]+[ ]+\$fa0, \$a1, -2047\(0x801\) -+[ ]+ec:[ ]+2b9ffca0 [ ]+fld.d[ ]+[ ]+\$fa0, \$a1, 2047 -+[ ]+f0:[ ]+2ba004a0 [ ]+fld.d[ ]+[ ]+\$fa0, \$a1, -2047 - [ ]+f4:[ ]+2bc000a0 [ ]+fst.d[ ]+[ ]+\$fa0, \$a1, 0 --[ ]+f8:[ ]+2bdffca0 [ ]+fst.d[ ]+[ ]+\$fa0, \$a1, 2047\(0x7ff\) --[ ]+fc:[ ]+2be004a0 [ ]+fst.d[ ]+[ ]+\$fa0, \$a1, -2047\(0x801\) -+[ ]+f8:[ ]+2bdffca0 [ ]+fst.d[ ]+[ ]+\$fa0, \$a1, 2047 -+[ ]+fc:[ ]+2be004a0 [ ]+fst.d[ ]+[ ]+\$fa0, \$a1, -2047 - 100:[ ]+380018a4 [ ]+ldx.b[ ]+[ ]+\$a0, \$a1, \$a2 - 104:[ ]+380418a4 [ ]+ldx.h[ ]+[ ]+\$a0, \$a1, \$a2 - 108:[ ]+380818a4 [ ]+ldx.w[ ]+[ ]+\$a0, \$a1, \$a2 -diff --git a/gas/testsuite/gas/loongarch/lvz-lbt.d b/gas/testsuite/gas/loongarch/lvz-lbt.d -new file mode 100644 -index 0000000..f897077 ---- /dev/null -+++ b/gas/testsuite/gas/loongarch/lvz-lbt.d -@@ -0,0 +1,191 @@ -+#as: -+#objdump: -dr -+#skip: loongarch32-*-* -+ -+.*:[ ]+file format .* -+ -+ -+Disassembly of section .text: -+ -+00000000.* <.text>: -+[ ]*0:[ ]*05000400[ ]*gcsrrd[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*4:[ ]*05000420[ ]*gcsrwr[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*8:[ ]*05000420[ ]*gcsrwr[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*c:[ ]*06482401[ ]*gtlbflush[ ]* -+[ ]*10:[ ]*002b8001[ ]*hvcl[ ]*0x1[ ]* -+[ ]*14:[ ]*00000820[ ]*movgr2scr[ ]*\$scr0,[ ]*\$ra[ ]* -+[ ]*18:[ ]*00000c20[ ]*movscr2gr[ ]*\$zero,[ ]*\$scr1[ ]* -+[ ]*1c:[ ]*48006600[ ]*jiscr0[ ]*100[ ]* -+[ ]*20:[ ]*48006700[ ]*jiscr1[ ]*100[ ]* -+[ ]*24:[ ]*00290420[ ]*addu12i\.w[ ]*\$zero,[ ]*\$ra,[ ]*1[ ]* -+[ ]*28:[ ]*00298420[ ]*addu12i\.d[ ]*\$zero,[ ]*\$ra,[ ]*1[ ]* -+[ ]*2c:[ ]*00300820[ ]*adc\.b[ ]*\$zero,[ ]*\$ra,[ ]*\$tp[ ]* -+[ ]*30:[ ]*00308820[ ]*adc\.h[ ]*\$zero,[ ]*\$ra,[ ]*\$tp[ ]* -+[ ]*34:[ ]*00310820[ ]*adc\.w[ ]*\$zero,[ ]*\$ra,[ ]*\$tp[ ]* -+[ ]*38:[ ]*00318820[ ]*adc\.d[ ]*\$zero,[ ]*\$ra,[ ]*\$tp[ ]* -+[ ]*3c:[ ]*00320820[ ]*sbc\.b[ ]*\$zero,[ ]*\$ra,[ ]*\$tp[ ]* -+[ ]*40:[ ]*00328820[ ]*sbc\.h[ ]*\$zero,[ ]*\$ra,[ ]*\$tp[ ]* -+[ ]*44:[ ]*00330820[ ]*sbc\.w[ ]*\$zero,[ ]*\$ra,[ ]*\$tp[ ]* -+[ ]*48:[ ]*00338820[ ]*sbc\.d[ ]*\$zero,[ ]*\$ra,[ ]*\$tp[ ]* -+[ ]*4c:[ ]*001a0820[ ]*rotr\.b[ ]*\$zero,[ ]*\$ra,[ ]*\$tp[ ]* -+[ ]*50:[ ]*001a8820[ ]*rotr\.h[ ]*\$zero,[ ]*\$ra,[ ]*\$tp[ ]* -+[ ]*54:[ ]*004c2420[ ]*rotri\.b[ ]*\$zero,[ ]*\$ra,[ ]*0x1[ ]* -+[ ]*58:[ ]*004c4420[ ]*rotri\.h[ ]*\$zero,[ ]*\$ra,[ ]*0x1[ ]* -+[ ]*5c:[ ]*00340820[ ]*rcr\.b[ ]*\$zero,[ ]*\$ra,[ ]*\$tp[ ]* -+[ ]*60:[ ]*00348820[ ]*rcr\.h[ ]*\$zero,[ ]*\$ra,[ ]*\$tp[ ]* -+[ ]*64:[ ]*00350820[ ]*rcr\.w[ ]*\$zero,[ ]*\$ra,[ ]*\$tp[ ]* -+[ ]*68:[ ]*00358820[ ]*rcr\.d[ ]*\$zero,[ ]*\$ra,[ ]*\$tp[ ]* -+[ ]*6c:[ ]*00502420[ ]*rcri\.b[ ]*\$zero,[ ]*\$ra,[ ]*0x1[ ]* -+[ ]*70:[ ]*00504420[ ]*rcri\.h[ ]*\$zero,[ ]*\$ra,[ ]*0x1[ ]* -+[ ]*74:[ ]*00508420[ ]*rcri\.w[ ]*\$zero,[ ]*\$ra,[ ]*0x1[ ]* -+[ ]*78:[ ]*00510420[ ]*rcri\.d[ ]*\$zero,[ ]*\$ra,[ ]*0x1[ ]* -+[ ]*7c:[ ]*0114e420[ ]*fcvt\.ud\.d[ ]*\$fa0,[ ]*\$fa1[ ]* -+[ ]*80:[ ]*0114e020[ ]*fcvt\.ld\.d[ ]*\$fa0,[ ]*\$fa1[ ]* -+[ ]*84:[ ]*01150820[ ]*fcvt\.d\.ld[ ]*\$fa0,[ ]*\$fa1,[ ]*\$fa2[ ]* -+[ ]*88:[ ]*2e800420[ ]*ldl\.d[ ]*\$zero,[ ]*\$ra,[ ]*1[ ]* -+[ ]*8c:[ ]*2e000420[ ]*ldl\.w[ ]*\$zero,[ ]*\$ra,[ ]*1[ ]* -+[ ]*90:[ ]*2e400420[ ]*ldr\.w[ ]*\$zero,[ ]*\$ra,[ ]*1[ ]* -+[ ]*94:[ ]*2ec00420[ ]*ldr\.d[ ]*\$zero,[ ]*\$ra,[ ]*1[ ]* -+[ ]*98:[ ]*2f000420[ ]*stl\.w[ ]*\$zero,[ ]*\$ra,[ ]*1[ ]* -+[ ]*9c:[ ]*2f800420[ ]*stl\.d[ ]*\$zero,[ ]*\$ra,[ ]*1[ ]* -+[ ]*a0:[ ]*2f400420[ ]*str\.w[ ]*\$zero,[ ]*\$ra,[ ]*1[ ]* -+[ ]*a4:[ ]*2fc00420[ ]*str\.d[ ]*\$zero,[ ]*\$ra,[ ]*1[ ]* -+[ ]*a8:[ ]*003f040c[ ]*x86adc\.b[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*ac:[ ]*003f040d[ ]*x86adc\.h[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*b0:[ ]*003f040e[ ]*x86adc\.w[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*b4:[ ]*003f040f[ ]*x86adc\.d[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*b8:[ ]*003f0404[ ]*x86add\.b[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*bc:[ ]*003f0405[ ]*x86add\.h[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*c0:[ ]*003f0406[ ]*x86add\.w[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*c4:[ ]*003f0407[ ]*x86add\.d[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*c8:[ ]*003f0400[ ]*x86add\.wu[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*cc:[ ]*003f0401[ ]*x86add\.du[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*d0:[ ]*00008000[ ]*x86inc\.b[ ]*\$zero[ ]* -+[ ]*d4:[ ]*00008001[ ]*x86inc\.h[ ]*\$zero[ ]* -+[ ]*d8:[ ]*00008002[ ]*x86inc\.w[ ]*\$zero[ ]* -+[ ]*dc:[ ]*00008003[ ]*x86inc\.d[ ]*\$zero[ ]* -+[ ]*e0:[ ]*003f0410[ ]*x86sbc\.b[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*e4:[ ]*003f0411[ ]*x86sbc\.h[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*e8:[ ]*003f0412[ ]*x86sbc\.w[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*ec:[ ]*003f0413[ ]*x86sbc\.d[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*f0:[ ]*003f0408[ ]*x86sub\.b[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*f4:[ ]*003f0409[ ]*x86sub\.h[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*f8:[ ]*003f040a[ ]*x86sub\.w[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*fc:[ ]*003f040b[ ]*x86sub\.d[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*100:[ ]*003f0402[ ]*x86sub\.wu[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*104:[ ]*003f0403[ ]*x86sub\.du[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*108:[ ]*00008004[ ]*x86dec\.b[ ]*\$zero[ ]* -+[ ]*10c:[ ]*00008005[ ]*x86dec\.h[ ]*\$zero[ ]* -+[ ]*110:[ ]*00008006[ ]*x86dec\.w[ ]*\$zero[ ]* -+[ ]*114:[ ]*00008007[ ]*x86dec\.d[ ]*\$zero[ ]* -+[ ]*118:[ ]*003f8410[ ]*x86and\.b[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*11c:[ ]*003f8411[ ]*x86and\.h[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*120:[ ]*003f8412[ ]*x86and\.w[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*124:[ ]*003f8413[ ]*x86and\.d[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*128:[ ]*003f8414[ ]*x86or\.b[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*12c:[ ]*003f8415[ ]*x86or\.h[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*130:[ ]*003f8416[ ]*x86or\.w[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*134:[ ]*003f8417[ ]*x86or\.d[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*138:[ ]*003f8418[ ]*x86xor\.b[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*13c:[ ]*003f8419[ ]*x86xor\.h[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*140:[ ]*003f841a[ ]*x86xor\.w[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*144:[ ]*003f841b[ ]*x86xor\.d[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*148:[ ]*003e8400[ ]*x86mul\.b[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*14c:[ ]*003e8401[ ]*x86mul\.h[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*150:[ ]*003e8402[ ]*x86mul\.w[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*154:[ ]*003e8403[ ]*x86mul\.d[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*158:[ ]*003e8404[ ]*x86mul\.bu[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*15c:[ ]*003e8405[ ]*x86mul\.hu[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*160:[ ]*003e8406[ ]*x86mul\.wu[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*164:[ ]*003e8407[ ]*x86mul\.du[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*168:[ ]*003f840c[ ]*x86rcl\.b[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*16c:[ ]*003f840d[ ]*x86rcl\.h[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*170:[ ]*003f840e[ ]*x86rcl\.w[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*174:[ ]*003f840f[ ]*x86rcl\.d[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*178:[ ]*00542418[ ]*x86rcli\.b[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*17c:[ ]*00544419[ ]*x86rcli\.h[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*180:[ ]*0054841a[ ]*x86rcli\.w[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*184:[ ]*0055041b[ ]*x86rcli\.d[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*188:[ ]*003f8408[ ]*x86rcr\.b[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*18c:[ ]*003f8409[ ]*x86rcr\.h[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*190:[ ]*003f840a[ ]*x86rcr\.w[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*194:[ ]*003f840b[ ]*x86rcr\.d[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*198:[ ]*00542410[ ]*x86rcri\.b[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*19c:[ ]*00544411[ ]*x86rcri\.h[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*1a0:[ ]*00548412[ ]*x86rcri\.w[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*1a4:[ ]*00550413[ ]*x86rcri\.d[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*1a8:[ ]*003f8404[ ]*x86rotl\.b[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*1ac:[ ]*003f8405[ ]*x86rotl\.h[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*1b0:[ ]*003f8406[ ]*x86rotl\.w[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*1b4:[ ]*003f8407[ ]*x86rotl\.d[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*1b8:[ ]*00542414[ ]*x86rotli\.b[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*1bc:[ ]*00544415[ ]*x86rotli\.h[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*1c0:[ ]*00548416[ ]*x86rotli\.w[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*1c4:[ ]*00550417[ ]*x86rotli\.d[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*1c8:[ ]*003f8400[ ]*x86rotr\.b[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*1cc:[ ]*003f8401[ ]*x86rotr\.h[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*1d0:[ ]*003f8402[ ]*x86rotr\.d[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*1d4:[ ]*003f8403[ ]*x86rotr\.w[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*1d8:[ ]*0054240c[ ]*x86rotri\.b[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*1dc:[ ]*0054440d[ ]*x86rotri\.h[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*1e0:[ ]*0054840e[ ]*x86rotri\.w[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*1e4:[ ]*0055040f[ ]*x86rotri\.d[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*1e8:[ ]*003f0414[ ]*x86sll\.b[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*1ec:[ ]*003f0415[ ]*x86sll\.h[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*1f0:[ ]*003f0416[ ]*x86sll\.w[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*1f4:[ ]*003f0417[ ]*x86sll\.d[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*1f8:[ ]*00542400[ ]*x86slli\.b[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*1fc:[ ]*00544401[ ]*x86slli\.h[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*200:[ ]*00548402[ ]*x86slli\.w[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*204:[ ]*00550403[ ]*x86slli\.d[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*208:[ ]*003f0418[ ]*x86srl\.b[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*20c:[ ]*003f0419[ ]*x86srl\.h[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*210:[ ]*003f041a[ ]*x86srl\.w[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*214:[ ]*003f041b[ ]*x86srl\.d[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*218:[ ]*00542404[ ]*x86srli\.b[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*21c:[ ]*00544405[ ]*x86srli\.h[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*220:[ ]*00548406[ ]*x86srli\.w[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*224:[ ]*00550407[ ]*x86srli\.d[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*228:[ ]*003f041c[ ]*x86sra\.b[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*22c:[ ]*003f041d[ ]*x86sra\.h[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*230:[ ]*003f041e[ ]*x86sra\.w[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*234:[ ]*003f041f[ ]*x86sra\.d[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*238:[ ]*00542408[ ]*x86srai\.b[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*23c:[ ]*00544409[ ]*x86srai\.h[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*240:[ ]*0054840a[ ]*x86srai\.w[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*244:[ ]*0055040b[ ]*x86srai\.d[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*248:[ ]*00368400[ ]*setx86j[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*24c:[ ]*00007820[ ]*setx86loope[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*250:[ ]*00007c20[ ]*setx86loopne[ ]*\$zero,[ ]*\$ra[ ]* -+[ ]*254:[ ]*005c0400[ ]*x86mfflag[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*258:[ ]*005c0420[ ]*x86mtflag[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*25c:[ ]*00007400[ ]*x86mftop[ ]*\$zero[ ]* -+[ ]*260:[ ]*00007020[ ]*x86mttop[ ]*0x1[ ]* -+[ ]*264:[ ]*00008009[ ]*x86inctop[ ]* -+[ ]*268:[ ]*00008029[ ]*x86dectop[ ]* -+[ ]*26c:[ ]*00008008[ ]*x86settm[ ]* -+[ ]*270:[ ]*00008028[ ]*x86clrtm[ ]* -+[ ]*274:[ ]*00580420[ ]*x86settag[ ]*\$zero,[ ]*0x1,[ ]*0x1[ ]* -+[ ]*278:[ ]*00370411[ ]*armadd\.w[ ]*\$zero,[ ]*\$ra,[ ]*0x1[ ]* -+[ ]*27c:[ ]*00378411[ ]*armsub\.w[ ]*\$zero,[ ]*\$ra,[ ]*0x1[ ]* -+[ ]*280:[ ]*00380411[ ]*armadc\.w[ ]*\$zero,[ ]*\$ra,[ ]*0x1[ ]* -+[ ]*284:[ ]*00388411[ ]*armsbc\.w[ ]*\$zero,[ ]*\$ra,[ ]*0x1[ ]* -+[ ]*288:[ ]*00390411[ ]*armand\.w[ ]*\$zero,[ ]*\$ra,[ ]*0x1[ ]* -+[ ]*28c:[ ]*00398411[ ]*armor\.w[ ]*\$zero,[ ]*\$ra,[ ]*0x1[ ]* -+[ ]*290:[ ]*003a0411[ ]*armxor\.w[ ]*\$zero,[ ]*\$ra,[ ]*0x1[ ]* -+[ ]*294:[ ]*003fc41c[ ]*armnot\.w[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*298:[ ]*003a8411[ ]*armsll\.w[ ]*\$zero,[ ]*\$ra,[ ]*0x1[ ]* -+[ ]*29c:[ ]*003b0411[ ]*armsrl\.w[ ]*\$zero,[ ]*\$ra,[ ]*0x1[ ]* -+[ ]*2a0:[ ]*003b8411[ ]*armsra\.w[ ]*\$zero,[ ]*\$ra,[ ]*0x1[ ]* -+[ ]*2a4:[ ]*003c0411[ ]*armrotr\.w[ ]*\$zero,[ ]*\$ra,[ ]*0x1[ ]* -+[ ]*2a8:[ ]*003c8411[ ]*armslli\.w[ ]*\$zero,[ ]*0x1,[ ]*0x1[ ]* -+[ ]*2ac:[ ]*003d0411[ ]*armsrli\.w[ ]*\$zero,[ ]*0x1,[ ]*0x1[ ]* -+[ ]*2b0:[ ]*003d8411[ ]*armsrai\.w[ ]*\$zero,[ ]*0x1,[ ]*0x1[ ]* -+[ ]*2b4:[ ]*003e0411[ ]*armrotri\.w[ ]*\$zero,[ ]*0x1,[ ]*0x1[ ]* -+[ ]*2b8:[ ]*003fc41f[ ]*armrrx\.w[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*2bc:[ ]*00364420[ ]*armmove[ ]*\$zero,[ ]*\$ra,[ ]*0x1[ ]* -+[ ]*2c0:[ ]*003fc41d[ ]*armmov\.w[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*2c4:[ ]*003fc41e[ ]*armmov\.d[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*2c8:[ ]*005c0440[ ]*armmfflag[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*2cc:[ ]*005c0460[ ]*armmtflag[ ]*\$zero,[ ]*0x1[ ]* -+[ ]*2d0:[ ]*0036c400[ ]*setarmj[ ]*\$zero,[ ]*0x1[ ]* -diff --git a/gas/testsuite/gas/loongarch/lvz-lbt.s b/gas/testsuite/gas/loongarch/lvz-lbt.s -new file mode 100644 -index 0000000..64469a4 ---- /dev/null -+++ b/gas/testsuite/gas/loongarch/lvz-lbt.s -@@ -0,0 +1,181 @@ -+gcsrrd $r0, 1 -+gcsrwr $r0, 1 -+gcsrxchg $r0, $r1, 1 -+gtlbflush -+hvcl 1 -+movgr2scr $scr0, $r1 -+movscr2gr $r0, $scr1 -+jiscr0 100 -+jiscr1 100 -+addu12i.w $r0, $r1, 1 -+addu12i.d $r0, $r1, 1 -+adc.b $r0, $r1, $r2 -+adc.h $r0, $r1, $r2 -+adc.w $r0, $r1, $r2 -+adc.d $r0, $r1, $r2 -+sbc.b $r0, $r1, $r2 -+sbc.h $r0, $r1, $r2 -+sbc.w $r0, $r1, $r2 -+sbc.d $r0, $r1, $r2 -+rotr.b $r0, $r1, $r2 -+rotr.h $r0, $r1, $r2 -+rotri.b $r0, $r1, 1 -+rotri.h $r0, $r1, 1 -+rcr.b $r0, $r1, $r2 -+rcr.h $r0, $r1, $r2 -+rcr.w $r0, $r1, $r2 -+rcr.d $r0, $r1, $r2 -+rcri.b $r0, $r1, 1 -+rcri.h $r0, $r1, 1 -+rcri.w $r0, $r1, 1 -+rcri.d $r0, $r1, 1 -+fcvt.ud.d $f0, $f1 -+fcvt.ld.d $f0, $f1 -+fcvt.d.ld $f0, $f1, $f2 -+ldl.d $r0, $r1, 1 -+ldl.w $r0, $r1, 1 -+ldr.w $r0, $r1, 1 -+ldr.d $r0, $r1, 1 -+stl.w $r0, $r1, 1 -+stl.d $r0, $r1, 1 -+str.w $r0, $r1, 1 -+str.d $r0, $r1, 1 -+x86adc.b $r0, $r1 -+x86adc.h $r0, $r1 -+x86adc.w $r0, $r1 -+x86adc.d $r0, $r1 -+x86add.b $r0, $r1 -+x86add.h $r0, $r1 -+x86add.w $r0, $r1 -+x86add.d $r0, $r1 -+x86add.wu $r0, $r1 -+x86add.du $r0, $r1 -+x86inc.b $r0 -+x86inc.h $r0 -+x86inc.w $r0 -+x86inc.d $r0 -+x86sbc.b $r0, $r1 -+x86sbc.h $r0, $r1 -+x86sbc.w $r0, $r1 -+x86sbc.d $r0, $r1 -+x86sub.b $r0, $r1 -+x86sub.h $r0, $r1 -+x86sub.w $r0, $r1 -+x86sub.d $r0, $r1 -+x86sub.wu $r0, $r1 -+x86sub.du $r0, $r1 -+x86dec.b $r0 -+x86dec.h $r0 -+x86dec.w $r0 -+x86dec.d $r0 -+x86and.b $r0, $r1 -+x86and.h $r0, $r1 -+x86and.w $r0, $r1 -+x86and.d $r0, $r1 -+x86or.b $r0, $r1 -+x86or.h $r0, $r1 -+x86or.w $r0, $r1 -+x86or.d $r0, $r1 -+x86xor.b $r0, $r1 -+x86xor.h $r0, $r1 -+x86xor.w $r0, $r1 -+x86xor.d $r0, $r1 -+x86mul.b $r0, $r1 -+x86mul.h $r0, $r1 -+x86mul.w $r0, $r1 -+x86mul.d $r0, $r1 -+x86mul.bu $r0, $r1 -+x86mul.hu $r0, $r1 -+x86mul.wu $r0, $r1 -+x86mul.du $r0, $r1 -+x86rcl.b $r0, $r1 -+x86rcl.h $r0, $r1 -+x86rcl.w $r0, $r1 -+x86rcl.d $r0, $r1 -+x86rcli.b $r0, 1 -+x86rcli.h $r0, 1 -+x86rcli.w $r0, 1 -+x86rcli.d $r0, 1 -+x86rcr.b $r0, $r1 -+x86rcr.h $r0, $r1 -+x86rcr.w $r0, $r1 -+x86rcr.d $r0, $r1 -+x86rcri.b $r0, 1 -+x86rcri.h $r0, 1 -+x86rcri.w $r0, 1 -+x86rcri.d $r0, 1 -+x86rotl.b $r0, $r1 -+x86rotl.h $r0, $r1 -+x86rotl.w $r0, $r1 -+x86rotl.d $r0, $r1 -+x86rotli.b $r0, 1 -+x86rotli.h $r0, 1 -+x86rotli.w $r0, 1 -+x86rotli.d $r0, 1 -+x86rotr.b $r0, $r1 -+x86rotr.h $r0, $r1 -+x86rotr.d $r0, $r1 -+x86rotr.w $r0, $r1 -+x86rotri.b $r0, 1 -+x86rotri.h $r0, 1 -+x86rotri.w $r0, 1 -+x86rotri.d $r0, 1 -+x86sll.b $r0, $r1 -+x86sll.h $r0, $r1 -+x86sll.w $r0, $r1 -+x86sll.d $r0, $r1 -+x86slli.b $r0, 1 -+x86slli.h $r0, 1 -+x86slli.w $r0, 1 -+x86slli.d $r0, 1 -+x86srl.b $r0, $r1 -+x86srl.h $r0, $r1 -+x86srl.w $r0, $r1 -+x86srl.d $r0, $r1 -+x86srli.b $r0, 1 -+x86srli.h $r0, 1 -+x86srli.w $r0, 1 -+x86srli.d $r0, 1 -+x86sra.b $r0, $r1 -+x86sra.h $r0, $r1 -+x86sra.w $r0, $r1 -+x86sra.d $r0, $r1 -+x86srai.b $r0, 1 -+x86srai.h $r0, 1 -+x86srai.w $r0, 1 -+x86srai.d $r0, 1 -+setx86j $r0, 1 -+setx86loope $r0, $r1 -+setx86loopne $r0, $r1 -+x86mfflag $r0, 1 -+x86mtflag $r0, 1 -+x86mftop $r0 -+x86mttop 1 -+x86inctop -+x86dectop -+x86settm -+x86clrtm -+x86settag $r0, 1, 1 -+armadd.w $r0, $r1, 1 -+armsub.w $r0, $r1, 1 -+armadc.w $r0, $r1, 1 -+armsbc.w $r0, $r1, 1 -+armand.w $r0, $r1, 1 -+armor.w $r0, $r1, 1 -+armxor.w $r0, $r1, 1 -+armnot.w $r0, 1 -+armsll.w $r0, $r1, 1 -+armsrl.w $r0, $r1, 1 -+armsra.w $r0, $r1, 1 -+armrotr.w $r0, $r1, 1 -+armslli.w $r0, 1, 1 -+armsrli.w $r0, 1, 1 -+armsrai.w $r0, 1, 1 -+armrotri.w $r0, 1, 1 -+armrrx.w $r0, 1 -+armmove $r0, $r1, 1 -+armmov.w $r0, 1 -+armmov.d $r0, 1 -+armmfflag $r0, 1 -+armmtflag $r0, 1 -+setarmj $r0, 1 -diff --git a/gas/testsuite/gas/loongarch/macro_op.d b/gas/testsuite/gas/loongarch/macro_op.d -index d264c4f..3286086 100644 ---- a/gas/testsuite/gas/loongarch/macro_op.d -+++ b/gas/testsuite/gas/loongarch/macro_op.d -@@ -9,51 +9,63 @@ Disassembly of section .text: - - 00000000.* <.text>: - [ ]+0:[ ]+00150004[ ]+move[ ]+\$a0,[ ]+\$zero --[ ]+4:[ ]+02bffc04[ ]+addi.w[ ]+\$a0,[ ]+\$zero,[ ]+-1\(0xfff\) -+[ ]+4:[ ]+02bffc04[ ]+li\.w[ ]+\$a0,[ ]+-1 - [ ]+8:[ ]+00150004[ ]+move[ ]+\$a0,[ ]+\$zero --[ ]+c:[ ]+02bffc04[ ]+addi.w[ ]+\$a0,[ ]+\$zero,[ ]+-1\(0xfff\) -+[ ]+c:[ ]+02bffc04[ ]+li\.w[ ]+\$a0,[ ]+-1 - [ ]+10:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+10:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 --[ ]+14:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 --[ ]+14:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 -+[ ]+10:[ ]+R_LARCH_GOT_PC_HI20[ ]+\.L1 -+[ ]+10:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+14:[ ]+28c00084[ ]+ld\.d[ ]+\$a0,[ ]+\$a0,[ ]+0 -+[ ]+14:[ ]+R_LARCH_GOT_PC_LO12[ ]+\.L1 -+[ ]+14:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+18:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+18:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 --[ ]+1c:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 --[ ]+1c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 -+[ ]+18:[ ]+R_LARCH_GOT_PC_HI20[ ]+\.L1 -+[ ]+18:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+1c:[ ]+28c00084[ ]+ld\.d[ ]+\$a0,[ ]+\$a0,[ ]+0 -+[ ]+1c:[ ]+R_LARCH_GOT_PC_LO12[ ]+\.L1 -+[ ]+1c:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+20:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+20:[ ]+R_LARCH_PCALA_HI20[ ]+.L1 --[ ]+24:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 --[ ]+24:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 --[ ]+28:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 -+[ ]+20:[ ]+R_LARCH_PCALA_HI20[ ]+\.L1 -+[ ]+20:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+24:[ ]+02c00084[ ]+addi\.d[ ]+\$a0,[ ]+\$a0,[ ]+0 -+[ ]+24:[ ]+R_LARCH_PCALA_LO12[ ]+\.L1 -+[ ]+24:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+28:[ ]+14000004[ ]+lu12i\.w[ ]+\$a0,[ ]+0 - [ ]+28:[ ]+R_LARCH_MARK_LA[ ]+\*ABS\* --[ ]+28:[ ]+R_LARCH_ABS_HI20[ ]+.L1 -+[ ]+28:[ ]+R_LARCH_ABS_HI20[ ]+\.L1 - [ ]+2c:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 --[ ]+2c:[ ]+R_LARCH_ABS_LO12[ ]+.L1 --[ ]+30:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 --[ ]+30:[ ]+R_LARCH_ABS64_LO20[ ]+.L1 --[ ]+34:[ ]+03000084[ ]+lu52i.d[ ]+\$a0,[ ]+\$a0,[ ]+0 --[ ]+34:[ ]+R_LARCH_ABS64_HI12[ ]+.L1 -+[ ]+2c:[ ]+R_LARCH_ABS_LO12[ ]+\.L1 -+[ ]+30:[ ]+16000004[ ]+lu32i\.d[ ]+\$a0,[ ]+0 -+[ ]+30:[ ]+R_LARCH_ABS64_LO20[ ]+\.L1 -+[ ]+34:[ ]+03000084[ ]+lu52i\.d[ ]+\$a0,[ ]+\$a0,[ ]+0 -+[ ]+34:[ ]+R_LARCH_ABS64_HI12[ ]+\.L1 - [ ]+38:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+38:[ ]+R_LARCH_PCALA_HI20[ ]+.L1 --[ ]+3c:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 --[ ]+3c:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 -+[ ]+38:[ ]+R_LARCH_PCALA_HI20[ ]+\.L1 -+[ ]+38:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+3c:[ ]+02c00084[ ]+addi\.d[ ]+\$a0,[ ]+\$a0,[ ]+0 -+[ ]+3c:[ ]+R_LARCH_PCALA_LO12[ ]+\.L1 -+[ ]+3c:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+40:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+40:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 --[ ]+44:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 --[ ]+44:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 --[ ]+48:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 -+[ ]+40:[ ]+R_LARCH_GOT_PC_HI20[ ]+\.L1 -+[ ]+40:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+44:[ ]+28c00084[ ]+ld\.d[ ]+\$a0,[ ]+\$a0,[ ]+0 -+[ ]+44:[ ]+R_LARCH_GOT_PC_LO12[ ]+\.L1 -+[ ]+44:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+48:[ ]+14000004[ ]+lu12i\.w[ ]+\$a0,[ ]+0 - [ ]+48:[ ]+R_LARCH_TLS_LE_HI20[ ]+TLS1 - [ ]+4c:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 - [ ]+4c:[ ]+R_LARCH_TLS_LE_LO12[ ]+TLS1 - [ ]+50:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 - [ ]+50:[ ]+R_LARCH_TLS_IE_PC_HI20[ ]+TLS1 --[ ]+54:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 -+[ ]+54:[ ]+28c00084[ ]+ld\.d[ ]+\$a0,[ ]+\$a0,[ ]+0 - [ ]+54:[ ]+R_LARCH_TLS_IE_PC_LO12[ ]+TLS1 - [ ]+58:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 - [ ]+58:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLS1 --[ ]+5c:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 -+[ ]+5c:[ ]+02c00084[ ]+addi\.d[ ]+\$a0,[ ]+\$a0,[ ]+0 - [ ]+5c:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 -+[ ]+5c:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+60:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 - [ ]+60:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLS1 --[ ]+64:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 -+[ ]+64:[ ]+02c00084[ ]+addi\.d[ ]+\$a0,[ ]+\$a0,[ ]+0 - [ ]+64:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 -+[ ]+64:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -diff --git a/gas/testsuite/gas/loongarch/macro_op_32.d b/gas/testsuite/gas/loongarch/macro_op_32.d -index 145d852..188026a 100644 ---- a/gas/testsuite/gas/loongarch/macro_op_32.d -+++ b/gas/testsuite/gas/loongarch/macro_op_32.d -@@ -7,36 +7,46 @@ - - Disassembly of section .text: - --00000000.* <.text>: -+00000000.* <.L1>: - [ ]+0:[ ]+00150004[ ]+move[ ]+\$a0,[ ]+\$zero --[ ]+4:[ ]+02bffc04[ ]+addi.w[ ]+\$a0,[ ]+\$zero,[ ]+-1\(0xfff\) -+[ ]+4:[ ]+02bffc04[ ]+li\.w[ ]+\$a0,[ ]+-1 - [ ]+8:[ ]+00150004[ ]+move[ ]+\$a0,[ ]+\$zero --[ ]+c:[ ]+02bffc04[ ]+addi.w[ ]+\$a0,[ ]+\$zero,[ ]+-1\(0xfff\) -+[ ]+c:[ ]+02bffc04[ ]+li\.w[ ]+\$a0,[ ]+-1 - [ ]+10:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+10:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text -+[ ]+10:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 -+[ ]+10:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+14:[ ]+28800084[ ]+ld.w[ ]+\$a0,[ ]+\$a0,[ ]+0 --[ ]+14:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text -+[ ]+14:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 -+[ ]+14:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+18:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+18:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text -+[ ]+18:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 -+[ ]+18:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+1c:[ ]+28800084[ ]+ld.w[ ]+\$a0,[ ]+\$a0,[ ]+0 --[ ]+1c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text -+[ ]+1c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 -+[ ]+1c:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+20:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+20:[ ]+R_LARCH_PCALA_HI20[ ]+.text -+[ ]+20:[ ]+R_LARCH_PCALA_HI20[ ]+.L1 -+[ ]+20:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+24:[ ]+02800084[ ]+addi.w[ ]+\$a0,[ ]+\$a0,[ ]+0 --[ ]+24:[ ]+R_LARCH_PCALA_LO12[ ]+.text -+[ ]+24:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 -+[ ]+24:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+28:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 - [ ]+28:[ ]+R_LARCH_MARK_LA[ ]+\*ABS\* --[ ]+28:[ ]+R_LARCH_ABS_HI20[ ]+.text -+[ ]+28:[ ]+R_LARCH_ABS_HI20[ ]+.L1 - [ ]+2c:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 --[ ]+2c:[ ]+R_LARCH_ABS_LO12[ ]+.text -+[ ]+2c:[ ]+R_LARCH_ABS_LO12[ ]+.L1 - [ ]+30:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+30:[ ]+R_LARCH_PCALA_HI20[ ]+.text -+[ ]+30:[ ]+R_LARCH_PCALA_HI20[ ]+.L1 -+[ ]+30:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+34:[ ]+02800084[ ]+addi.w[ ]+\$a0,[ ]+\$a0,[ ]+0 --[ ]+34:[ ]+R_LARCH_PCALA_LO12[ ]+.text -+[ ]+34:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 -+[ ]+34:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+38:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+38:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text -+[ ]+38:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 -+[ ]+38:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+3c:[ ]+28800084[ ]+ld.w[ ]+\$a0,[ ]+\$a0,[ ]+0 --[ ]+3c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text -+[ ]+3c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 -+[ ]+3c:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+40:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 - [ ]+40:[ ]+R_LARCH_TLS_LE_HI20[ ]+TLS1 - [ ]+44:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 -@@ -49,7 +59,9 @@ Disassembly of section .text: - [ ]+50:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLS1 - [ ]+54:[ ]+02800084[ ]+addi.w[ ]+\$a0,[ ]+\$a0,[ ]+0 - [ ]+54:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 -+[ ]+54:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+58:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 - [ ]+58:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLS1 - [ ]+5c:[ ]+02800084[ ]+addi.w[ ]+\$a0,[ ]+\$a0,[ ]+0 - [ ]+5c:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 -+[ ]+5c:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -diff --git a/gas/testsuite/gas/loongarch/macro_op_large_abs.d b/gas/testsuite/gas/loongarch/macro_op_large_abs.d -index c3214a8..0c49f68 100644 ---- a/gas/testsuite/gas/loongarch/macro_op_large_abs.d -+++ b/gas/testsuite/gas/loongarch/macro_op_large_abs.d -@@ -1,4 +1,4 @@ --#as: -+#as: -mla-global-with-abs - #objdump: -dr - #skip: loongarch32-*-* - -@@ -7,71 +7,79 @@ - - Disassembly of section .text: - --00000000.* <.text>: -+00000000.* <.L1>: - [ ]+0:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+0:[ ]+R_LARCH_PCALA_HI20[ ]+.text --[ ]+4:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 --[ ]+4:[ ]+R_LARCH_PCALA_LO12[ ]+.text -+[ ]+0:[ ]+R_LARCH_PCALA_HI20[ ]+.L1 -+[ ]+0:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+4:[ ]+02c00005[ ]+li\.d[ ]+\$a1,[ ]+0 -+[ ]+4:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 -+[ ]+4:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+8:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 --[ ]+8:[ ]+R_LARCH_PCALA64_LO20[ ]+.text -+[ ]+8:[ ]+R_LARCH_PCALA64_LO20[ ]+.L1 - [ ]+c:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 --[ ]+c:[ ]+R_LARCH_PCALA64_HI12[ ]+.text -+[ ]+c:[ ]+R_LARCH_PCALA64_HI12[ ]+.L1 - [ ]+10:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 --[ ]+14:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+14:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text --[ ]+18:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 --[ ]+18:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text --[ ]+1c:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 --[ ]+1c:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.text --[ ]+20:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 --[ ]+20:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.text --[ ]+24:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 --[ ]+28:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+28:[ ]+R_LARCH_PCALA_HI20[ ]+.text --[ ]+2c:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 --[ ]+2c:[ ]+R_LARCH_PCALA_LO12[ ]+.text --[ ]+30:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 --[ ]+30:[ ]+R_LARCH_PCALA64_LO20[ ]+.text --[ ]+34:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 --[ ]+34:[ ]+R_LARCH_PCALA64_HI12[ ]+.text --[ ]+38:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 --[ ]+3c:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+3c:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text --[ ]+40:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 --[ ]+40:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text --[ ]+44:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 --[ ]+44:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.text --[ ]+48:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 --[ ]+48:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.text --[ ]+4c:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 --[ ]+50:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 --[ ]+50:[ ]+R_LARCH_TLS_LE_HI20[ ]+TLS1 --[ ]+54:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 --[ ]+54:[ ]+R_LARCH_TLS_LE_LO12[ ]+TLS1 --[ ]+58:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+58:[ ]+R_LARCH_TLS_IE_PC_HI20[ ]+TLS1 --[ ]+5c:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 --[ ]+5c:[ ]+R_LARCH_TLS_IE_PC_LO12[ ]+TLS1 --[ ]+60:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 --[ ]+60:[ ]+R_LARCH_TLS_IE64_PC_LO20[ ]+TLS1 --[ ]+64:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 --[ ]+64:[ ]+R_LARCH_TLS_IE64_PC_HI12[ ]+TLS1 --[ ]+68:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 --[ ]+6c:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+6c:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLS1 --[ ]+70:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 --[ ]+70:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 --[ ]+74:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 --[ ]+74:[ ]+R_LARCH_GOT64_PC_LO20[ ]+TLS1 --[ ]+78:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 --[ ]+78:[ ]+R_LARCH_GOT64_PC_HI12[ ]+TLS1 --[ ]+7c:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 --[ ]+80:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+80:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLS1 --[ ]+84:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 --[ ]+84:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 --[ ]+88:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 --[ ]+88:[ ]+R_LARCH_GOT64_PC_LO20[ ]+TLS1 --[ ]+8c:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 --[ ]+8c:[ ]+R_LARCH_GOT64_PC_HI12[ ]+TLS1 --[ ]+90:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 -+[ ]+14:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 -+[ ]+14:[ ]+R_LARCH_MARK_LA[ ]+\*ABS\* -+[ ]+14:[ ]+R_LARCH_ABS_HI20[ ]+.L1 -+[ ]+18:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 -+[ ]+18:[ ]+R_LARCH_ABS_LO12[ ]+.L1 -+[ ]+1c:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 -+[ ]+1c:[ ]+R_LARCH_ABS64_LO20[ ]+.L1 -+[ ]+20:[ ]+03000084[ ]+lu52i.d[ ]+\$a0,[ ]+\$a0,[ ]+0 -+[ ]+20:[ ]+R_LARCH_ABS64_HI12[ ]+.L1 -+[ ]+24:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 -+[ ]+24:[ ]+R_LARCH_PCALA_HI20[ ]+.L1 -+[ ]+24:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+28:[ ]+02c00005[ ]+li\.d[ ]+\$a1,[ ]+0 -+[ ]+28:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 -+[ ]+28:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+2c:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 -+[ ]+2c:[ ]+R_LARCH_PCALA64_LO20[ ]+.L1 -+[ ]+30:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 -+[ ]+30:[ ]+R_LARCH_PCALA64_HI12[ ]+.L1 -+[ ]+34:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 -+[ ]+38:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 -+[ ]+38:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 -+[ ]+38:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+3c:[ ]+02c00005[ ]+li\.d[ ]+\$a1,[ ]+0 -+[ ]+3c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 -+[ ]+3c:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+40:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 -+[ ]+40:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.L1 -+[ ]+44:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 -+[ ]+44:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.L1 -+[ ]+48:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 -+[ ]+4c:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 -+[ ]+4c:[ ]+R_LARCH_TLS_LE_HI20[ ]+TLS1 -+[ ]+50:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 -+[ ]+50:[ ]+R_LARCH_TLS_LE_LO12[ ]+TLS1 -+[ ]+54:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 -+[ ]+54:[ ]+R_LARCH_TLS_IE_PC_HI20[ ]+TLS1 -+[ ]+58:[ ]+02c00005[ ]+li\.d[ ]+\$a1,[ ]+0 -+[ ]+58:[ ]+R_LARCH_TLS_IE_PC_LO12[ ]+TLS1 -+[ ]+5c:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 -+[ ]+5c:[ ]+R_LARCH_TLS_IE64_PC_LO20[ ]+TLS1 -+[ ]+60:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 -+[ ]+60:[ ]+R_LARCH_TLS_IE64_PC_HI12[ ]+TLS1 -+[ ]+64:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 -+[ ]+68:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 -+[ ]+68:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLS1 -+[ ]+6c:[ ]+02c00005[ ]+li\.d[ ]+\$a1,[ ]+0 -+[ ]+6c:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 -+[ ]+6c:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+70:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 -+[ ]+70:[ ]+R_LARCH_GOT64_PC_LO20[ ]+TLS1 -+[ ]+74:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 -+[ ]+74:[ ]+R_LARCH_GOT64_PC_HI12[ ]+TLS1 -+[ ]+78:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 -+[ ]+7c:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 -+[ ]+7c:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLS1 -+[ ]+80:[ ]+02c00005[ ]+li\.d[ ]+\$a1,[ ]+0 -+[ ]+80:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 -+[ ]+80:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+84:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 -+[ ]+84:[ ]+R_LARCH_GOT64_PC_LO20[ ]+TLS1 -+[ ]+88:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 -+[ ]+88:[ ]+R_LARCH_GOT64_PC_HI12[ ]+TLS1 -+[ ]+8c:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 -diff --git a/gas/testsuite/gas/loongarch/macro_op_large_pc.d b/gas/testsuite/gas/loongarch/macro_op_large_pc.d -index c3214a8..0c49f68 100644 ---- a/gas/testsuite/gas/loongarch/macro_op_large_pc.d -+++ b/gas/testsuite/gas/loongarch/macro_op_large_pc.d -@@ -1,4 +1,4 @@ --#as: -+#as: -mla-global-with-abs - #objdump: -dr - #skip: loongarch32-*-* - -@@ -7,71 +7,79 @@ - - Disassembly of section .text: - --00000000.* <.text>: -+00000000.* <.L1>: - [ ]+0:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+0:[ ]+R_LARCH_PCALA_HI20[ ]+.text --[ ]+4:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 --[ ]+4:[ ]+R_LARCH_PCALA_LO12[ ]+.text -+[ ]+0:[ ]+R_LARCH_PCALA_HI20[ ]+.L1 -+[ ]+0:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+4:[ ]+02c00005[ ]+li\.d[ ]+\$a1,[ ]+0 -+[ ]+4:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 -+[ ]+4:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+8:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 --[ ]+8:[ ]+R_LARCH_PCALA64_LO20[ ]+.text -+[ ]+8:[ ]+R_LARCH_PCALA64_LO20[ ]+.L1 - [ ]+c:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 --[ ]+c:[ ]+R_LARCH_PCALA64_HI12[ ]+.text -+[ ]+c:[ ]+R_LARCH_PCALA64_HI12[ ]+.L1 - [ ]+10:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 --[ ]+14:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+14:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text --[ ]+18:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 --[ ]+18:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text --[ ]+1c:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 --[ ]+1c:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.text --[ ]+20:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 --[ ]+20:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.text --[ ]+24:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 --[ ]+28:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+28:[ ]+R_LARCH_PCALA_HI20[ ]+.text --[ ]+2c:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 --[ ]+2c:[ ]+R_LARCH_PCALA_LO12[ ]+.text --[ ]+30:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 --[ ]+30:[ ]+R_LARCH_PCALA64_LO20[ ]+.text --[ ]+34:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 --[ ]+34:[ ]+R_LARCH_PCALA64_HI12[ ]+.text --[ ]+38:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 --[ ]+3c:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+3c:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text --[ ]+40:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 --[ ]+40:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text --[ ]+44:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 --[ ]+44:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.text --[ ]+48:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 --[ ]+48:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.text --[ ]+4c:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 --[ ]+50:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 --[ ]+50:[ ]+R_LARCH_TLS_LE_HI20[ ]+TLS1 --[ ]+54:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 --[ ]+54:[ ]+R_LARCH_TLS_LE_LO12[ ]+TLS1 --[ ]+58:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+58:[ ]+R_LARCH_TLS_IE_PC_HI20[ ]+TLS1 --[ ]+5c:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 --[ ]+5c:[ ]+R_LARCH_TLS_IE_PC_LO12[ ]+TLS1 --[ ]+60:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 --[ ]+60:[ ]+R_LARCH_TLS_IE64_PC_LO20[ ]+TLS1 --[ ]+64:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 --[ ]+64:[ ]+R_LARCH_TLS_IE64_PC_HI12[ ]+TLS1 --[ ]+68:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 --[ ]+6c:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+6c:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLS1 --[ ]+70:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 --[ ]+70:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 --[ ]+74:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 --[ ]+74:[ ]+R_LARCH_GOT64_PC_LO20[ ]+TLS1 --[ ]+78:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 --[ ]+78:[ ]+R_LARCH_GOT64_PC_HI12[ ]+TLS1 --[ ]+7c:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 --[ ]+80:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+80:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLS1 --[ ]+84:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 --[ ]+84:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 --[ ]+88:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 --[ ]+88:[ ]+R_LARCH_GOT64_PC_LO20[ ]+TLS1 --[ ]+8c:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 --[ ]+8c:[ ]+R_LARCH_GOT64_PC_HI12[ ]+TLS1 --[ ]+90:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 -+[ ]+14:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 -+[ ]+14:[ ]+R_LARCH_MARK_LA[ ]+\*ABS\* -+[ ]+14:[ ]+R_LARCH_ABS_HI20[ ]+.L1 -+[ ]+18:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 -+[ ]+18:[ ]+R_LARCH_ABS_LO12[ ]+.L1 -+[ ]+1c:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 -+[ ]+1c:[ ]+R_LARCH_ABS64_LO20[ ]+.L1 -+[ ]+20:[ ]+03000084[ ]+lu52i.d[ ]+\$a0,[ ]+\$a0,[ ]+0 -+[ ]+20:[ ]+R_LARCH_ABS64_HI12[ ]+.L1 -+[ ]+24:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 -+[ ]+24:[ ]+R_LARCH_PCALA_HI20[ ]+.L1 -+[ ]+24:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+28:[ ]+02c00005[ ]+li\.d[ ]+\$a1,[ ]+0 -+[ ]+28:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 -+[ ]+28:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+2c:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 -+[ ]+2c:[ ]+R_LARCH_PCALA64_LO20[ ]+.L1 -+[ ]+30:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 -+[ ]+30:[ ]+R_LARCH_PCALA64_HI12[ ]+.L1 -+[ ]+34:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 -+[ ]+38:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 -+[ ]+38:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 -+[ ]+38:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+3c:[ ]+02c00005[ ]+li\.d[ ]+\$a1,[ ]+0 -+[ ]+3c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 -+[ ]+3c:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+40:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 -+[ ]+40:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.L1 -+[ ]+44:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 -+[ ]+44:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.L1 -+[ ]+48:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 -+[ ]+4c:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 -+[ ]+4c:[ ]+R_LARCH_TLS_LE_HI20[ ]+TLS1 -+[ ]+50:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 -+[ ]+50:[ ]+R_LARCH_TLS_LE_LO12[ ]+TLS1 -+[ ]+54:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 -+[ ]+54:[ ]+R_LARCH_TLS_IE_PC_HI20[ ]+TLS1 -+[ ]+58:[ ]+02c00005[ ]+li\.d[ ]+\$a1,[ ]+0 -+[ ]+58:[ ]+R_LARCH_TLS_IE_PC_LO12[ ]+TLS1 -+[ ]+5c:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 -+[ ]+5c:[ ]+R_LARCH_TLS_IE64_PC_LO20[ ]+TLS1 -+[ ]+60:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 -+[ ]+60:[ ]+R_LARCH_TLS_IE64_PC_HI12[ ]+TLS1 -+[ ]+64:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 -+[ ]+68:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 -+[ ]+68:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLS1 -+[ ]+6c:[ ]+02c00005[ ]+li\.d[ ]+\$a1,[ ]+0 -+[ ]+6c:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 -+[ ]+6c:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+70:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 -+[ ]+70:[ ]+R_LARCH_GOT64_PC_LO20[ ]+TLS1 -+[ ]+74:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 -+[ ]+74:[ ]+R_LARCH_GOT64_PC_HI12[ ]+TLS1 -+[ ]+78:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 -+[ ]+7c:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 -+[ ]+7c:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLS1 -+[ ]+80:[ ]+02c00005[ ]+li\.d[ ]+\$a1,[ ]+0 -+[ ]+80:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 -+[ ]+80:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+84:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 -+[ ]+84:[ ]+R_LARCH_GOT64_PC_LO20[ ]+TLS1 -+[ ]+88:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 -+[ ]+88:[ ]+R_LARCH_GOT64_PC_HI12[ ]+TLS1 -+[ ]+8c:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 -diff --git a/gas/testsuite/gas/loongarch/nop.d b/gas/testsuite/gas/loongarch/nop.d -index 4cdcc5c..222456e 100644 ---- a/gas/testsuite/gas/loongarch/nop.d -+++ b/gas/testsuite/gas/loongarch/nop.d -@@ -7,4 +7,4 @@ - Disassembly of section .text: - - 0+000 : --[ ]+0:[ ]+03400000[ ]+andi[ ]+\$zero, \$zero, 0x0 -+[ ]+0:[ ]+03400000[ ]+nop[ ]+ -diff --git a/gas/testsuite/gas/loongarch/privilege_op.d b/gas/testsuite/gas/loongarch/privilege_op.d -index 12d4790..73925f2 100644 ---- a/gas/testsuite/gas/loongarch/privilege_op.d -+++ b/gas/testsuite/gas/loongarch/privilege_op.d -@@ -15,10 +15,10 @@ Disassembly of section .text: - [ ]+14:[ ]+04fffca4 [ ]+csrxchg[ ]+[ ]+\$a0, \$a1, 0x3fff - [ ]+18:[ ]+060000a0 [ ]+cacop[ ]+[ ]+0x0, \$a1, 0 - [ ]+1c:[ ]+060000bf [ ]+cacop[ ]+[ ]+0x1f, \$a1, 0 --[ ]+20:[ ]+061ffca0 [ ]+cacop[ ]+[ ]+0x0, \$a1, 2047\(0x7ff\) --[ ]+24:[ ]+061ffcbf [ ]+cacop[ ]+[ ]+0x1f, \$a1, 2047\(0x7ff\) --[ ]+28:[ ]+062004a0 [ ]+cacop[ ]+[ ]+0x0, \$a1, -2047\(0x801\) --[ ]+2c:[ ]+062004bf [ ]+cacop[ ]+[ ]+0x1f, \$a1, -2047\(0x801\) -+[ ]+20:[ ]+061ffca0 [ ]+cacop[ ]+[ ]+0x0, \$a1, 2047 -+[ ]+24:[ ]+061ffcbf [ ]+cacop[ ]+[ ]+0x1f, \$a1, 2047 -+[ ]+28:[ ]+062004a0 [ ]+cacop[ ]+[ ]+0x0, \$a1, -2047 -+[ ]+2c:[ ]+062004bf [ ]+cacop[ ]+[ ]+0x1f, \$a1, -2047 - [ ]+30:[ ]+064000a4 [ ]+lddir[ ]+[ ]+\$a0, \$a1, 0x0 - [ ]+34:[ ]+0643fca4 [ ]+lddir[ ]+[ ]+\$a0, \$a1, 0xff - [ ]+38:[ ]+064400a0 [ ]+ldpte[ ]+[ ]+\$a1, 0x0 -diff --git a/gas/testsuite/gas/loongarch/raw-insn.d b/gas/testsuite/gas/loongarch/raw-insn.d -new file mode 100644 -index 0000000..64980e4 ---- /dev/null -+++ b/gas/testsuite/gas/loongarch/raw-insn.d -@@ -0,0 +1,11 @@ -+#as: -+#objdump: -dr -+ -+.*:[ ]+file format .* -+ -+ -+Disassembly of section .text: -+ -+0+000 : -+[ ]+0:[ ]+00000000[ ]+.word[ ]+0x00000000 -+[ ]+4:[ ]+feedf00d[ ]+.word[ ]+0xfeedf00d -diff --git a/gas/testsuite/gas/loongarch/raw-insn.s b/gas/testsuite/gas/loongarch/raw-insn.s -new file mode 100644 -index 0000000..528b152 ---- /dev/null -+++ b/gas/testsuite/gas/loongarch/raw-insn.s -@@ -0,0 +1,7 @@ -+target: -+ .word 0 -+ # Given how the LoongArch encoding space is apparently centrally- -+ # managed and sequentially allocated in chunks of prefixes, it is -+ # highly unlikely this would become a valid LoongArch instruction in -+ # the foreseeable future. -+ .word 0xfeedf00d -diff --git a/gas/testsuite/gas/loongarch/relax_align.d b/gas/testsuite/gas/loongarch/relax_align.d -new file mode 100644 -index 0000000..1810eb4 ---- /dev/null -+++ b/gas/testsuite/gas/loongarch/relax_align.d -@@ -0,0 +1,26 @@ -+#as: -+#objdump: -dr -+#skip: loongarch32-*-* -+ -+.*:[ ]+file format .* -+ -+ -+Disassembly of section .text: -+ -+00000000.* : -+[ ]+0:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 -+[ ]+0:[ ]+R_LARCH_PCALA_HI20[ ]+L1 -+[ ]+0:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+4:[ ]+02c00084[ ]+addi\.d[ ]+\$a0,[ ]+\$a0,[ ]+0 -+[ ]+4:[ ]+R_LARCH_PCALA_LO12[ ]+L1 -+[ ]+4:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+8:[ ]+03400000[ ]+nop[ ]+ -+[ ]+8:[ ]+R_LARCH_ALIGN[ ]+\*ABS\*\+0xc -+[ ]+c:[ ]+03400000[ ]+nop[ ]+ -+[ ]+10:[ ]+03400000[ ]+nop[ ]+ -+[ ]+14:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 -+[ ]+14:[ ]+R_LARCH_PCALA_HI20[ ]+L1 -+[ ]+14:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+18:[ ]+02c00084[ ]+addi\.d[ ]+\$a0,[ ]+\$a0,[ ]+0 -+[ ]+18:[ ]+R_LARCH_PCALA_LO12[ ]+L1 -+[ ]+18:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -diff --git a/gas/testsuite/gas/loongarch/relax_align.s b/gas/testsuite/gas/loongarch/relax_align.s -new file mode 100644 -index 0000000..3880d78 ---- /dev/null -+++ b/gas/testsuite/gas/loongarch/relax_align.s -@@ -0,0 +1,5 @@ -+ .text -+L1: -+ la.local $a0, L1 -+ .align 4 -+ la.local $a0, L1 -diff --git a/gas/testsuite/gas/loongarch/reloc.d b/gas/testsuite/gas/loongarch/reloc.d -index 6f5f110..c3820c5 100644 ---- a/gas/testsuite/gas/loongarch/reloc.d -+++ b/gas/testsuite/gas/loongarch/reloc.d -@@ -8,7 +8,7 @@ - Disassembly of section .text: - - 00000000.* <.text>: --[ ]+0:[ ]+03400000[ ]+andi[ ]+\$zero,[ ]+\$zero,[ ]+0x0 -+[ ]+0:[ ]+03400000[ ]+nop[ ]+ - [ ]+4:[ ]+58000085[ ]+beq[ ]+\$a0,[ ]+\$a1,[ ]+0[ ]+#[ ]+0x4 - [ ]+4:[ ]+R_LARCH_B16[ ]+.L1 - [ ]+8:[ ]+5c000085[ ]+bne[ ]+\$a0,[ ]+\$a1,[ ]+0[ ]+#[ ]+0x8 -diff --git a/gas/testsuite/gas/loongarch/uleb128.d b/gas/testsuite/gas/loongarch/uleb128.d -new file mode 100644 -index 0000000..1a6730f ---- /dev/null -+++ b/gas/testsuite/gas/loongarch/uleb128.d -@@ -0,0 +1,36 @@ -+#as: -+#objdump: -Dr -+#skip: loongarch32-*-* -+ -+.*:[ ]+file format .* -+ -+ -+Disassembly of section .data: -+ -+00000000.* : -+[ ]*0:[ ]*80030201[ ]*\.word[ ]*0x80030201 -+[ ]*3:[ ]*R_LARCH_ADD_ULEB128[ ]*L2 -+[ ]*3:[ ]*R_LARCH_SUB_ULEB128[ ]*L1 -+[ ]*\.\.\. -+ -+[ ]*0000000000000005[ ]*: -+[ ]*\.\.\. -+[ ]*81:[ ]*ff040000[ ]*\.word[ ]*0xff040000 -+[ ]*85:[ ]*cacop[ ]*0x1f,[ ]*\$t3,[ ]*1 -+ -+[ ]*0000000000000086[ ]*: -+[ ]*86:[ ]*07060005[ ]*\.word[ ]*0x07060005 -+[ ]*8a:[ ]*x86inc\.b[ ]*\$a0 -+[ ]*8a:[ ]*R_LARCH_ADD_ULEB128[ ]*L4 -+[ ]*8a:[ ]*R_LARCH_SUB_ULEB128[ ]*L3 -+ -+[ ]*000000000000008d[ ]*: -+[ ]*\.\.\. -+[ ]*4089:[ ]*ff080000[ ]*\.word[ ]*0xff080000 -+[ ]*408d:[ ]*\.word[ ]*0x09ffffff -+ -+[ ]*0000000000004090[ ]*: -+[ ]*4090:[ ]*09090909[ ]*\.word[ ]*0x09090909 -+[ ]*4094:[ ]*09090909[ ]*\.word[ ]*0x09090909 -+[ ]*4098:[ ]*09090909[ ]*\.word[ ]*0x09090909 -+[ ]*409c:[ ]*09090909[ ]*\.word[ ]*0x09090909 -diff --git a/gas/testsuite/gas/loongarch/uleb128.s b/gas/testsuite/gas/loongarch/uleb128.s -new file mode 100644 -index 0000000..104a895 ---- /dev/null -+++ b/gas/testsuite/gas/loongarch/uleb128.s -@@ -0,0 +1,20 @@ -+ .data -+ .byte 1, 2, 3 -+ .uleb128 L2 - L1 -+L1: -+ .space 128 - 2 -+ .byte 4 -+ .p2align 1, 0xff -+L2: -+ .byte 5 -+ -+ .p2align 2 -+ .byte 6, 7 -+ .uleb128 L4 - L3 -+L3: -+ .space 128*128 - 2 -+ .byte 8 -+ .p2align 2, 0xff -+L4: -+ .byte 9 -+ .p2align 4, 9 -diff --git a/gas/testsuite/gas/loongarch/vector.d b/gas/testsuite/gas/loongarch/vector.d -new file mode 100644 -index 0000000..1a092bc ---- /dev/null -+++ b/gas/testsuite/gas/loongarch/vector.d -@@ -0,0 +1,1461 @@ -+#as: -+#objdump: -dr -+#skip: loongarch32-*-* -+ -+.*:[ ]+file format .* -+ -+ -+Disassembly of section .text: -+ -+00000000.* <.text>: -+[ ]+0:[ ]+09118820[ ]+vfmadd.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2,[ ]+\$vr3 -+[ ]+4:[ ]+09518820[ ]+vfmsub.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2,[ ]+\$vr3 -+[ ]+8:[ ]+09918820[ ]+vfnmadd.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2,[ ]+\$vr3 -+[ ]+c:[ ]+09d18820[ ]+vfnmsub.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2,[ ]+\$vr3 -+[ ]+10:[ ]+0a118820[ ]+xvfmadd.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2,[ ]+\$xr3 -+[ ]+14:[ ]+0a518820[ ]+xvfmsub.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2,[ ]+\$xr3 -+[ ]+18:[ ]+0a918820[ ]+xvfnmadd.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2,[ ]+\$xr3 -+[ ]+1c:[ ]+0ad18820[ ]+xvfnmsub.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2,[ ]+\$xr3 -+[ ]+20:[ ]+0c500820[ ]+vfcmp.caf.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+24:[ ]+0c508820[ ]+vfcmp.saf.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+28:[ ]+0c510820[ ]+vfcmp.clt.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+2c:[ ]+0c518820[ ]+vfcmp.slt.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+30:[ ]+0c520820[ ]+vfcmp.ceq.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+34:[ ]+0c528820[ ]+vfcmp.seq.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+38:[ ]+0c530820[ ]+vfcmp.cle.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+3c:[ ]+0c538820[ ]+vfcmp.sle.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+40:[ ]+0c540820[ ]+vfcmp.cun.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+44:[ ]+0c548820[ ]+vfcmp.sun.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+48:[ ]+0c550820[ ]+vfcmp.cult.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+4c:[ ]+0c558820[ ]+vfcmp.sult.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+50:[ ]+0c560820[ ]+vfcmp.cueq.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+54:[ ]+0c568820[ ]+vfcmp.sueq.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+58:[ ]+0c570820[ ]+vfcmp.cule.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+5c:[ ]+0c578820[ ]+vfcmp.sule.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+60:[ ]+0c580820[ ]+vfcmp.cne.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+64:[ ]+0c588820[ ]+vfcmp.sne.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+68:[ ]+0c5a0820[ ]+vfcmp.cor.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+6c:[ ]+0c5a8820[ ]+vfcmp.sor.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+70:[ ]+0c5c0820[ ]+vfcmp.cune.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+74:[ ]+0c5c8820[ ]+vfcmp.sune.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+78:[ ]+0c900820[ ]+xvfcmp.caf.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+7c:[ ]+0c908820[ ]+xvfcmp.saf.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+80:[ ]+0c910820[ ]+xvfcmp.clt.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+84:[ ]+0c918820[ ]+xvfcmp.slt.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+88:[ ]+0c920820[ ]+xvfcmp.ceq.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+8c:[ ]+0c928820[ ]+xvfcmp.seq.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+90:[ ]+0c930820[ ]+xvfcmp.cle.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+94:[ ]+0c938820[ ]+xvfcmp.sle.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+98:[ ]+0c940820[ ]+xvfcmp.cun.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+9c:[ ]+0c948820[ ]+xvfcmp.sun.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+a0:[ ]+0c950820[ ]+xvfcmp.cult.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+a4:[ ]+0c958820[ ]+xvfcmp.sult.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+a8:[ ]+0c960820[ ]+xvfcmp.cueq.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ac:[ ]+0c968820[ ]+xvfcmp.sueq.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+b0:[ ]+0c970820[ ]+xvfcmp.cule.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+b4:[ ]+0c978820[ ]+xvfcmp.sule.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+b8:[ ]+0c980820[ ]+xvfcmp.cne.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+bc:[ ]+0c988820[ ]+xvfcmp.sne.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c0:[ ]+0c9a0820[ ]+xvfcmp.cor.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c4:[ ]+0c9a8820[ ]+xvfcmp.sor.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c8:[ ]+0c9c0820[ ]+xvfcmp.cune.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+cc:[ ]+0c9c8820[ ]+xvfcmp.sune.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d0:[ ]+0d118820[ ]+vbitsel.v[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2,[ ]+\$vr3 -+[ ]+d4:[ ]+0d218820[ ]+xvbitsel.v[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2,[ ]+\$xr3 -+[ ]+d8:[ ]+0d518820[ ]+vshuf.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2,[ ]+\$vr3 -+[ ]+dc:[ ]+0d618820[ ]+xvshuf.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2,[ ]+\$xr3 -+[ ]+e0:[ ]+09218820[ ]+vfmadd.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2,[ ]+\$vr3 -+[ ]+e4:[ ]+09618820[ ]+vfmsub.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2,[ ]+\$vr3 -+[ ]+e8:[ ]+09a18820[ ]+vfnmadd.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2,[ ]+\$vr3 -+[ ]+ec:[ ]+09e18820[ ]+vfnmsub.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2,[ ]+\$vr3 -+[ ]+f0:[ ]+0a218820[ ]+xvfmadd.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2,[ ]+\$xr3 -+[ ]+f4:[ ]+0a618820[ ]+xvfmsub.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2,[ ]+\$xr3 -+[ ]+f8:[ ]+0aa18820[ ]+xvfnmadd.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2,[ ]+\$xr3 -+[ ]+fc:[ ]+0ae18820[ ]+xvfnmsub.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2,[ ]+\$xr3 -+[ ]+100:[ ]+0c600820[ ]+vfcmp.caf.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+104:[ ]+0c608820[ ]+vfcmp.saf.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+108:[ ]+0c610820[ ]+vfcmp.clt.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+10c:[ ]+0c618820[ ]+vfcmp.slt.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+110:[ ]+0c620820[ ]+vfcmp.ceq.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+114:[ ]+0c628820[ ]+vfcmp.seq.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+118:[ ]+0c630820[ ]+vfcmp.cle.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+11c:[ ]+0c638820[ ]+vfcmp.sle.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+120:[ ]+0c640820[ ]+vfcmp.cun.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+124:[ ]+0c648820[ ]+vfcmp.sun.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+128:[ ]+0c650820[ ]+vfcmp.cult.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+12c:[ ]+0c658820[ ]+vfcmp.sult.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+130:[ ]+0c660820[ ]+vfcmp.cueq.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+134:[ ]+0c668820[ ]+vfcmp.sueq.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+138:[ ]+0c670820[ ]+vfcmp.cule.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+13c:[ ]+0c678820[ ]+vfcmp.sule.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+140:[ ]+0c680820[ ]+vfcmp.cne.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+144:[ ]+0c688820[ ]+vfcmp.sne.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+148:[ ]+0c6a0820[ ]+vfcmp.cor.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+14c:[ ]+0c6a8820[ ]+vfcmp.sor.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+150:[ ]+0c6c0820[ ]+vfcmp.cune.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+154:[ ]+0c6c8820[ ]+vfcmp.sune.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+158:[ ]+0ca00820[ ]+xvfcmp.caf.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+15c:[ ]+0ca08820[ ]+xvfcmp.saf.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+160:[ ]+0ca10820[ ]+xvfcmp.clt.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+164:[ ]+0ca18820[ ]+xvfcmp.slt.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+168:[ ]+0ca20820[ ]+xvfcmp.ceq.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+16c:[ ]+0ca28820[ ]+xvfcmp.seq.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+170:[ ]+0ca30820[ ]+xvfcmp.cle.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+174:[ ]+0ca38820[ ]+xvfcmp.sle.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+178:[ ]+0ca40820[ ]+xvfcmp.cun.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+17c:[ ]+0ca48820[ ]+xvfcmp.sun.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+180:[ ]+0ca50820[ ]+xvfcmp.cult.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+184:[ ]+0ca58820[ ]+xvfcmp.sult.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+188:[ ]+0ca60820[ ]+xvfcmp.cueq.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+18c:[ ]+0ca68820[ ]+xvfcmp.sueq.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+190:[ ]+0ca70820[ ]+xvfcmp.cule.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+194:[ ]+0ca78820[ ]+xvfcmp.sule.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+198:[ ]+0ca80820[ ]+xvfcmp.cne.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+19c:[ ]+0ca88820[ ]+xvfcmp.sne.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1a0:[ ]+0caa0820[ ]+xvfcmp.cor.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1a4:[ ]+0caa8820[ ]+xvfcmp.sor.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1a8:[ ]+0cac0820[ ]+xvfcmp.cune.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1ac:[ ]+0cac8820[ ]+xvfcmp.sune.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1b0:[ ]+2c000420[ ]+vld[ ]+\$vr0,[ ]+\$ra,[ ]+1 -+[ ]+1b4:[ ]+2c400420[ ]+vst[ ]+\$vr0,[ ]+\$ra,[ ]+1 -+[ ]+1b8:[ ]+2c800420[ ]+xvld[ ]+\$xr0,[ ]+\$ra,[ ]+1 -+[ ]+1bc:[ ]+2cc00420[ ]+xvst[ ]+\$xr0,[ ]+\$ra,[ ]+1 -+[ ]+1c0:[ ]+38400820[ ]+vldx[ ]+\$vr0,[ ]+\$ra,[ ]+\$tp -+[ ]+1c4:[ ]+38440820[ ]+vstx[ ]+\$vr0,[ ]+\$ra,[ ]+\$tp -+[ ]+1c8:[ ]+38480820[ ]+xvldx[ ]+\$xr0,[ ]+\$ra,[ ]+\$tp -+[ ]+1cc:[ ]+384c0820[ ]+xvstx[ ]+\$xr0,[ ]+\$ra,[ ]+\$tp -+[ ]+1d0:[ ]+3011f420[ ]+vldrepl.d[ ]+\$vr0,[ ]+\$ra,[ ]+1000 -+[ ]+1d4:[ ]+30206420[ ]+vldrepl.w[ ]+\$vr0,[ ]+\$ra,[ ]+100 -+[ ]+1d8:[ ]+30401420[ ]+vldrepl.h[ ]+\$vr0,[ ]+\$ra,[ ]+10 -+[ ]+1dc:[ ]+30800420[ ]+vldrepl.b[ ]+\$vr0,[ ]+\$ra,[ ]+1 -+[ ]+1e0:[ ]+3115f420[ ]+vstelm.d[ ]+\$vr0,[ ]+\$ra,[ ]+1000,[ ]+0x1 -+[ ]+1e4:[ ]+31246420[ ]+vstelm.w[ ]+\$vr0,[ ]+\$ra,[ ]+100,[ ]+0x1 -+[ ]+1e8:[ ]+31441420[ ]+vstelm.h[ ]+\$vr0,[ ]+\$ra,[ ]+10,[ ]+0x1 -+[ ]+1ec:[ ]+31840420[ ]+vstelm.b[ ]+\$vr0,[ ]+\$ra,[ ]+1,[ ]+0x1 -+[ ]+1f0:[ ]+3211f420[ ]+xvldrepl.d[ ]+\$xr0,[ ]+\$ra,[ ]+1000 -+[ ]+1f4:[ ]+32206420[ ]+xvldrepl.w[ ]+\$xr0,[ ]+\$ra,[ ]+100 -+[ ]+1f8:[ ]+32401420[ ]+xvldrepl.h[ ]+\$xr0,[ ]+\$ra,[ ]+10 -+[ ]+1fc:[ ]+32800420[ ]+xvldrepl.b[ ]+\$xr0,[ ]+\$ra,[ ]+1 -+[ ]+200:[ ]+3315f420[ ]+xvstelm.d[ ]+\$xr0,[ ]+\$ra,[ ]+1000,[ ]+0x1 -+[ ]+204:[ ]+33246420[ ]+xvstelm.w[ ]+\$xr0,[ ]+\$ra,[ ]+100,[ ]+0x1 -+[ ]+208:[ ]+33441420[ ]+xvstelm.h[ ]+\$xr0,[ ]+\$ra,[ ]+10,[ ]+0x1 -+[ ]+20c:[ ]+33840420[ ]+xvstelm.b[ ]+\$xr0,[ ]+\$ra,[ ]+1,[ ]+0x1 -+[ ]+210:[ ]+70000820[ ]+vseq.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+214:[ ]+70008820[ ]+vseq.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+218:[ ]+70010820[ ]+vseq.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+21c:[ ]+70018820[ ]+vseq.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+220:[ ]+70020820[ ]+vsle.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+224:[ ]+70028820[ ]+vsle.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+228:[ ]+70030820[ ]+vsle.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+22c:[ ]+70038820[ ]+vsle.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+230:[ ]+70040820[ ]+vsle.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+234:[ ]+70048820[ ]+vsle.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+238:[ ]+70050820[ ]+vsle.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+23c:[ ]+70058820[ ]+vsle.du[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+240:[ ]+70060820[ ]+vslt.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+244:[ ]+70068820[ ]+vslt.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+248:[ ]+70070820[ ]+vslt.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+24c:[ ]+70078820[ ]+vslt.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+250:[ ]+70080820[ ]+vslt.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+254:[ ]+70088820[ ]+vslt.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+258:[ ]+70090820[ ]+vslt.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+25c:[ ]+70098820[ ]+vslt.du[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+260:[ ]+700a0820[ ]+vadd.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+264:[ ]+700a8820[ ]+vadd.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+268:[ ]+700b0820[ ]+vadd.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+26c:[ ]+700b8820[ ]+vadd.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+270:[ ]+700c0820[ ]+vsub.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+274:[ ]+700c8820[ ]+vsub.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+278:[ ]+700d0820[ ]+vsub.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+27c:[ ]+700d8820[ ]+vsub.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+280:[ ]+70460820[ ]+vsadd.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+284:[ ]+70468820[ ]+vsadd.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+288:[ ]+70470820[ ]+vsadd.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+28c:[ ]+70478820[ ]+vsadd.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+290:[ ]+70480820[ ]+vssub.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+294:[ ]+70488820[ ]+vssub.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+298:[ ]+70490820[ ]+vssub.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+29c:[ ]+70498820[ ]+vssub.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+2a0:[ ]+704a0820[ ]+vsadd.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+2a4:[ ]+704a8820[ ]+vsadd.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+2a8:[ ]+704b0820[ ]+vsadd.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+2ac:[ ]+704b8820[ ]+vsadd.du[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+2b0:[ ]+704c0820[ ]+vssub.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+2b4:[ ]+704c8820[ ]+vssub.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+2b8:[ ]+704d0820[ ]+vssub.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+2bc:[ ]+704d8820[ ]+vssub.du[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+2c0:[ ]+70540820[ ]+vhaddw.h.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+2c4:[ ]+70548820[ ]+vhaddw.w.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+2c8:[ ]+70550820[ ]+vhaddw.d.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+2cc:[ ]+70558820[ ]+vhaddw.q.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+2d0:[ ]+70560820[ ]+vhsubw.h.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+2d4:[ ]+70568820[ ]+vhsubw.w.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+2d8:[ ]+70570820[ ]+vhsubw.d.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+2dc:[ ]+70578820[ ]+vhsubw.q.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+2e0:[ ]+70580820[ ]+vhaddw.hu.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+2e4:[ ]+70588820[ ]+vhaddw.wu.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+2e8:[ ]+70590820[ ]+vhaddw.du.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+2ec:[ ]+70598820[ ]+vhaddw.qu.du[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+2f0:[ ]+705a0820[ ]+vhsubw.hu.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+2f4:[ ]+705a8820[ ]+vhsubw.wu.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+2f8:[ ]+705b0820[ ]+vhsubw.du.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+2fc:[ ]+705b8820[ ]+vhsubw.qu.du[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+300:[ ]+705c0820[ ]+vadda.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+304:[ ]+705c8820[ ]+vadda.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+308:[ ]+705d0820[ ]+vadda.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+30c:[ ]+705d8820[ ]+vadda.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+310:[ ]+70600820[ ]+vabsd.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+314:[ ]+70608820[ ]+vabsd.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+318:[ ]+70610820[ ]+vabsd.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+31c:[ ]+70618820[ ]+vabsd.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+320:[ ]+70620820[ ]+vabsd.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+324:[ ]+70628820[ ]+vabsd.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+328:[ ]+70630820[ ]+vabsd.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+32c:[ ]+70638820[ ]+vabsd.du[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+330:[ ]+70640820[ ]+vavg.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+334:[ ]+70648820[ ]+vavg.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+338:[ ]+70650820[ ]+vavg.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+33c:[ ]+70658820[ ]+vavg.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+340:[ ]+70660820[ ]+vavg.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+344:[ ]+70668820[ ]+vavg.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+348:[ ]+70670820[ ]+vavg.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+34c:[ ]+70678820[ ]+vavg.du[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+350:[ ]+70680820[ ]+vavgr.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+354:[ ]+70688820[ ]+vavgr.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+358:[ ]+70690820[ ]+vavgr.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+35c:[ ]+70698820[ ]+vavgr.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+360:[ ]+706a0820[ ]+vavgr.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+364:[ ]+706a8820[ ]+vavgr.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+368:[ ]+706b0820[ ]+vavgr.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+36c:[ ]+706b8820[ ]+vavgr.du[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+370:[ ]+70700820[ ]+vmax.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+374:[ ]+70708820[ ]+vmax.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+378:[ ]+70710820[ ]+vmax.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+37c:[ ]+70718820[ ]+vmax.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+380:[ ]+70720820[ ]+vmin.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+384:[ ]+70728820[ ]+vmin.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+388:[ ]+70730820[ ]+vmin.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+38c:[ ]+70738820[ ]+vmin.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+390:[ ]+70740820[ ]+vmax.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+394:[ ]+70748820[ ]+vmax.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+398:[ ]+70750820[ ]+vmax.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+39c:[ ]+70758820[ ]+vmax.du[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+3a0:[ ]+70760820[ ]+vmin.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+3a4:[ ]+70768820[ ]+vmin.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+3a8:[ ]+70770820[ ]+vmin.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+3ac:[ ]+70778820[ ]+vmin.du[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+3b0:[ ]+70840820[ ]+vmul.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+3b4:[ ]+70848820[ ]+vmul.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+3b8:[ ]+70850820[ ]+vmul.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+3bc:[ ]+70858820[ ]+vmul.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+3c0:[ ]+70860820[ ]+vmuh.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+3c4:[ ]+70868820[ ]+vmuh.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+3c8:[ ]+70870820[ ]+vmuh.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+3cc:[ ]+70878820[ ]+vmuh.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+3d0:[ ]+70880820[ ]+vmuh.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+3d4:[ ]+70888820[ ]+vmuh.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+3d8:[ ]+70890820[ ]+vmuh.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+3dc:[ ]+70898820[ ]+vmuh.du[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+3e0:[ ]+70a80820[ ]+vmadd.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+3e4:[ ]+70a88820[ ]+vmadd.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+3e8:[ ]+70a90820[ ]+vmadd.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+3ec:[ ]+70a98820[ ]+vmadd.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+3f0:[ ]+70aa0820[ ]+vmsub.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+3f4:[ ]+70aa8820[ ]+vmsub.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+3f8:[ ]+70ab0820[ ]+vmsub.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+3fc:[ ]+70ab8820[ ]+vmsub.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+400:[ ]+70e00820[ ]+vdiv.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+404:[ ]+70e08820[ ]+vdiv.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+408:[ ]+70e10820[ ]+vdiv.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+40c:[ ]+70e18820[ ]+vdiv.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+410:[ ]+70e20820[ ]+vmod.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+414:[ ]+70e28820[ ]+vmod.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+418:[ ]+70e30820[ ]+vmod.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+41c:[ ]+70e38820[ ]+vmod.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+420:[ ]+70e40820[ ]+vdiv.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+424:[ ]+70e48820[ ]+vdiv.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+428:[ ]+70e50820[ ]+vdiv.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+42c:[ ]+70e58820[ ]+vdiv.du[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+430:[ ]+70e60820[ ]+vmod.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+434:[ ]+70e68820[ ]+vmod.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+438:[ ]+70e70820[ ]+vmod.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+43c:[ ]+70e78820[ ]+vmod.du[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+440:[ ]+70e80820[ ]+vsll.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+444:[ ]+70e88820[ ]+vsll.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+448:[ ]+70e90820[ ]+vsll.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+44c:[ ]+70e98820[ ]+vsll.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+450:[ ]+70ea0820[ ]+vsrl.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+454:[ ]+70ea8820[ ]+vsrl.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+458:[ ]+70eb0820[ ]+vsrl.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+45c:[ ]+70eb8820[ ]+vsrl.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+460:[ ]+70ec0820[ ]+vsra.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+464:[ ]+70ec8820[ ]+vsra.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+468:[ ]+70ed0820[ ]+vsra.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+46c:[ ]+70ed8820[ ]+vsra.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+470:[ ]+70ee0820[ ]+vrotr.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+474:[ ]+70ee8820[ ]+vrotr.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+478:[ ]+70ef0820[ ]+vrotr.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+47c:[ ]+70ef8820[ ]+vrotr.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+480:[ ]+70f00820[ ]+vsrlr.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+484:[ ]+70f08820[ ]+vsrlr.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+488:[ ]+70f10820[ ]+vsrlr.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+48c:[ ]+70f18820[ ]+vsrlr.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+490:[ ]+70f20820[ ]+vsrar.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+494:[ ]+70f28820[ ]+vsrar.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+498:[ ]+70f30820[ ]+vsrar.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+49c:[ ]+70f38820[ ]+vsrar.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+4a0:[ ]+70f48820[ ]+vsrln.b.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+4a4:[ ]+70f50820[ ]+vsrln.h.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+4a8:[ ]+70f58820[ ]+vsrln.w.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+4ac:[ ]+70f68820[ ]+vsran.b.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+4b0:[ ]+70f70820[ ]+vsran.h.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+4b4:[ ]+70f78820[ ]+vsran.w.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+4b8:[ ]+70f88820[ ]+vsrlrn.b.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+4bc:[ ]+70f90820[ ]+vsrlrn.h.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+4c0:[ ]+70f98820[ ]+vsrlrn.w.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+4c4:[ ]+70fa8820[ ]+vsrarn.b.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+4c8:[ ]+70fb0820[ ]+vsrarn.h.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+4cc:[ ]+70fb8820[ ]+vsrarn.w.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+4d0:[ ]+70fc8820[ ]+vssrln.b.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+4d4:[ ]+70fd0820[ ]+vssrln.h.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+4d8:[ ]+70fd8820[ ]+vssrln.w.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+4dc:[ ]+70fe8820[ ]+vssran.b.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+4e0:[ ]+70ff0820[ ]+vssran.h.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+4e4:[ ]+70ff8820[ ]+vssran.w.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+4e8:[ ]+71008820[ ]+vssrlrn.b.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+4ec:[ ]+71010820[ ]+vssrlrn.h.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+4f0:[ ]+71018820[ ]+vssrlrn.w.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+4f4:[ ]+71028820[ ]+vssrarn.b.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+4f8:[ ]+71030820[ ]+vssrarn.h.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+4fc:[ ]+71038820[ ]+vssrarn.w.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+500:[ ]+71048820[ ]+vssrln.bu.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+504:[ ]+71050820[ ]+vssrln.hu.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+508:[ ]+71058820[ ]+vssrln.wu.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+50c:[ ]+71068820[ ]+vssran.bu.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+510:[ ]+71070820[ ]+vssran.hu.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+514:[ ]+71078820[ ]+vssran.wu.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+518:[ ]+71088820[ ]+vssrlrn.bu.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+51c:[ ]+71090820[ ]+vssrlrn.hu.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+520:[ ]+71098820[ ]+vssrlrn.wu.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+524:[ ]+710a8820[ ]+vssrarn.bu.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+528:[ ]+710b0820[ ]+vssrarn.hu.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+52c:[ ]+710b8820[ ]+vssrarn.wu.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+530:[ ]+710c0820[ ]+vbitclr.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+534:[ ]+710c8820[ ]+vbitclr.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+538:[ ]+710d0820[ ]+vbitclr.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+53c:[ ]+710d8820[ ]+vbitclr.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+540:[ ]+710e0820[ ]+vbitset.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+544:[ ]+710e8820[ ]+vbitset.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+548:[ ]+710f0820[ ]+vbitset.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+54c:[ ]+710f8820[ ]+vbitset.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+550:[ ]+71100820[ ]+vbitrev.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+554:[ ]+71108820[ ]+vbitrev.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+558:[ ]+71110820[ ]+vbitrev.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+55c:[ ]+71118820[ ]+vbitrev.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+560:[ ]+71160820[ ]+vpackev.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+564:[ ]+71168820[ ]+vpackev.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+568:[ ]+71170820[ ]+vpackev.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+56c:[ ]+71178820[ ]+vpackev.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+570:[ ]+71180820[ ]+vpackod.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+574:[ ]+71188820[ ]+vpackod.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+578:[ ]+71190820[ ]+vpackod.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+57c:[ ]+71198820[ ]+vpackod.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+580:[ ]+711a0820[ ]+vilvl.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+584:[ ]+711a8820[ ]+vilvl.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+588:[ ]+711b0820[ ]+vilvl.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+58c:[ ]+711b8820[ ]+vilvl.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+590:[ ]+711c0820[ ]+vilvh.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+594:[ ]+711c8820[ ]+vilvh.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+598:[ ]+711d0820[ ]+vilvh.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+59c:[ ]+711d8820[ ]+vilvh.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+5a0:[ ]+711e0820[ ]+vpickev.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+5a4:[ ]+711e8820[ ]+vpickev.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+5a8:[ ]+711f0820[ ]+vpickev.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+5ac:[ ]+711f8820[ ]+vpickev.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+5b0:[ ]+71200820[ ]+vpickod.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+5b4:[ ]+71208820[ ]+vpickod.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+5b8:[ ]+71210820[ ]+vpickod.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+5bc:[ ]+71218820[ ]+vpickod.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+5c0:[ ]+71220820[ ]+vreplve.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$tp -+[ ]+5c4:[ ]+71228820[ ]+vreplve.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$tp -+[ ]+5c8:[ ]+71230820[ ]+vreplve.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$tp -+[ ]+5cc:[ ]+71238820[ ]+vreplve.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$tp -+[ ]+5d0:[ ]+71260820[ ]+vand.v[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+5d4:[ ]+71268820[ ]+vor.v[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+5d8:[ ]+71270820[ ]+vxor.v[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+5dc:[ ]+71278820[ ]+vnor.v[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+5e0:[ ]+71280820[ ]+vandn.v[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+5e4:[ ]+71288820[ ]+vorn.v[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+5e8:[ ]+712b0820[ ]+vfrstp.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+5ec:[ ]+712b8820[ ]+vfrstp.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+5f0:[ ]+712d0820[ ]+vadd.q[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+5f4:[ ]+712d8820[ ]+vsub.q[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+5f8:[ ]+712e0820[ ]+vsigncov.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+5fc:[ ]+712e8820[ ]+vsigncov.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+600:[ ]+712f0820[ ]+vsigncov.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+604:[ ]+712f8820[ ]+vsigncov.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+608:[ ]+71308820[ ]+vfadd.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+60c:[ ]+71310820[ ]+vfadd.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+610:[ ]+71328820[ ]+vfsub.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+614:[ ]+71330820[ ]+vfsub.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+618:[ ]+71388820[ ]+vfmul.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+61c:[ ]+71390820[ ]+vfmul.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+620:[ ]+713a8820[ ]+vfdiv.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+624:[ ]+713b0820[ ]+vfdiv.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+628:[ ]+713c8820[ ]+vfmax.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+62c:[ ]+713d0820[ ]+vfmax.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+630:[ ]+713e8820[ ]+vfmin.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+634:[ ]+713f0820[ ]+vfmin.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+638:[ ]+71408820[ ]+vfmaxa.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+63c:[ ]+71410820[ ]+vfmaxa.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+640:[ ]+71428820[ ]+vfmina.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+644:[ ]+71430820[ ]+vfmina.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+648:[ ]+71460820[ ]+vfcvt.h.s[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+64c:[ ]+71468820[ ]+vfcvt.s.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+650:[ ]+71480820[ ]+vffint.s.l[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+654:[ ]+71498820[ ]+vftint.w.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+658:[ ]+714a0820[ ]+vftintrm.w.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+65c:[ ]+714a8820[ ]+vftintrp.w.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+660:[ ]+714b0820[ ]+vftintrz.w.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+664:[ ]+714b8820[ ]+vftintrne.w.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+668:[ ]+717a8820[ ]+vshuf.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+66c:[ ]+717b0820[ ]+vshuf.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+670:[ ]+717b8820[ ]+vshuf.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+674:[ ]+72800420[ ]+vseqi.b[ ]+\$vr0,[ ]+\$vr1,[ ]+1 -+[ ]+678:[ ]+72808420[ ]+vseqi.h[ ]+\$vr0,[ ]+\$vr1,[ ]+1 -+[ ]+67c:[ ]+72810420[ ]+vseqi.w[ ]+\$vr0,[ ]+\$vr1,[ ]+1 -+[ ]+680:[ ]+72818420[ ]+vseqi.d[ ]+\$vr0,[ ]+\$vr1,[ ]+1 -+[ ]+684:[ ]+72820420[ ]+vslei.b[ ]+\$vr0,[ ]+\$vr1,[ ]+1 -+[ ]+688:[ ]+72828420[ ]+vslei.h[ ]+\$vr0,[ ]+\$vr1,[ ]+1 -+[ ]+68c:[ ]+72830420[ ]+vslei.w[ ]+\$vr0,[ ]+\$vr1,[ ]+1 -+[ ]+690:[ ]+72838420[ ]+vslei.d[ ]+\$vr0,[ ]+\$vr1,[ ]+1 -+[ ]+694:[ ]+72840420[ ]+vslei.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+698:[ ]+72848420[ ]+vslei.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+69c:[ ]+72850420[ ]+vslei.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+6a0:[ ]+72858420[ ]+vslei.du[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+6a4:[ ]+72860420[ ]+vslti.b[ ]+\$vr0,[ ]+\$vr1,[ ]+1 -+[ ]+6a8:[ ]+72868420[ ]+vslti.h[ ]+\$vr0,[ ]+\$vr1,[ ]+1 -+[ ]+6ac:[ ]+72870420[ ]+vslti.w[ ]+\$vr0,[ ]+\$vr1,[ ]+1 -+[ ]+6b0:[ ]+72878420[ ]+vslti.d[ ]+\$vr0,[ ]+\$vr1,[ ]+1 -+[ ]+6b4:[ ]+72880420[ ]+vslti.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+6b8:[ ]+72888420[ ]+vslti.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+6bc:[ ]+72890420[ ]+vslti.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+6c0:[ ]+72898420[ ]+vslti.du[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+6c4:[ ]+728a0420[ ]+vaddi.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+6c8:[ ]+728a8420[ ]+vaddi.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+6cc:[ ]+728b0420[ ]+vaddi.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+6d0:[ ]+728b8420[ ]+vaddi.du[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+6d4:[ ]+728c0420[ ]+vsubi.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+6d8:[ ]+728c8420[ ]+vsubi.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+6dc:[ ]+728d0420[ ]+vsubi.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+6e0:[ ]+728d8420[ ]+vsubi.du[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+6e4:[ ]+728e0420[ ]+vbsll.v[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+6e8:[ ]+728e8420[ ]+vbsrl.v[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+6ec:[ ]+72900420[ ]+vmaxi.b[ ]+\$vr0,[ ]+\$vr1,[ ]+1 -+[ ]+6f0:[ ]+72908420[ ]+vmaxi.h[ ]+\$vr0,[ ]+\$vr1,[ ]+1 -+[ ]+6f4:[ ]+72910420[ ]+vmaxi.w[ ]+\$vr0,[ ]+\$vr1,[ ]+1 -+[ ]+6f8:[ ]+72918420[ ]+vmaxi.d[ ]+\$vr0,[ ]+\$vr1,[ ]+1 -+[ ]+6fc:[ ]+72920420[ ]+vmini.b[ ]+\$vr0,[ ]+\$vr1,[ ]+1 -+[ ]+700:[ ]+72928420[ ]+vmini.h[ ]+\$vr0,[ ]+\$vr1,[ ]+1 -+[ ]+704:[ ]+72930420[ ]+vmini.w[ ]+\$vr0,[ ]+\$vr1,[ ]+1 -+[ ]+708:[ ]+72938420[ ]+vmini.d[ ]+\$vr0,[ ]+\$vr1,[ ]+1 -+[ ]+70c:[ ]+72940420[ ]+vmaxi.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+710:[ ]+72948420[ ]+vmaxi.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+714:[ ]+72950420[ ]+vmaxi.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+718:[ ]+72958420[ ]+vmaxi.du[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+71c:[ ]+72960420[ ]+vmini.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+720:[ ]+72968420[ ]+vmini.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+724:[ ]+72970420[ ]+vmini.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+728:[ ]+72978420[ ]+vmini.du[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+72c:[ ]+729a0420[ ]+vfrstpi.b[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+730:[ ]+729a8420[ ]+vfrstpi.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+734:[ ]+729c0020[ ]+vclo.b[ ]+\$vr0,[ ]+\$vr1 -+[ ]+738:[ ]+729c0420[ ]+vclo.h[ ]+\$vr0,[ ]+\$vr1 -+[ ]+73c:[ ]+729c0820[ ]+vclo.w[ ]+\$vr0,[ ]+\$vr1 -+[ ]+740:[ ]+729c0c20[ ]+vclo.d[ ]+\$vr0,[ ]+\$vr1 -+[ ]+744:[ ]+729c1020[ ]+vclz.b[ ]+\$vr0,[ ]+\$vr1 -+[ ]+748:[ ]+729c1420[ ]+vclz.h[ ]+\$vr0,[ ]+\$vr1 -+[ ]+74c:[ ]+729c1820[ ]+vclz.w[ ]+\$vr0,[ ]+\$vr1 -+[ ]+750:[ ]+729c1c20[ ]+vclz.d[ ]+\$vr0,[ ]+\$vr1 -+[ ]+754:[ ]+729c2020[ ]+vpcnt.b[ ]+\$vr0,[ ]+\$vr1 -+[ ]+758:[ ]+729c2420[ ]+vpcnt.h[ ]+\$vr0,[ ]+\$vr1 -+[ ]+75c:[ ]+729c2820[ ]+vpcnt.w[ ]+\$vr0,[ ]+\$vr1 -+[ ]+760:[ ]+729c2c20[ ]+vpcnt.d[ ]+\$vr0,[ ]+\$vr1 -+[ ]+764:[ ]+729c3020[ ]+vneg.b[ ]+\$vr0,[ ]+\$vr1 -+[ ]+768:[ ]+729c3420[ ]+vneg.h[ ]+\$vr0,[ ]+\$vr1 -+[ ]+76c:[ ]+729c3820[ ]+vneg.w[ ]+\$vr0,[ ]+\$vr1 -+[ ]+770:[ ]+729c3c20[ ]+vneg.d[ ]+\$vr0,[ ]+\$vr1 -+[ ]+774:[ ]+729c4020[ ]+vmskltz.b[ ]+\$vr0,[ ]+\$vr1 -+[ ]+778:[ ]+729c4420[ ]+vmskltz.h[ ]+\$vr0,[ ]+\$vr1 -+[ ]+77c:[ ]+729c4820[ ]+vmskltz.w[ ]+\$vr0,[ ]+\$vr1 -+[ ]+780:[ ]+729c4c20[ ]+vmskltz.d[ ]+\$vr0,[ ]+\$vr1 -+[ ]+784:[ ]+729c5020[ ]+vmskgez.b[ ]+\$vr0,[ ]+\$vr1 -+[ ]+788:[ ]+729c6020[ ]+vmsknz.b[ ]+\$vr0,[ ]+\$vr1 -+[ ]+78c:[ ]+729c9820[ ]+vseteqz.v[ ]+\$fcc0,[ ]+\$vr1 -+[ ]+790:[ ]+729c9c20[ ]+vsetnez.v[ ]+\$fcc0,[ ]+\$vr1 -+[ ]+794:[ ]+729ca020[ ]+vsetanyeqz.b[ ]+\$fcc0,[ ]+\$vr1 -+[ ]+798:[ ]+729ca420[ ]+vsetanyeqz.h[ ]+\$fcc0,[ ]+\$vr1 -+[ ]+79c:[ ]+729ca820[ ]+vsetanyeqz.w[ ]+\$fcc0,[ ]+\$vr1 -+[ ]+7a0:[ ]+729cac20[ ]+vsetanyeqz.d[ ]+\$fcc0,[ ]+\$vr1 -+[ ]+7a4:[ ]+729cb020[ ]+vsetallnez.b[ ]+\$fcc0,[ ]+\$vr1 -+[ ]+7a8:[ ]+729cb420[ ]+vsetallnez.h[ ]+\$fcc0,[ ]+\$vr1 -+[ ]+7ac:[ ]+729cb820[ ]+vsetallnez.w[ ]+\$fcc0,[ ]+\$vr1 -+[ ]+7b0:[ ]+729cbc20[ ]+vsetallnez.d[ ]+\$fcc0,[ ]+\$vr1 -+[ ]+7b4:[ ]+729cc420[ ]+vflogb.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+7b8:[ ]+729cc820[ ]+vflogb.d[ ]+\$vr0,[ ]+\$vr1 -+[ ]+7bc:[ ]+729cd420[ ]+vfclass.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+7c0:[ ]+729cd820[ ]+vfclass.d[ ]+\$vr0,[ ]+\$vr1 -+[ ]+7c4:[ ]+729ce420[ ]+vfsqrt.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+7c8:[ ]+729ce820[ ]+vfsqrt.d[ ]+\$vr0,[ ]+\$vr1 -+[ ]+7cc:[ ]+729cf420[ ]+vfrecip.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+7d0:[ ]+729cf820[ ]+vfrecip.d[ ]+\$vr0,[ ]+\$vr1 -+[ ]+7d4:[ ]+729d0420[ ]+vfrsqrt.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+7d8:[ ]+729d0820[ ]+vfrsqrt.d[ ]+\$vr0,[ ]+\$vr1 -+[ ]+7dc:[ ]+729d3420[ ]+vfrint.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+7e0:[ ]+729d3820[ ]+vfrint.d[ ]+\$vr0,[ ]+\$vr1 -+[ ]+7e4:[ ]+729d4420[ ]+vfrintrm.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+7e8:[ ]+729d4820[ ]+vfrintrm.d[ ]+\$vr0,[ ]+\$vr1 -+[ ]+7ec:[ ]+729d5420[ ]+vfrintrp.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+7f0:[ ]+729d5820[ ]+vfrintrp.d[ ]+\$vr0,[ ]+\$vr1 -+[ ]+7f4:[ ]+729d6420[ ]+vfrintrz.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+7f8:[ ]+729d6820[ ]+vfrintrz.d[ ]+\$vr0,[ ]+\$vr1 -+[ ]+7fc:[ ]+729d7420[ ]+vfrintrne.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+800:[ ]+729d7820[ ]+vfrintrne.d[ ]+\$vr0,[ ]+\$vr1 -+[ ]+804:[ ]+729de820[ ]+vfcvtl.s.h[ ]+\$vr0,[ ]+\$vr1 -+[ ]+808:[ ]+729dec20[ ]+vfcvth.s.h[ ]+\$vr0,[ ]+\$vr1 -+[ ]+80c:[ ]+729df020[ ]+vfcvtl.d.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+810:[ ]+729df420[ ]+vfcvth.d.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+814:[ ]+729e0020[ ]+vffint.s.w[ ]+\$vr0,[ ]+\$vr1 -+[ ]+818:[ ]+729e0420[ ]+vffint.s.wu[ ]+\$vr0,[ ]+\$vr1 -+[ ]+81c:[ ]+729e0820[ ]+vffint.d.l[ ]+\$vr0,[ ]+\$vr1 -+[ ]+820:[ ]+729e0c20[ ]+vffint.d.lu[ ]+\$vr0,[ ]+\$vr1 -+[ ]+824:[ ]+729e1020[ ]+vffintl.d.w[ ]+\$vr0,[ ]+\$vr1 -+[ ]+828:[ ]+729e1420[ ]+vffinth.d.w[ ]+\$vr0,[ ]+\$vr1 -+[ ]+82c:[ ]+729e3020[ ]+vftint.w.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+830:[ ]+729e3420[ ]+vftint.l.d[ ]+\$vr0,[ ]+\$vr1 -+[ ]+834:[ ]+729e3820[ ]+vftintrm.w.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+838:[ ]+729e3c20[ ]+vftintrm.l.d[ ]+\$vr0,[ ]+\$vr1 -+[ ]+83c:[ ]+729e4020[ ]+vftintrp.w.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+840:[ ]+729e4420[ ]+vftintrp.l.d[ ]+\$vr0,[ ]+\$vr1 -+[ ]+844:[ ]+729e4820[ ]+vftintrz.w.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+848:[ ]+729e4c20[ ]+vftintrz.l.d[ ]+\$vr0,[ ]+\$vr1 -+[ ]+84c:[ ]+729e5020[ ]+vftintrne.w.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+850:[ ]+729e5420[ ]+vftintrne.l.d[ ]+\$vr0,[ ]+\$vr1 -+[ ]+854:[ ]+729e5820[ ]+vftint.wu.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+858:[ ]+729e5c20[ ]+vftint.lu.d[ ]+\$vr0,[ ]+\$vr1 -+[ ]+85c:[ ]+729e7020[ ]+vftintrz.wu.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+860:[ ]+729e7420[ ]+vftintrz.lu.d[ ]+\$vr0,[ ]+\$vr1 -+[ ]+864:[ ]+729e8020[ ]+vftintl.l.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+868:[ ]+729e8420[ ]+vftinth.l.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+86c:[ ]+729e8820[ ]+vftintrml.l.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+870:[ ]+729e8c20[ ]+vftintrmh.l.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+874:[ ]+729e9020[ ]+vftintrpl.l.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+878:[ ]+729e9420[ ]+vftintrph.l.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+87c:[ ]+729e9820[ ]+vftintrzl.l.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+880:[ ]+729e9c20[ ]+vftintrzh.l.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+884:[ ]+729ea020[ ]+vftintrnel.l.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+888:[ ]+729ea420[ ]+vftintrneh.l.s[ ]+\$vr0,[ ]+\$vr1 -+[ ]+88c:[ ]+729ee020[ ]+vexth.h.b[ ]+\$vr0,[ ]+\$vr1 -+[ ]+890:[ ]+729ee420[ ]+vexth.w.h[ ]+\$vr0,[ ]+\$vr1 -+[ ]+894:[ ]+729ee820[ ]+vexth.d.w[ ]+\$vr0,[ ]+\$vr1 -+[ ]+898:[ ]+729eec20[ ]+vexth.q.d[ ]+\$vr0,[ ]+\$vr1 -+[ ]+89c:[ ]+729ef020[ ]+vexth.hu.bu[ ]+\$vr0,[ ]+\$vr1 -+[ ]+8a0:[ ]+729ef420[ ]+vexth.wu.hu[ ]+\$vr0,[ ]+\$vr1 -+[ ]+8a4:[ ]+729ef820[ ]+vexth.du.wu[ ]+\$vr0,[ ]+\$vr1 -+[ ]+8a8:[ ]+729efc20[ ]+vexth.qu.du[ ]+\$vr0,[ ]+\$vr1 -+[ ]+8ac:[ ]+729f0020[ ]+vreplgr2vr.b[ ]+\$vr0,[ ]+\$ra -+[ ]+8b0:[ ]+729f0420[ ]+vreplgr2vr.h[ ]+\$vr0,[ ]+\$ra -+[ ]+8b4:[ ]+729f0820[ ]+vreplgr2vr.w[ ]+\$vr0,[ ]+\$ra -+[ ]+8b8:[ ]+729f0c20[ ]+vreplgr2vr.d[ ]+\$vr0,[ ]+\$ra -+[ ]+8bc:[ ]+72a02420[ ]+vrotri.b[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+8c0:[ ]+72a04420[ ]+vrotri.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+8c4:[ ]+72a08420[ ]+vrotri.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+8c8:[ ]+72a10420[ ]+vrotri.d[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+8cc:[ ]+72a42420[ ]+vsrlri.b[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+8d0:[ ]+72a44420[ ]+vsrlri.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+8d4:[ ]+72a48420[ ]+vsrlri.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+8d8:[ ]+72a50420[ ]+vsrlri.d[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+8dc:[ ]+72a82420[ ]+vsrari.b[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+8e0:[ ]+72a84420[ ]+vsrari.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+8e4:[ ]+72a88420[ ]+vsrari.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+8e8:[ ]+72a90420[ ]+vsrari.d[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+8ec:[ ]+72eb8420[ ]+vinsgr2vr.b[ ]+\$vr0,[ ]+\$ra,[ ]+0x1 -+[ ]+8f0:[ ]+72ebc420[ ]+vinsgr2vr.h[ ]+\$vr0,[ ]+\$ra,[ ]+0x1 -+[ ]+8f4:[ ]+72ebe420[ ]+vinsgr2vr.w[ ]+\$vr0,[ ]+\$ra,[ ]+0x1 -+[ ]+8f8:[ ]+72ebf420[ ]+vinsgr2vr.d[ ]+\$vr0,[ ]+\$ra,[ ]+0x1 -+[ ]+8fc:[ ]+72ef8420[ ]+vpickve2gr.b[ ]+\$zero,[ ]+\$vr1,[ ]+0x1 -+[ ]+900:[ ]+72efc420[ ]+vpickve2gr.h[ ]+\$zero,[ ]+\$vr1,[ ]+0x1 -+[ ]+904:[ ]+72efe420[ ]+vpickve2gr.w[ ]+\$zero,[ ]+\$vr1,[ ]+0x1 -+[ ]+908:[ ]+72eff420[ ]+vpickve2gr.d[ ]+\$zero,[ ]+\$vr1,[ ]+0x1 -+[ ]+90c:[ ]+72f38420[ ]+vpickve2gr.bu[ ]+\$zero,[ ]+\$vr1,[ ]+0x1 -+[ ]+910:[ ]+72f3c420[ ]+vpickve2gr.hu[ ]+\$zero,[ ]+\$vr1,[ ]+0x1 -+[ ]+914:[ ]+72f3e420[ ]+vpickve2gr.wu[ ]+\$zero,[ ]+\$vr1,[ ]+0x1 -+[ ]+918:[ ]+72f3f420[ ]+vpickve2gr.du[ ]+\$zero,[ ]+\$vr1,[ ]+0x1 -+[ ]+91c:[ ]+72f78420[ ]+vreplvei.b[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+920:[ ]+72f7c420[ ]+vreplvei.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+924:[ ]+72f7e420[ ]+vreplvei.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+928:[ ]+72f7f420[ ]+vreplvei.d[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+92c:[ ]+73082420[ ]+vsllwil.h.b[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+930:[ ]+73084420[ ]+vsllwil.w.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+934:[ ]+73088420[ ]+vsllwil.d.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+938:[ ]+73090020[ ]+vextl.q.d[ ]+\$vr0,[ ]+\$vr1 -+[ ]+93c:[ ]+730c2420[ ]+vsllwil.hu.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+940:[ ]+730c4420[ ]+vsllwil.wu.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+944:[ ]+730c8420[ ]+vsllwil.du.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+948:[ ]+730d0020[ ]+vextl.qu.du[ ]+\$vr0,[ ]+\$vr1 -+[ ]+94c:[ ]+73102420[ ]+vbitclri.b[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+950:[ ]+73104420[ ]+vbitclri.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+954:[ ]+73108420[ ]+vbitclri.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+958:[ ]+73110420[ ]+vbitclri.d[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+95c:[ ]+73142420[ ]+vbitseti.b[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+960:[ ]+73144420[ ]+vbitseti.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+964:[ ]+73148420[ ]+vbitseti.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+968:[ ]+73150420[ ]+vbitseti.d[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+96c:[ ]+73182420[ ]+vbitrevi.b[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+970:[ ]+73184420[ ]+vbitrevi.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+974:[ ]+73188420[ ]+vbitrevi.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+978:[ ]+73190420[ ]+vbitrevi.d[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+97c:[ ]+73242420[ ]+vsat.b[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+980:[ ]+73244420[ ]+vsat.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+984:[ ]+73248420[ ]+vsat.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+988:[ ]+73250420[ ]+vsat.d[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+98c:[ ]+73282420[ ]+vsat.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+990:[ ]+73284420[ ]+vsat.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+994:[ ]+73288420[ ]+vsat.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+998:[ ]+73290420[ ]+vsat.du[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+99c:[ ]+732c2420[ ]+vslli.b[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+9a0:[ ]+732c4420[ ]+vslli.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+9a4:[ ]+732c8420[ ]+vslli.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+9a8:[ ]+732d0420[ ]+vslli.d[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+9ac:[ ]+73302420[ ]+vsrli.b[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+9b0:[ ]+73304420[ ]+vsrli.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+9b4:[ ]+73308420[ ]+vsrli.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+9b8:[ ]+73310420[ ]+vsrli.d[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+9bc:[ ]+73342420[ ]+vsrai.b[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+9c0:[ ]+73344420[ ]+vsrai.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+9c4:[ ]+73348420[ ]+vsrai.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+9c8:[ ]+73350420[ ]+vsrai.d[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+9cc:[ ]+73404420[ ]+vsrlni.b.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+9d0:[ ]+73408420[ ]+vsrlni.h.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+9d4:[ ]+73410420[ ]+vsrlni.w.d[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+9d8:[ ]+73420420[ ]+vsrlni.d.q[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+9dc:[ ]+73484420[ ]+vssrlni.b.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+9e0:[ ]+73488420[ ]+vssrlni.h.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+9e4:[ ]+73490420[ ]+vssrlni.w.d[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+9e8:[ ]+734a0420[ ]+vssrlni.d.q[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+9ec:[ ]+73444420[ ]+vsrlrni.b.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+9f0:[ ]+73448420[ ]+vsrlrni.h.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+9f4:[ ]+73450420[ ]+vsrlrni.w.d[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+9f8:[ ]+73460420[ ]+vsrlrni.d.q[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+9fc:[ ]+734c4420[ ]+vssrlni.bu.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a00:[ ]+734c8420[ ]+vssrlni.hu.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a04:[ ]+734d0420[ ]+vssrlni.wu.d[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a08:[ ]+734e0420[ ]+vssrlni.du.q[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a0c:[ ]+73504420[ ]+vssrlrni.b.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a10:[ ]+73508420[ ]+vssrlrni.h.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a14:[ ]+73510420[ ]+vssrlrni.w.d[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a18:[ ]+73520420[ ]+vssrlrni.d.q[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a1c:[ ]+73544420[ ]+vssrlrni.bu.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a20:[ ]+73548420[ ]+vssrlrni.hu.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a24:[ ]+73550420[ ]+vssrlrni.wu.d[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a28:[ ]+73560420[ ]+vssrlrni.du.q[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a2c:[ ]+73584420[ ]+vsrani.b.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a30:[ ]+73588420[ ]+vsrani.h.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a34:[ ]+73590420[ ]+vsrani.w.d[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a38:[ ]+735a0420[ ]+vsrani.d.q[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a3c:[ ]+735c4420[ ]+vsrarni.b.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a40:[ ]+735c8420[ ]+vsrarni.h.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a44:[ ]+735d0420[ ]+vsrarni.w.d[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a48:[ ]+735e0420[ ]+vsrarni.d.q[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a4c:[ ]+73604420[ ]+vssrani.b.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a50:[ ]+73608420[ ]+vssrani.h.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a54:[ ]+73610420[ ]+vssrani.w.d[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a58:[ ]+73620420[ ]+vssrani.d.q[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a5c:[ ]+73644420[ ]+vssrani.bu.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a60:[ ]+73648420[ ]+vssrani.hu.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a64:[ ]+73650420[ ]+vssrani.wu.d[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a68:[ ]+73660420[ ]+vssrani.du.q[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a6c:[ ]+73684420[ ]+vssrarni.b.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a70:[ ]+73688420[ ]+vssrarni.h.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a74:[ ]+73690420[ ]+vssrarni.w.d[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a78:[ ]+736a0420[ ]+vssrarni.d.q[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a7c:[ ]+736c4420[ ]+vssrarni.bu.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a80:[ ]+736c8420[ ]+vssrarni.hu.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a84:[ ]+736d0420[ ]+vssrarni.wu.d[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a88:[ ]+736e0420[ ]+vssrarni.du.q[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a8c:[ ]+73800420[ ]+vextrins.d[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a90:[ ]+73840420[ ]+vextrins.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a94:[ ]+73880420[ ]+vextrins.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a98:[ ]+738c0420[ ]+vextrins.b[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+a9c:[ ]+73900420[ ]+vshuf4i.b[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+aa0:[ ]+73940420[ ]+vshuf4i.h[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+aa4:[ ]+73980420[ ]+vshuf4i.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+aa8:[ ]+739c0420[ ]+vshuf4i.d[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+aac:[ ]+73c40420[ ]+vbitseli.b[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+ab0:[ ]+73d00420[ ]+vandi.b[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+ab4:[ ]+73d40420[ ]+vori.b[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+ab8:[ ]+73d80420[ ]+vxori.b[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+abc:[ ]+73dc0420[ ]+vnori.b[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+ac0:[ ]+73e00020[ ]+vldi[ ]+\$vr0,[ ]+1 -+[ ]+ac4:[ ]+701e0820[ ]+vaddwev.h.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+ac8:[ ]+701e8820[ ]+vaddwev.w.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+acc:[ ]+701f0820[ ]+vaddwev.d.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+ad0:[ ]+701f8820[ ]+vaddwev.q.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+ad4:[ ]+702e0820[ ]+vaddwev.h.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+ad8:[ ]+702e8820[ ]+vaddwev.w.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+adc:[ ]+702f0820[ ]+vaddwev.d.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+ae0:[ ]+702f8820[ ]+vaddwev.q.du[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+ae4:[ ]+703e0820[ ]+vaddwev.h.bu.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+ae8:[ ]+703e8820[ ]+vaddwev.w.hu.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+aec:[ ]+703f0820[ ]+vaddwev.d.wu.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+af0:[ ]+703f8820[ ]+vaddwev.q.du.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+af4:[ ]+70220820[ ]+vaddwod.h.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+af8:[ ]+70228820[ ]+vaddwod.w.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+afc:[ ]+70230820[ ]+vaddwod.d.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b00:[ ]+70238820[ ]+vaddwod.q.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b04:[ ]+70320820[ ]+vaddwod.h.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b08:[ ]+70328820[ ]+vaddwod.w.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b0c:[ ]+70330820[ ]+vaddwod.d.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b10:[ ]+70338820[ ]+vaddwod.q.du[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b14:[ ]+70400820[ ]+vaddwod.h.bu.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b18:[ ]+70408820[ ]+vaddwod.w.hu.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b1c:[ ]+70410820[ ]+vaddwod.d.wu.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b20:[ ]+70418820[ ]+vaddwod.q.du.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b24:[ ]+70ac0820[ ]+vmaddwev.h.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b28:[ ]+70ac8820[ ]+vmaddwev.w.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b2c:[ ]+70ad0820[ ]+vmaddwev.d.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b30:[ ]+70ad8820[ ]+vmaddwev.q.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b34:[ ]+70b40820[ ]+vmaddwev.h.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b38:[ ]+70b48820[ ]+vmaddwev.w.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b3c:[ ]+70b50820[ ]+vmaddwev.d.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b40:[ ]+70b58820[ ]+vmaddwev.q.du[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b44:[ ]+70bc0820[ ]+vmaddwev.h.bu.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b48:[ ]+70bc8820[ ]+vmaddwev.w.hu.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b4c:[ ]+70bd0820[ ]+vmaddwev.d.wu.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b50:[ ]+70bd8820[ ]+vmaddwev.q.du.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b54:[ ]+70ae0820[ ]+vmaddwod.h.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b58:[ ]+70ae8820[ ]+vmaddwod.w.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b5c:[ ]+70af0820[ ]+vmaddwod.d.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b60:[ ]+70af8820[ ]+vmaddwod.q.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b64:[ ]+70b60820[ ]+vmaddwod.h.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b68:[ ]+70b68820[ ]+vmaddwod.w.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b6c:[ ]+70b70820[ ]+vmaddwod.d.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b70:[ ]+70b78820[ ]+vmaddwod.q.du[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b74:[ ]+70be0820[ ]+vmaddwod.h.bu.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b78:[ ]+70be8820[ ]+vmaddwod.w.hu.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b7c:[ ]+70bf0820[ ]+vmaddwod.d.wu.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b80:[ ]+70bf8820[ ]+vmaddwod.q.du.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b84:[ ]+70900820[ ]+vmulwev.h.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b88:[ ]+70908820[ ]+vmulwev.w.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b8c:[ ]+70910820[ ]+vmulwev.d.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b90:[ ]+70918820[ ]+vmulwev.q.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b94:[ ]+70980820[ ]+vmulwev.h.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b98:[ ]+70988820[ ]+vmulwev.w.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+b9c:[ ]+70990820[ ]+vmulwev.d.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+ba0:[ ]+70998820[ ]+vmulwev.q.du[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+ba4:[ ]+70a00820[ ]+vmulwev.h.bu.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+ba8:[ ]+70a08820[ ]+vmulwev.w.hu.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+bac:[ ]+70a10820[ ]+vmulwev.d.wu.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+bb0:[ ]+70a18820[ ]+vmulwev.q.du.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+bb4:[ ]+70920820[ ]+vmulwod.h.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+bb8:[ ]+70928820[ ]+vmulwod.w.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+bbc:[ ]+70930820[ ]+vmulwod.d.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+bc0:[ ]+70938820[ ]+vmulwod.q.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+bc4:[ ]+709a0820[ ]+vmulwod.h.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+bc8:[ ]+709a8820[ ]+vmulwod.w.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+bcc:[ ]+709b0820[ ]+vmulwod.d.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+bd0:[ ]+709b8820[ ]+vmulwod.q.du[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+bd4:[ ]+70a20820[ ]+vmulwod.h.bu.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+bd8:[ ]+70a28820[ ]+vmulwod.w.hu.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+bdc:[ ]+70a30820[ ]+vmulwod.d.wu.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+be0:[ ]+70a38820[ ]+vmulwod.q.du.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+be4:[ ]+70200820[ ]+vsubwev.h.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+be8:[ ]+70208820[ ]+vsubwev.w.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+bec:[ ]+70210820[ ]+vsubwev.d.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+bf0:[ ]+70218820[ ]+vsubwev.q.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+bf4:[ ]+70300820[ ]+vsubwev.h.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+bf8:[ ]+70308820[ ]+vsubwev.w.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+bfc:[ ]+70310820[ ]+vsubwev.d.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+c00:[ ]+70318820[ ]+vsubwev.q.du[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+c04:[ ]+70240820[ ]+vsubwod.h.b[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+c08:[ ]+70248820[ ]+vsubwod.w.h[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+c0c:[ ]+70250820[ ]+vsubwod.d.w[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+c10:[ ]+70258820[ ]+vsubwod.q.d[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+c14:[ ]+70340820[ ]+vsubwod.h.bu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+c18:[ ]+70348820[ ]+vsubwod.w.hu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+c1c:[ ]+70350820[ ]+vsubwod.d.wu[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+c20:[ ]+70358820[ ]+vsubwod.q.du[ ]+\$vr0,[ ]+\$vr1,[ ]+\$vr2 -+[ ]+c24:[ ]+73e18020[ ]+vldi[ ]+\$vr0,[ ]+3073 -+[ ]+c28:[ ]+73e08020[ ]+vldi[ ]+\$vr0,[ ]+1025 -+[ ]+c2c:[ ]+73e10020[ ]+vldi[ ]+\$vr0,[ ]+2049 -+[ ]+c30:[ ]+73e00020[ ]+vldi[ ]+\$vr0,[ ]+1 -+[ ]+c34:[ ]+73e40420[ ]+vpermi.w[ ]+\$vr0,[ ]+\$vr1,[ ]+0x1 -+[ ]+c38:[ ]+74000820[ ]+xvseq.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c3c:[ ]+74008820[ ]+xvseq.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c40:[ ]+74010820[ ]+xvseq.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c44:[ ]+74018820[ ]+xvseq.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c48:[ ]+74020820[ ]+xvsle.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c4c:[ ]+74028820[ ]+xvsle.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c50:[ ]+74030820[ ]+xvsle.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c54:[ ]+74038820[ ]+xvsle.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c58:[ ]+74040820[ ]+xvsle.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c5c:[ ]+74048820[ ]+xvsle.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c60:[ ]+74050820[ ]+xvsle.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c64:[ ]+74058820[ ]+xvsle.du[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c68:[ ]+74060820[ ]+xvslt.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c6c:[ ]+74068820[ ]+xvslt.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c70:[ ]+74070820[ ]+xvslt.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c74:[ ]+74078820[ ]+xvslt.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c78:[ ]+74080820[ ]+xvslt.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c7c:[ ]+74088820[ ]+xvslt.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c80:[ ]+74090820[ ]+xvslt.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c84:[ ]+74098820[ ]+xvslt.du[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c88:[ ]+740a0820[ ]+xvadd.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c8c:[ ]+740a8820[ ]+xvadd.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c90:[ ]+740b0820[ ]+xvadd.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c94:[ ]+740b8820[ ]+xvadd.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c98:[ ]+740c0820[ ]+xvsub.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+c9c:[ ]+740c8820[ ]+xvsub.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ca0:[ ]+740d0820[ ]+xvsub.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ca4:[ ]+740d8820[ ]+xvsub.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ca8:[ ]+74460820[ ]+xvsadd.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+cac:[ ]+74468820[ ]+xvsadd.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+cb0:[ ]+74470820[ ]+xvsadd.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+cb4:[ ]+74478820[ ]+xvsadd.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+cb8:[ ]+74480820[ ]+xvssub.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+cbc:[ ]+74488820[ ]+xvssub.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+cc0:[ ]+74490820[ ]+xvssub.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+cc4:[ ]+74498820[ ]+xvssub.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+cc8:[ ]+744a0820[ ]+xvsadd.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ccc:[ ]+744a8820[ ]+xvsadd.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+cd0:[ ]+744b0820[ ]+xvsadd.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+cd4:[ ]+744b8820[ ]+xvsadd.du[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+cd8:[ ]+744c0820[ ]+xvssub.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+cdc:[ ]+744c8820[ ]+xvssub.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ce0:[ ]+744d0820[ ]+xvssub.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ce4:[ ]+744d8820[ ]+xvssub.du[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ce8:[ ]+74540820[ ]+xvhaddw.h.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+cec:[ ]+74548820[ ]+xvhaddw.w.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+cf0:[ ]+74550820[ ]+xvhaddw.d.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+cf4:[ ]+74558820[ ]+xvhaddw.q.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+cf8:[ ]+74560820[ ]+xvhsubw.h.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+cfc:[ ]+74568820[ ]+xvhsubw.w.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d00:[ ]+74570820[ ]+xvhsubw.d.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d04:[ ]+74578820[ ]+xvhsubw.q.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d08:[ ]+74580820[ ]+xvhaddw.hu.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d0c:[ ]+74588820[ ]+xvhaddw.wu.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d10:[ ]+74590820[ ]+xvhaddw.du.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d14:[ ]+74598820[ ]+xvhaddw.qu.du[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d18:[ ]+745a0820[ ]+xvhsubw.hu.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d1c:[ ]+745a8820[ ]+xvhsubw.wu.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d20:[ ]+745b0820[ ]+xvhsubw.du.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d24:[ ]+745b8820[ ]+xvhsubw.qu.du[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d28:[ ]+741e0820[ ]+xvaddwev.h.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d2c:[ ]+741e8820[ ]+xvaddwev.w.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d30:[ ]+741f0820[ ]+xvaddwev.d.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d34:[ ]+741f8820[ ]+xvaddwev.q.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d38:[ ]+742e0820[ ]+xvaddwev.h.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d3c:[ ]+742e8820[ ]+xvaddwev.w.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d40:[ ]+742f0820[ ]+xvaddwev.d.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d44:[ ]+742f8820[ ]+xvaddwev.q.du[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d48:[ ]+743e0820[ ]+xvaddwev.h.bu.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d4c:[ ]+743e8820[ ]+xvaddwev.w.hu.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d50:[ ]+743f0820[ ]+xvaddwev.d.wu.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d54:[ ]+743f8820[ ]+xvaddwev.q.du.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d58:[ ]+74220820[ ]+xvaddwod.h.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d5c:[ ]+74228820[ ]+xvaddwod.w.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d60:[ ]+74230820[ ]+xvaddwod.d.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d64:[ ]+74238820[ ]+xvaddwod.q.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d68:[ ]+74320820[ ]+xvaddwod.h.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d6c:[ ]+74328820[ ]+xvaddwod.w.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d70:[ ]+74330820[ ]+xvaddwod.d.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d74:[ ]+74338820[ ]+xvaddwod.q.du[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d78:[ ]+74400820[ ]+xvaddwod.h.bu.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d7c:[ ]+74408820[ ]+xvaddwod.w.hu.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d80:[ ]+74410820[ ]+xvaddwod.d.wu.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d84:[ ]+74418820[ ]+xvaddwod.q.du.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d88:[ ]+74ac0820[ ]+xvmaddwev.h.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d8c:[ ]+74ac8820[ ]+xvmaddwev.w.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d90:[ ]+74ad0820[ ]+xvmaddwev.d.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d94:[ ]+74ad8820[ ]+xvmaddwev.q.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d98:[ ]+74bc0820[ ]+xvmaddwev.h.bu.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+d9c:[ ]+74bc8820[ ]+xvmaddwev.w.hu.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+da0:[ ]+74bd0820[ ]+xvmaddwev.d.wu.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+da4:[ ]+74bd8820[ ]+xvmaddwev.q.du.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+da8:[ ]+74b40820[ ]+xvmaddwev.h.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+dac:[ ]+74b48820[ ]+xvmaddwev.w.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+db0:[ ]+74b50820[ ]+xvmaddwev.d.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+db4:[ ]+74b58820[ ]+xvmaddwev.q.du[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+db8:[ ]+74ae0820[ ]+xvmaddwod.h.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+dbc:[ ]+74ae8820[ ]+xvmaddwod.w.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+dc0:[ ]+74af0820[ ]+xvmaddwod.d.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+dc4:[ ]+74af8820[ ]+xvmaddwod.q.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+dc8:[ ]+74b60820[ ]+xvmaddwod.h.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+dcc:[ ]+74b68820[ ]+xvmaddwod.w.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+dd0:[ ]+74b70820[ ]+xvmaddwod.d.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+dd4:[ ]+74b78820[ ]+xvmaddwod.q.du[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+dd8:[ ]+74be0820[ ]+xvmaddwod.h.bu.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ddc:[ ]+74be8820[ ]+xvmaddwod.w.hu.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+de0:[ ]+74bf0820[ ]+xvmaddwod.d.wu.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+de4:[ ]+74bf8820[ ]+xvmaddwod.q.du.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+de8:[ ]+74900820[ ]+xvmulwev.h.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+dec:[ ]+74908820[ ]+xvmulwev.w.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+df0:[ ]+74910820[ ]+xvmulwev.d.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+df4:[ ]+74918820[ ]+xvmulwev.q.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+df8:[ ]+74980820[ ]+xvmulwev.h.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+dfc:[ ]+74988820[ ]+xvmulwev.w.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e00:[ ]+74990820[ ]+xvmulwev.d.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e04:[ ]+74998820[ ]+xvmulwev.q.du[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e08:[ ]+74a00820[ ]+xvmulwev.h.bu.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e0c:[ ]+74a08820[ ]+xvmulwev.w.hu.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e10:[ ]+74a10820[ ]+xvmulwev.d.wu.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e14:[ ]+74a18820[ ]+xvmulwev.q.du.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e18:[ ]+74920820[ ]+xvmulwod.h.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e1c:[ ]+74928820[ ]+xvmulwod.w.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e20:[ ]+74930820[ ]+xvmulwod.d.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e24:[ ]+74938820[ ]+xvmulwod.q.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e28:[ ]+749a0820[ ]+xvmulwod.h.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e2c:[ ]+749a8820[ ]+xvmulwod.w.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e30:[ ]+749b0820[ ]+xvmulwod.d.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e34:[ ]+749b8820[ ]+xvmulwod.q.du[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e38:[ ]+74a20820[ ]+xvmulwod.h.bu.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e3c:[ ]+74a28820[ ]+xvmulwod.w.hu.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e40:[ ]+74a30820[ ]+xvmulwod.d.wu.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e44:[ ]+74a38820[ ]+xvmulwod.q.du.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e48:[ ]+74200820[ ]+xvsubwev.h.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e4c:[ ]+74208820[ ]+xvsubwev.w.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e50:[ ]+74210820[ ]+xvsubwev.d.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e54:[ ]+74218820[ ]+xvsubwev.q.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e58:[ ]+74300820[ ]+xvsubwev.h.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e5c:[ ]+74308820[ ]+xvsubwev.w.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e60:[ ]+74310820[ ]+xvsubwev.d.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e64:[ ]+74318820[ ]+xvsubwev.q.du[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e68:[ ]+74240820[ ]+xvsubwod.h.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e6c:[ ]+74248820[ ]+xvsubwod.w.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e70:[ ]+74250820[ ]+xvsubwod.d.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e74:[ ]+74258820[ ]+xvsubwod.q.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e78:[ ]+74340820[ ]+xvsubwod.h.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e7c:[ ]+74348820[ ]+xvsubwod.w.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e80:[ ]+74350820[ ]+xvsubwod.d.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e84:[ ]+74358820[ ]+xvsubwod.q.du[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e88:[ ]+745c0820[ ]+xvadda.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e8c:[ ]+745c8820[ ]+xvadda.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e90:[ ]+745d0820[ ]+xvadda.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e94:[ ]+745d8820[ ]+xvadda.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e98:[ ]+74600820[ ]+xvabsd.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+e9c:[ ]+74608820[ ]+xvabsd.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ea0:[ ]+74610820[ ]+xvabsd.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ea4:[ ]+74618820[ ]+xvabsd.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ea8:[ ]+74620820[ ]+xvabsd.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+eac:[ ]+74628820[ ]+xvabsd.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+eb0:[ ]+74630820[ ]+xvabsd.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+eb4:[ ]+74638820[ ]+xvabsd.du[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+eb8:[ ]+74640820[ ]+xvavg.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ebc:[ ]+74648820[ ]+xvavg.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ec0:[ ]+74650820[ ]+xvavg.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ec4:[ ]+74658820[ ]+xvavg.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ec8:[ ]+74660820[ ]+xvavg.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ecc:[ ]+74668820[ ]+xvavg.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ed0:[ ]+74670820[ ]+xvavg.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ed4:[ ]+74678820[ ]+xvavg.du[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ed8:[ ]+74680820[ ]+xvavgr.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+edc:[ ]+74688820[ ]+xvavgr.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ee0:[ ]+74690820[ ]+xvavgr.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ee4:[ ]+74698820[ ]+xvavgr.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ee8:[ ]+746a0820[ ]+xvavgr.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+eec:[ ]+746a8820[ ]+xvavgr.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ef0:[ ]+746b0820[ ]+xvavgr.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ef4:[ ]+746b8820[ ]+xvavgr.du[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ef8:[ ]+74700820[ ]+xvmax.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+efc:[ ]+74708820[ ]+xvmax.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f00:[ ]+74710820[ ]+xvmax.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f04:[ ]+74718820[ ]+xvmax.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f08:[ ]+74720820[ ]+xvmin.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f0c:[ ]+74728820[ ]+xvmin.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f10:[ ]+74730820[ ]+xvmin.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f14:[ ]+74738820[ ]+xvmin.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f18:[ ]+74740820[ ]+xvmax.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f1c:[ ]+74748820[ ]+xvmax.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f20:[ ]+74750820[ ]+xvmax.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f24:[ ]+74758820[ ]+xvmax.du[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f28:[ ]+74760820[ ]+xvmin.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f2c:[ ]+74768820[ ]+xvmin.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f30:[ ]+74770820[ ]+xvmin.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f34:[ ]+74778820[ ]+xvmin.du[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f38:[ ]+74840820[ ]+xvmul.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f3c:[ ]+74848820[ ]+xvmul.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f40:[ ]+74850820[ ]+xvmul.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f44:[ ]+74858820[ ]+xvmul.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f48:[ ]+74860820[ ]+xvmuh.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f4c:[ ]+74868820[ ]+xvmuh.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f50:[ ]+74870820[ ]+xvmuh.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f54:[ ]+74878820[ ]+xvmuh.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f58:[ ]+74880820[ ]+xvmuh.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f5c:[ ]+74888820[ ]+xvmuh.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f60:[ ]+74890820[ ]+xvmuh.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f64:[ ]+74898820[ ]+xvmuh.du[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f68:[ ]+74a80820[ ]+xvmadd.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f6c:[ ]+74a88820[ ]+xvmadd.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f70:[ ]+74a90820[ ]+xvmadd.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f74:[ ]+74a98820[ ]+xvmadd.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f78:[ ]+74aa0820[ ]+xvmsub.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f7c:[ ]+74aa8820[ ]+xvmsub.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f80:[ ]+74ab0820[ ]+xvmsub.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f84:[ ]+74ab8820[ ]+xvmsub.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f88:[ ]+74e00820[ ]+xvdiv.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f8c:[ ]+74e08820[ ]+xvdiv.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f90:[ ]+74e10820[ ]+xvdiv.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f94:[ ]+74e18820[ ]+xvdiv.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f98:[ ]+74e20820[ ]+xvmod.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+f9c:[ ]+74e28820[ ]+xvmod.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+fa0:[ ]+74e30820[ ]+xvmod.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+fa4:[ ]+74e38820[ ]+xvmod.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+fa8:[ ]+74e40820[ ]+xvdiv.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+fac:[ ]+74e48820[ ]+xvdiv.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+fb0:[ ]+74e50820[ ]+xvdiv.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+fb4:[ ]+74e58820[ ]+xvdiv.du[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+fb8:[ ]+74e60820[ ]+xvmod.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+fbc:[ ]+74e68820[ ]+xvmod.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+fc0:[ ]+74e70820[ ]+xvmod.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+fc4:[ ]+74e78820[ ]+xvmod.du[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+fc8:[ ]+74e80820[ ]+xvsll.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+fcc:[ ]+74e88820[ ]+xvsll.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+fd0:[ ]+74e90820[ ]+xvsll.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+fd4:[ ]+74e98820[ ]+xvsll.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+fd8:[ ]+74ea0820[ ]+xvsrl.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+fdc:[ ]+74ea8820[ ]+xvsrl.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+fe0:[ ]+74eb0820[ ]+xvsrl.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+fe4:[ ]+74eb8820[ ]+xvsrl.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+fe8:[ ]+74ec0820[ ]+xvsra.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+fec:[ ]+74ec8820[ ]+xvsra.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ff0:[ ]+74ed0820[ ]+xvsra.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ff4:[ ]+74ed8820[ ]+xvsra.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ff8:[ ]+74ee0820[ ]+xvrotr.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+ffc:[ ]+74ee8820[ ]+xvrotr.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1000:[ ]+74ef0820[ ]+xvrotr.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1004:[ ]+74ef8820[ ]+xvrotr.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1008:[ ]+74f00820[ ]+xvsrlr.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+100c:[ ]+74f08820[ ]+xvsrlr.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1010:[ ]+74f10820[ ]+xvsrlr.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1014:[ ]+74f18820[ ]+xvsrlr.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1018:[ ]+74f20820[ ]+xvsrar.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+101c:[ ]+74f28820[ ]+xvsrar.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1020:[ ]+74f30820[ ]+xvsrar.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1024:[ ]+74f38820[ ]+xvsrar.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1028:[ ]+74f48820[ ]+xvsrln.b.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+102c:[ ]+74f50820[ ]+xvsrln.h.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1030:[ ]+74f58820[ ]+xvsrln.w.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1034:[ ]+74f68820[ ]+xvsran.b.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1038:[ ]+74f70820[ ]+xvsran.h.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+103c:[ ]+74f78820[ ]+xvsran.w.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1040:[ ]+74f88820[ ]+xvsrlrn.b.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1044:[ ]+74f90820[ ]+xvsrlrn.h.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1048:[ ]+74f98820[ ]+xvsrlrn.w.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+104c:[ ]+74fa8820[ ]+xvsrarn.b.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1050:[ ]+74fb0820[ ]+xvsrarn.h.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1054:[ ]+74fb8820[ ]+xvsrarn.w.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1058:[ ]+74fc8820[ ]+xvssrln.b.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+105c:[ ]+74fd0820[ ]+xvssrln.h.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1060:[ ]+74fd8820[ ]+xvssrln.w.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1064:[ ]+74fe8820[ ]+xvssran.b.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1068:[ ]+74ff0820[ ]+xvssran.h.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+106c:[ ]+74ff8820[ ]+xvssran.w.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1070:[ ]+75008820[ ]+xvssrlrn.b.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1074:[ ]+75010820[ ]+xvssrlrn.h.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1078:[ ]+75018820[ ]+xvssrlrn.w.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+107c:[ ]+75028820[ ]+xvssrarn.b.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1080:[ ]+75030820[ ]+xvssrarn.h.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1084:[ ]+75038820[ ]+xvssrarn.w.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1088:[ ]+75048820[ ]+xvssrln.bu.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+108c:[ ]+75050820[ ]+xvssrln.hu.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1090:[ ]+75058820[ ]+xvssrln.wu.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1094:[ ]+75068820[ ]+xvssran.bu.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1098:[ ]+75070820[ ]+xvssran.hu.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+109c:[ ]+75078820[ ]+xvssran.wu.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+10a0:[ ]+75088820[ ]+xvssrlrn.bu.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+10a4:[ ]+75090820[ ]+xvssrlrn.hu.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+10a8:[ ]+75098820[ ]+xvssrlrn.wu.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+10ac:[ ]+750a8820[ ]+xvssrarn.bu.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+10b0:[ ]+750b0820[ ]+xvssrarn.hu.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+10b4:[ ]+750b8820[ ]+xvssrarn.wu.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+10b8:[ ]+750c0820[ ]+xvbitclr.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+10bc:[ ]+750c8820[ ]+xvbitclr.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+10c0:[ ]+750d0820[ ]+xvbitclr.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+10c4:[ ]+750d8820[ ]+xvbitclr.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+10c8:[ ]+750e0820[ ]+xvbitset.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+10cc:[ ]+750e8820[ ]+xvbitset.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+10d0:[ ]+750f0820[ ]+xvbitset.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+10d4:[ ]+750f8820[ ]+xvbitset.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+10d8:[ ]+75100820[ ]+xvbitrev.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+10dc:[ ]+75108820[ ]+xvbitrev.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+10e0:[ ]+75110820[ ]+xvbitrev.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+10e4:[ ]+75118820[ ]+xvbitrev.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+10e8:[ ]+75160820[ ]+xvpackev.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+10ec:[ ]+75168820[ ]+xvpackev.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+10f0:[ ]+75170820[ ]+xvpackev.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+10f4:[ ]+75178820[ ]+xvpackev.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+10f8:[ ]+75180820[ ]+xvpackod.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+10fc:[ ]+75188820[ ]+xvpackod.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1100:[ ]+75190820[ ]+xvpackod.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1104:[ ]+75198820[ ]+xvpackod.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1108:[ ]+751a0820[ ]+xvilvl.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+110c:[ ]+751a8820[ ]+xvilvl.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1110:[ ]+751b0820[ ]+xvilvl.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1114:[ ]+751b8820[ ]+xvilvl.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1118:[ ]+751c0820[ ]+xvilvh.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+111c:[ ]+751c8820[ ]+xvilvh.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1120:[ ]+751d0820[ ]+xvilvh.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1124:[ ]+751d8820[ ]+xvilvh.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1128:[ ]+751e0820[ ]+xvpickev.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+112c:[ ]+751e8820[ ]+xvpickev.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1130:[ ]+751f0820[ ]+xvpickev.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1134:[ ]+751f8820[ ]+xvpickev.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1138:[ ]+75200820[ ]+xvpickod.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+113c:[ ]+75208820[ ]+xvpickod.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1140:[ ]+75210820[ ]+xvpickod.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1144:[ ]+75218820[ ]+xvpickod.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1148:[ ]+75220820[ ]+xvreplve.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$tp -+[ ]+114c:[ ]+75228820[ ]+xvreplve.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$tp -+[ ]+1150:[ ]+75230820[ ]+xvreplve.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$tp -+[ ]+1154:[ ]+75238820[ ]+xvreplve.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$tp -+[ ]+1158:[ ]+75260820[ ]+xvand.v[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+115c:[ ]+75268820[ ]+xvor.v[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1160:[ ]+75270820[ ]+xvxor.v[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1164:[ ]+75278820[ ]+xvnor.v[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1168:[ ]+75280820[ ]+xvandn.v[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+116c:[ ]+75288820[ ]+xvorn.v[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1170:[ ]+752b0820[ ]+xvfrstp.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1174:[ ]+752b8820[ ]+xvfrstp.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1178:[ ]+752d0820[ ]+xvadd.q[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+117c:[ ]+752d8820[ ]+xvsub.q[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1180:[ ]+752e0820[ ]+xvsigncov.b[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1184:[ ]+752e8820[ ]+xvsigncov.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1188:[ ]+752f0820[ ]+xvsigncov.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+118c:[ ]+752f8820[ ]+xvsigncov.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1190:[ ]+75308820[ ]+xvfadd.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1194:[ ]+75310820[ ]+xvfadd.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1198:[ ]+75328820[ ]+xvfsub.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+119c:[ ]+75330820[ ]+xvfsub.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+11a0:[ ]+75388820[ ]+xvfmul.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+11a4:[ ]+75390820[ ]+xvfmul.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+11a8:[ ]+753a8820[ ]+xvfdiv.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+11ac:[ ]+753b0820[ ]+xvfdiv.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+11b0:[ ]+753c8820[ ]+xvfmax.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+11b4:[ ]+753d0820[ ]+xvfmax.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+11b8:[ ]+753e8820[ ]+xvfmin.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+11bc:[ ]+753f0820[ ]+xvfmin.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+11c0:[ ]+75408820[ ]+xvfmaxa.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+11c4:[ ]+75410820[ ]+xvfmaxa.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+11c8:[ ]+75428820[ ]+xvfmina.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+11cc:[ ]+75430820[ ]+xvfmina.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+11d0:[ ]+75460820[ ]+xvfcvt.h.s[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+11d4:[ ]+75468820[ ]+xvfcvt.s.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+11d8:[ ]+75480820[ ]+xvffint.s.l[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+11dc:[ ]+75498820[ ]+xvftint.w.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+11e0:[ ]+754a0820[ ]+xvftintrm.w.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+11e4:[ ]+754a8820[ ]+xvftintrp.w.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+11e8:[ ]+754b0820[ ]+xvftintrz.w.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+11ec:[ ]+754b8820[ ]+xvftintrne.w.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+11f0:[ ]+757a8820[ ]+xvshuf.h[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+11f4:[ ]+757b0820[ ]+xvshuf.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+11f8:[ ]+757b8820[ ]+xvshuf.d[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+11fc:[ ]+757d0820[ ]+xvperm.w[ ]+\$xr0,[ ]+\$xr1,[ ]+\$xr2 -+[ ]+1200:[ ]+76800420[ ]+xvseqi.b[ ]+\$xr0,[ ]+\$xr1,[ ]+1 -+[ ]+1204:[ ]+76808420[ ]+xvseqi.h[ ]+\$xr0,[ ]+\$xr1,[ ]+1 -+[ ]+1208:[ ]+76810420[ ]+xvseqi.w[ ]+\$xr0,[ ]+\$xr1,[ ]+1 -+[ ]+120c:[ ]+76818420[ ]+xvseqi.d[ ]+\$xr0,[ ]+\$xr1,[ ]+1 -+[ ]+1210:[ ]+76820420[ ]+xvslei.b[ ]+\$xr0,[ ]+\$xr1,[ ]+1 -+[ ]+1214:[ ]+76828420[ ]+xvslei.h[ ]+\$xr0,[ ]+\$xr1,[ ]+1 -+[ ]+1218:[ ]+76830420[ ]+xvslei.w[ ]+\$xr0,[ ]+\$xr1,[ ]+1 -+[ ]+121c:[ ]+76838420[ ]+xvslei.d[ ]+\$xr0,[ ]+\$xr1,[ ]+1 -+[ ]+1220:[ ]+76840420[ ]+xvslei.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1224:[ ]+76848420[ ]+xvslei.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1228:[ ]+76850420[ ]+xvslei.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+122c:[ ]+76858420[ ]+xvslei.du[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1230:[ ]+76860420[ ]+xvslti.b[ ]+\$xr0,[ ]+\$xr1,[ ]+1 -+[ ]+1234:[ ]+76868420[ ]+xvslti.h[ ]+\$xr0,[ ]+\$xr1,[ ]+1 -+[ ]+1238:[ ]+76870420[ ]+xvslti.w[ ]+\$xr0,[ ]+\$xr1,[ ]+1 -+[ ]+123c:[ ]+76878420[ ]+xvslti.d[ ]+\$xr0,[ ]+\$xr1,[ ]+1 -+[ ]+1240:[ ]+76880420[ ]+xvslti.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1244:[ ]+76888420[ ]+xvslti.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1248:[ ]+76890420[ ]+xvslti.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+124c:[ ]+76898420[ ]+xvslti.du[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1250:[ ]+768a0420[ ]+xvaddi.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1254:[ ]+768a8420[ ]+xvaddi.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1258:[ ]+768b0420[ ]+xvaddi.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+125c:[ ]+768b8420[ ]+xvaddi.du[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1260:[ ]+768c0420[ ]+xvsubi.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1264:[ ]+768c8420[ ]+xvsubi.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1268:[ ]+768d0420[ ]+xvsubi.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+126c:[ ]+768d8420[ ]+xvsubi.du[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1270:[ ]+768e0420[ ]+xvbsll.v[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1274:[ ]+768e8420[ ]+xvbsrl.v[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1278:[ ]+76900420[ ]+xvmaxi.b[ ]+\$xr0,[ ]+\$xr1,[ ]+1 -+[ ]+127c:[ ]+76908420[ ]+xvmaxi.h[ ]+\$xr0,[ ]+\$xr1,[ ]+1 -+[ ]+1280:[ ]+76910420[ ]+xvmaxi.w[ ]+\$xr0,[ ]+\$xr1,[ ]+1 -+[ ]+1284:[ ]+76918420[ ]+xvmaxi.d[ ]+\$xr0,[ ]+\$xr1,[ ]+1 -+[ ]+1288:[ ]+76920420[ ]+xvmini.b[ ]+\$xr0,[ ]+\$xr1,[ ]+1 -+[ ]+128c:[ ]+76928420[ ]+xvmini.h[ ]+\$xr0,[ ]+\$xr1,[ ]+1 -+[ ]+1290:[ ]+76930420[ ]+xvmini.w[ ]+\$xr0,[ ]+\$xr1,[ ]+1 -+[ ]+1294:[ ]+76938420[ ]+xvmini.d[ ]+\$xr0,[ ]+\$xr1,[ ]+1 -+[ ]+1298:[ ]+76940420[ ]+xvmaxi.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+129c:[ ]+76948420[ ]+xvmaxi.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+12a0:[ ]+76950420[ ]+xvmaxi.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+12a4:[ ]+76958420[ ]+xvmaxi.du[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+12a8:[ ]+76960420[ ]+xvmini.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+12ac:[ ]+76968420[ ]+xvmini.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+12b0:[ ]+76970420[ ]+xvmini.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+12b4:[ ]+76978420[ ]+xvmini.du[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+12b8:[ ]+769a0420[ ]+xvfrstpi.b[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+12bc:[ ]+769a8420[ ]+xvfrstpi.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+12c0:[ ]+769c0020[ ]+xvclo.b[ ]+\$xr0,[ ]+\$xr1 -+[ ]+12c4:[ ]+769c0420[ ]+xvclo.h[ ]+\$xr0,[ ]+\$xr1 -+[ ]+12c8:[ ]+769c0820[ ]+xvclo.w[ ]+\$xr0,[ ]+\$xr1 -+[ ]+12cc:[ ]+769c0c20[ ]+xvclo.d[ ]+\$xr0,[ ]+\$xr1 -+[ ]+12d0:[ ]+769c1020[ ]+xvclz.b[ ]+\$xr0,[ ]+\$xr1 -+[ ]+12d4:[ ]+769c1420[ ]+xvclz.h[ ]+\$xr0,[ ]+\$xr1 -+[ ]+12d8:[ ]+769c1820[ ]+xvclz.w[ ]+\$xr0,[ ]+\$xr1 -+[ ]+12dc:[ ]+769c1c20[ ]+xvclz.d[ ]+\$xr0,[ ]+\$xr1 -+[ ]+12e0:[ ]+769c2020[ ]+xvpcnt.b[ ]+\$xr0,[ ]+\$xr1 -+[ ]+12e4:[ ]+769c2420[ ]+xvpcnt.h[ ]+\$xr0,[ ]+\$xr1 -+[ ]+12e8:[ ]+769c2820[ ]+xvpcnt.w[ ]+\$xr0,[ ]+\$xr1 -+[ ]+12ec:[ ]+769c2c20[ ]+xvpcnt.d[ ]+\$xr0,[ ]+\$xr1 -+[ ]+12f0:[ ]+769c3020[ ]+xvneg.b[ ]+\$xr0,[ ]+\$xr1 -+[ ]+12f4:[ ]+769c3420[ ]+xvneg.h[ ]+\$xr0,[ ]+\$xr1 -+[ ]+12f8:[ ]+769c3820[ ]+xvneg.w[ ]+\$xr0,[ ]+\$xr1 -+[ ]+12fc:[ ]+769c3c20[ ]+xvneg.d[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1300:[ ]+769c4020[ ]+xvmskltz.b[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1304:[ ]+769c4420[ ]+xvmskltz.h[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1308:[ ]+769c4820[ ]+xvmskltz.w[ ]+\$xr0,[ ]+\$xr1 -+[ ]+130c:[ ]+769c4c20[ ]+xvmskltz.d[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1310:[ ]+769c5020[ ]+xvmskgez.b[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1314:[ ]+769c6020[ ]+xvmsknz.b[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1318:[ ]+769c9820[ ]+xvseteqz.v[ ]+\$fcc0,[ ]+\$xr1 -+[ ]+131c:[ ]+769c9c20[ ]+xvsetnez.v[ ]+\$fcc0,[ ]+\$xr1 -+[ ]+1320:[ ]+769ca020[ ]+xvsetanyeqz.b[ ]+\$fcc0,[ ]+\$xr1 -+[ ]+1324:[ ]+769ca420[ ]+xvsetanyeqz.h[ ]+\$fcc0,[ ]+\$xr1 -+[ ]+1328:[ ]+769ca820[ ]+xvsetanyeqz.w[ ]+\$fcc0,[ ]+\$xr1 -+[ ]+132c:[ ]+769cac20[ ]+xvsetanyeqz.d[ ]+\$fcc0,[ ]+\$xr1 -+[ ]+1330:[ ]+769cb020[ ]+xvsetallnez.b[ ]+\$fcc0,[ ]+\$xr1 -+[ ]+1334:[ ]+769cb420[ ]+xvsetallnez.h[ ]+\$fcc0,[ ]+\$xr1 -+[ ]+1338:[ ]+769cb820[ ]+xvsetallnez.w[ ]+\$fcc0,[ ]+\$xr1 -+[ ]+133c:[ ]+769cbc20[ ]+xvsetallnez.d[ ]+\$fcc0,[ ]+\$xr1 -+[ ]+1340:[ ]+769cc420[ ]+xvflogb.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1344:[ ]+769cc820[ ]+xvflogb.d[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1348:[ ]+769cd420[ ]+xvfclass.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+134c:[ ]+769cd820[ ]+xvfclass.d[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1350:[ ]+769ce420[ ]+xvfsqrt.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1354:[ ]+769ce820[ ]+xvfsqrt.d[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1358:[ ]+769cf420[ ]+xvfrecip.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+135c:[ ]+769cf820[ ]+xvfrecip.d[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1360:[ ]+769d0420[ ]+xvfrsqrt.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1364:[ ]+769d0820[ ]+xvfrsqrt.d[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1368:[ ]+769d3420[ ]+xvfrint.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+136c:[ ]+769d3820[ ]+xvfrint.d[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1370:[ ]+769d4420[ ]+xvfrintrm.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1374:[ ]+769d4820[ ]+xvfrintrm.d[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1378:[ ]+769d5420[ ]+xvfrintrp.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+137c:[ ]+769d5820[ ]+xvfrintrp.d[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1380:[ ]+769d6420[ ]+xvfrintrz.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1384:[ ]+769d6820[ ]+xvfrintrz.d[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1388:[ ]+769d7420[ ]+xvfrintrne.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+138c:[ ]+769d7820[ ]+xvfrintrne.d[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1390:[ ]+769de820[ ]+xvfcvtl.s.h[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1394:[ ]+769dec20[ ]+xvfcvth.s.h[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1398:[ ]+769df020[ ]+xvfcvtl.d.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+139c:[ ]+769df420[ ]+xvfcvth.d.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+13a0:[ ]+769e0020[ ]+xvffint.s.w[ ]+\$xr0,[ ]+\$xr1 -+[ ]+13a4:[ ]+769e0420[ ]+xvffint.s.wu[ ]+\$xr0,[ ]+\$xr1 -+[ ]+13a8:[ ]+769e0820[ ]+xvffint.d.l[ ]+\$xr0,[ ]+\$xr1 -+[ ]+13ac:[ ]+769e0c20[ ]+xvffint.d.lu[ ]+\$xr0,[ ]+\$xr1 -+[ ]+13b0:[ ]+769e1020[ ]+xvffintl.d.w[ ]+\$xr0,[ ]+\$xr1 -+[ ]+13b4:[ ]+769e1420[ ]+xvffinth.d.w[ ]+\$xr0,[ ]+\$xr1 -+[ ]+13b8:[ ]+769e3020[ ]+xvftint.w.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+13bc:[ ]+769e3420[ ]+xvftint.l.d[ ]+\$xr0,[ ]+\$xr1 -+[ ]+13c0:[ ]+769e3820[ ]+xvftintrm.w.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+13c4:[ ]+769e3c20[ ]+xvftintrm.l.d[ ]+\$xr0,[ ]+\$xr1 -+[ ]+13c8:[ ]+769e4020[ ]+xvftintrp.w.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+13cc:[ ]+769e4420[ ]+xvftintrp.l.d[ ]+\$xr0,[ ]+\$xr1 -+[ ]+13d0:[ ]+769e4820[ ]+xvftintrz.w.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+13d4:[ ]+769e4c20[ ]+xvftintrz.l.d[ ]+\$xr0,[ ]+\$xr1 -+[ ]+13d8:[ ]+769e5020[ ]+xvftintrne.w.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+13dc:[ ]+769e5420[ ]+xvftintrne.l.d[ ]+\$xr0,[ ]+\$xr1 -+[ ]+13e0:[ ]+769e5820[ ]+xvftint.wu.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+13e4:[ ]+769e5c20[ ]+xvftint.lu.d[ ]+\$xr0,[ ]+\$xr1 -+[ ]+13e8:[ ]+769e7020[ ]+xvftintrz.wu.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+13ec:[ ]+769e7420[ ]+xvftintrz.lu.d[ ]+\$xr0,[ ]+\$xr1 -+[ ]+13f0:[ ]+769e8020[ ]+xvftintl.l.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+13f4:[ ]+769e8420[ ]+xvftinth.l.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+13f8:[ ]+769e8820[ ]+xvftintrml.l.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+13fc:[ ]+769e8c20[ ]+xvftintrmh.l.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1400:[ ]+769e9020[ ]+xvftintrpl.l.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1404:[ ]+769e9420[ ]+xvftintrph.l.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1408:[ ]+769e9820[ ]+xvftintrzl.l.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+140c:[ ]+769e9c20[ ]+xvftintrzh.l.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1410:[ ]+769ea020[ ]+xvftintrnel.l.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1414:[ ]+769ea420[ ]+xvftintrneh.l.s[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1418:[ ]+769ee020[ ]+xvexth.h.b[ ]+\$xr0,[ ]+\$xr1 -+[ ]+141c:[ ]+769ee420[ ]+xvexth.w.h[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1420:[ ]+769ee820[ ]+xvexth.d.w[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1424:[ ]+769eec20[ ]+xvexth.q.d[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1428:[ ]+769ef020[ ]+xvexth.hu.bu[ ]+\$xr0,[ ]+\$xr1 -+[ ]+142c:[ ]+769ef420[ ]+xvexth.wu.hu[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1430:[ ]+769ef820[ ]+xvexth.du.wu[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1434:[ ]+769efc20[ ]+xvexth.qu.du[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1438:[ ]+769f0020[ ]+xvreplgr2vr.b[ ]+\$xr0,[ ]+\$ra -+[ ]+143c:[ ]+769f0420[ ]+xvreplgr2vr.h[ ]+\$xr0,[ ]+\$ra -+[ ]+1440:[ ]+769f0820[ ]+xvreplgr2vr.w[ ]+\$xr0,[ ]+\$ra -+[ ]+1444:[ ]+769f0c20[ ]+xvreplgr2vr.d[ ]+\$xr0,[ ]+\$ra -+[ ]+1448:[ ]+769f1020[ ]+vext2xv.h.b[ ]+\$xr0,[ ]+\$xr1 -+[ ]+144c:[ ]+769f1420[ ]+vext2xv.w.b[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1450:[ ]+769f1820[ ]+vext2xv.d.b[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1454:[ ]+769f1c20[ ]+vext2xv.w.h[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1458:[ ]+769f2020[ ]+vext2xv.d.h[ ]+\$xr0,[ ]+\$xr1 -+[ ]+145c:[ ]+769f2420[ ]+vext2xv.d.w[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1460:[ ]+769f2820[ ]+vext2xv.hu.bu[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1464:[ ]+769f2c20[ ]+vext2xv.wu.bu[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1468:[ ]+769f3020[ ]+vext2xv.du.bu[ ]+\$xr0,[ ]+\$xr1 -+[ ]+146c:[ ]+769f3420[ ]+vext2xv.wu.hu[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1470:[ ]+769f3820[ ]+vext2xv.du.hu[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1474:[ ]+769f3c20[ ]+vext2xv.du.wu[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1478:[ ]+769f8420[ ]+xvhseli.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+147c:[ ]+76a02420[ ]+xvrotri.b[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1480:[ ]+76a04420[ ]+xvrotri.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1484:[ ]+76a08420[ ]+xvrotri.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1488:[ ]+76a10420[ ]+xvrotri.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+148c:[ ]+76a42420[ ]+xvsrlri.b[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1490:[ ]+76a44420[ ]+xvsrlri.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1494:[ ]+76a48420[ ]+xvsrlri.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1498:[ ]+76a50420[ ]+xvsrlri.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+149c:[ ]+76a82420[ ]+xvsrari.b[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+14a0:[ ]+76a84420[ ]+xvsrari.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+14a4:[ ]+76a88420[ ]+xvsrari.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+14a8:[ ]+76a90420[ ]+xvsrari.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+14ac:[ ]+76ebc420[ ]+xvinsgr2vr.w[ ]+\$xr0,[ ]+\$ra,[ ]+0x1 -+[ ]+14b0:[ ]+76ebe420[ ]+xvinsgr2vr.d[ ]+\$xr0,[ ]+\$ra,[ ]+0x1 -+[ ]+14b4:[ ]+76efc420[ ]+xvpickve2gr.w[ ]+\$zero,[ ]+\$xr1,[ ]+0x1 -+[ ]+14b8:[ ]+76efe420[ ]+xvpickve2gr.d[ ]+\$zero,[ ]+\$xr1,[ ]+0x1 -+[ ]+14bc:[ ]+76f3c420[ ]+xvpickve2gr.wu[ ]+\$zero,[ ]+\$xr1,[ ]+0x1 -+[ ]+14c0:[ ]+76f3e420[ ]+xvpickve2gr.du[ ]+\$zero,[ ]+\$xr1,[ ]+0x1 -+[ ]+14c4:[ ]+76f78420[ ]+xvrepl128vei.b[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+14c8:[ ]+76f7c420[ ]+xvrepl128vei.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+14cc:[ ]+76f7e420[ ]+xvrepl128vei.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+14d0:[ ]+76f7f420[ ]+xvrepl128vei.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+14d4:[ ]+76ffc420[ ]+xvinsve0.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+14d8:[ ]+76ffe420[ ]+xvinsve0.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+14dc:[ ]+7703c420[ ]+xvpickve.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+14e0:[ ]+7703e420[ ]+xvpickve.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+14e4:[ ]+77070020[ ]+xvreplve0.b[ ]+\$xr0,[ ]+\$xr1 -+[ ]+14e8:[ ]+77078020[ ]+xvreplve0.h[ ]+\$xr0,[ ]+\$xr1 -+[ ]+14ec:[ ]+7707c020[ ]+xvreplve0.w[ ]+\$xr0,[ ]+\$xr1 -+[ ]+14f0:[ ]+7707e020[ ]+xvreplve0.d[ ]+\$xr0,[ ]+\$xr1 -+[ ]+14f4:[ ]+7707f020[ ]+xvreplve0.q[ ]+\$xr0,[ ]+\$xr1 -+[ ]+14f8:[ ]+77082420[ ]+xvsllwil.h.b[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+14fc:[ ]+77084420[ ]+xvsllwil.w.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1500:[ ]+77088420[ ]+xvsllwil.d.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1504:[ ]+77090020[ ]+xvextl.q.d[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1508:[ ]+770c2420[ ]+xvsllwil.hu.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+150c:[ ]+770c4420[ ]+xvsllwil.wu.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1510:[ ]+770c8420[ ]+xvsllwil.du.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1514:[ ]+770d0020[ ]+xvextl.qu.du[ ]+\$xr0,[ ]+\$xr1 -+[ ]+1518:[ ]+77102420[ ]+xvbitclri.b[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+151c:[ ]+77104420[ ]+xvbitclri.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1520:[ ]+77108420[ ]+xvbitclri.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1524:[ ]+77110420[ ]+xvbitclri.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1528:[ ]+77142420[ ]+xvbitseti.b[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+152c:[ ]+77144420[ ]+xvbitseti.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1530:[ ]+77148420[ ]+xvbitseti.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1534:[ ]+77150420[ ]+xvbitseti.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1538:[ ]+77182420[ ]+xvbitrevi.b[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+153c:[ ]+77184420[ ]+xvbitrevi.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1540:[ ]+77188420[ ]+xvbitrevi.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1544:[ ]+77190420[ ]+xvbitrevi.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1548:[ ]+77242420[ ]+xvsat.b[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+154c:[ ]+77244420[ ]+xvsat.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1550:[ ]+77248420[ ]+xvsat.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1554:[ ]+77250420[ ]+xvsat.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1558:[ ]+77282420[ ]+xvsat.bu[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+155c:[ ]+77284420[ ]+xvsat.hu[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1560:[ ]+77288420[ ]+xvsat.wu[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1564:[ ]+77290420[ ]+xvsat.du[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1568:[ ]+772c2420[ ]+xvslli.b[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+156c:[ ]+772c4420[ ]+xvslli.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1570:[ ]+772c8420[ ]+xvslli.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1574:[ ]+772d0420[ ]+xvslli.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1578:[ ]+77302420[ ]+xvsrli.b[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+157c:[ ]+77304420[ ]+xvsrli.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1580:[ ]+77308420[ ]+xvsrli.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1584:[ ]+77310420[ ]+xvsrli.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1588:[ ]+77342420[ ]+xvsrai.b[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+158c:[ ]+77344420[ ]+xvsrai.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1590:[ ]+77348420[ ]+xvsrai.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1594:[ ]+77350420[ ]+xvsrai.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1598:[ ]+77404420[ ]+xvsrlni.b.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+159c:[ ]+77408420[ ]+xvsrlni.h.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+15a0:[ ]+77410420[ ]+xvsrlni.w.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+15a4:[ ]+77420420[ ]+xvsrlni.d.q[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+15a8:[ ]+77444420[ ]+xvsrlrni.b.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+15ac:[ ]+77448420[ ]+xvsrlrni.h.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+15b0:[ ]+77450420[ ]+xvsrlrni.w.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+15b4:[ ]+77460420[ ]+xvsrlrni.d.q[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+15b8:[ ]+77484420[ ]+xvssrlni.b.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+15bc:[ ]+77488420[ ]+xvssrlni.h.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+15c0:[ ]+77490420[ ]+xvssrlni.w.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+15c4:[ ]+774a0420[ ]+xvssrlni.d.q[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+15c8:[ ]+774c4420[ ]+xvssrlni.bu.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+15cc:[ ]+774c8420[ ]+xvssrlni.hu.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+15d0:[ ]+774d0420[ ]+xvssrlni.wu.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+15d4:[ ]+774e0420[ ]+xvssrlni.du.q[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+15d8:[ ]+77504420[ ]+xvssrlrni.b.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+15dc:[ ]+77508420[ ]+xvssrlrni.h.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+15e0:[ ]+77510420[ ]+xvssrlrni.w.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+15e4:[ ]+77520420[ ]+xvssrlrni.d.q[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+15e8:[ ]+77544420[ ]+xvssrlrni.bu.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+15ec:[ ]+77548420[ ]+xvssrlrni.hu.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+15f0:[ ]+77550420[ ]+xvssrlrni.wu.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+15f4:[ ]+77560420[ ]+xvssrlrni.du.q[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+15f8:[ ]+77584420[ ]+xvsrani.b.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+15fc:[ ]+77588420[ ]+xvsrani.h.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1600:[ ]+77590420[ ]+xvsrani.w.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1604:[ ]+775a0420[ ]+xvsrani.d.q[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1608:[ ]+775c4420[ ]+xvsrarni.b.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+160c:[ ]+775c8420[ ]+xvsrarni.h.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1610:[ ]+775d0420[ ]+xvsrarni.w.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1614:[ ]+775e0420[ ]+xvsrarni.d.q[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1618:[ ]+77604420[ ]+xvssrani.b.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+161c:[ ]+77608420[ ]+xvssrani.h.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1620:[ ]+77610420[ ]+xvssrani.w.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1624:[ ]+77620420[ ]+xvssrani.d.q[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1628:[ ]+77644420[ ]+xvssrani.bu.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+162c:[ ]+77648420[ ]+xvssrani.hu.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1630:[ ]+77650420[ ]+xvssrani.wu.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1634:[ ]+77660420[ ]+xvssrani.du.q[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1638:[ ]+77684420[ ]+xvssrarni.b.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+163c:[ ]+77688420[ ]+xvssrarni.h.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1640:[ ]+77690420[ ]+xvssrarni.w.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1644:[ ]+776a0420[ ]+xvssrarni.d.q[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1648:[ ]+776c4420[ ]+xvssrarni.bu.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+164c:[ ]+776c8420[ ]+xvssrarni.hu.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1650:[ ]+776d0420[ ]+xvssrarni.wu.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1654:[ ]+776e0420[ ]+xvssrarni.du.q[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1658:[ ]+77800420[ ]+xvextrins.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+165c:[ ]+77840420[ ]+xvextrins.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1660:[ ]+77880420[ ]+xvextrins.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1664:[ ]+778c0420[ ]+xvextrins.b[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1668:[ ]+77900420[ ]+xvshuf4i.b[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+166c:[ ]+77940420[ ]+xvshuf4i.h[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1670:[ ]+77980420[ ]+xvshuf4i.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1674:[ ]+779c0420[ ]+xvshuf4i.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1678:[ ]+77c40420[ ]+xvbitseli.b[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+167c:[ ]+77d00420[ ]+xvandi.b[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1680:[ ]+77d40420[ ]+xvori.b[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1684:[ ]+77d80420[ ]+xvxori.b[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+1688:[ ]+77dc0420[ ]+xvnori.b[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+168c:[ ]+77e00020[ ]+xvldi[ ]+\$xr0,[ ]+1 -+[ ]+1690:[ ]+77e18020[ ]+xvldi[ ]+\$xr0,[ ]+3073 -+[ ]+1694:[ ]+77e08020[ ]+xvldi[ ]+\$xr0,[ ]+1025 -+[ ]+1698:[ ]+77e10020[ ]+xvldi[ ]+\$xr0,[ ]+2049 -+[ ]+169c:[ ]+77e00020[ ]+xvldi[ ]+\$xr0,[ ]+1 -+[ ]+16a0:[ ]+77e40420[ ]+xvpermi.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+16a4:[ ]+77e80420[ ]+xvpermi.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -+[ ]+16a8:[ ]+77ec0420[ ]+xvpermi.q[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1 -diff --git a/gas/testsuite/gas/loongarch/vector.s b/gas/testsuite/gas/loongarch/vector.s -new file mode 100644 -index 0000000..fe0369e ---- /dev/null -+++ b/gas/testsuite/gas/loongarch/vector.s -@@ -0,0 +1,1451 @@ -+vfmadd.s $vr0, $vr1, $vr2, $vr3 -+vfmsub.s $vr0, $vr1, $vr2, $vr3 -+vfnmadd.s $vr0, $vr1, $vr2, $vr3 -+vfnmsub.s $vr0, $vr1, $vr2, $vr3 -+xvfmadd.s $xr0, $xr1, $xr2, $xr3 -+xvfmsub.s $xr0, $xr1, $xr2, $xr3 -+xvfnmadd.s $xr0, $xr1, $xr2, $xr3 -+xvfnmsub.s $xr0, $xr1, $xr2, $xr3 -+vfcmp.caf.s $vr0, $vr1, $vr2 -+vfcmp.saf.s $vr0, $vr1, $vr2 -+vfcmp.clt.s $vr0, $vr1, $vr2 -+vfcmp.slt.s $vr0, $vr1, $vr2 -+vfcmp.ceq.s $vr0, $vr1, $vr2 -+vfcmp.seq.s $vr0, $vr1, $vr2 -+vfcmp.cle.s $vr0, $vr1, $vr2 -+vfcmp.sle.s $vr0, $vr1, $vr2 -+vfcmp.cun.s $vr0, $vr1, $vr2 -+vfcmp.sun.s $vr0, $vr1, $vr2 -+vfcmp.cult.s $vr0, $vr1, $vr2 -+vfcmp.sult.s $vr0, $vr1, $vr2 -+vfcmp.cueq.s $vr0, $vr1, $vr2 -+vfcmp.sueq.s $vr0, $vr1, $vr2 -+vfcmp.cule.s $vr0, $vr1, $vr2 -+vfcmp.sule.s $vr0, $vr1, $vr2 -+vfcmp.cne.s $vr0, $vr1, $vr2 -+vfcmp.sne.s $vr0, $vr1, $vr2 -+vfcmp.cor.s $vr0, $vr1, $vr2 -+vfcmp.sor.s $vr0, $vr1, $vr2 -+vfcmp.cune.s $vr0, $vr1, $vr2 -+vfcmp.sune.s $vr0, $vr1, $vr2 -+xvfcmp.caf.s $xr0, $xr1, $xr2 -+xvfcmp.saf.s $xr0, $xr1, $xr2 -+xvfcmp.clt.s $xr0, $xr1, $xr2 -+xvfcmp.slt.s $xr0, $xr1, $xr2 -+xvfcmp.ceq.s $xr0, $xr1, $xr2 -+xvfcmp.seq.s $xr0, $xr1, $xr2 -+xvfcmp.cle.s $xr0, $xr1, $xr2 -+xvfcmp.sle.s $xr0, $xr1, $xr2 -+xvfcmp.cun.s $xr0, $xr1, $xr2 -+xvfcmp.sun.s $xr0, $xr1, $xr2 -+xvfcmp.cult.s $xr0, $xr1, $xr2 -+xvfcmp.sult.s $xr0, $xr1, $xr2 -+xvfcmp.cueq.s $xr0, $xr1, $xr2 -+xvfcmp.sueq.s $xr0, $xr1, $xr2 -+xvfcmp.cule.s $xr0, $xr1, $xr2 -+xvfcmp.sule.s $xr0, $xr1, $xr2 -+xvfcmp.cne.s $xr0, $xr1, $xr2 -+xvfcmp.sne.s $xr0, $xr1, $xr2 -+xvfcmp.cor.s $xr0, $xr1, $xr2 -+xvfcmp.sor.s $xr0, $xr1, $xr2 -+xvfcmp.cune.s $xr0, $xr1, $xr2 -+xvfcmp.sune.s $xr0, $xr1, $xr2 -+vbitsel.v $vr0, $vr1, $vr2, $vr3 -+xvbitsel.v $xr0, $xr1, $xr2, $xr3 -+vshuf.b $vr0, $vr1, $vr2, $vr3 -+xvshuf.b $xr0, $xr1, $xr2, $xr3 -+vfmadd.d $vr0, $vr1, $vr2, $vr3 -+vfmsub.d $vr0, $vr1, $vr2, $vr3 -+vfnmadd.d $vr0, $vr1, $vr2, $vr3 -+vfnmsub.d $vr0, $vr1, $vr2, $vr3 -+xvfmadd.d $xr0, $xr1, $xr2, $xr3 -+xvfmsub.d $xr0, $xr1, $xr2, $xr3 -+xvfnmadd.d $xr0, $xr1, $xr2, $xr3 -+xvfnmsub.d $xr0, $xr1, $xr2, $xr3 -+vfcmp.caf.d $vr0, $vr1, $vr2 -+vfcmp.saf.d $vr0, $vr1, $vr2 -+vfcmp.clt.d $vr0, $vr1, $vr2 -+vfcmp.slt.d $vr0, $vr1, $vr2 -+vfcmp.ceq.d $vr0, $vr1, $vr2 -+vfcmp.seq.d $vr0, $vr1, $vr2 -+vfcmp.cle.d $vr0, $vr1, $vr2 -+vfcmp.sle.d $vr0, $vr1, $vr2 -+vfcmp.cun.d $vr0, $vr1, $vr2 -+vfcmp.sun.d $vr0, $vr1, $vr2 -+vfcmp.cult.d $vr0, $vr1, $vr2 -+vfcmp.sult.d $vr0, $vr1, $vr2 -+vfcmp.cueq.d $vr0, $vr1, $vr2 -+vfcmp.sueq.d $vr0, $vr1, $vr2 -+vfcmp.cule.d $vr0, $vr1, $vr2 -+vfcmp.sule.d $vr0, $vr1, $vr2 -+vfcmp.cne.d $vr0, $vr1, $vr2 -+vfcmp.sne.d $vr0, $vr1, $vr2 -+vfcmp.cor.d $vr0, $vr1, $vr2 -+vfcmp.sor.d $vr0, $vr1, $vr2 -+vfcmp.cune.d $vr0, $vr1, $vr2 -+vfcmp.sune.d $vr0, $vr1, $vr2 -+xvfcmp.caf.d $xr0, $xr1, $xr2 -+xvfcmp.saf.d $xr0, $xr1, $xr2 -+xvfcmp.clt.d $xr0, $xr1, $xr2 -+xvfcmp.slt.d $xr0, $xr1, $xr2 -+xvfcmp.ceq.d $xr0, $xr1, $xr2 -+xvfcmp.seq.d $xr0, $xr1, $xr2 -+xvfcmp.cle.d $xr0, $xr1, $xr2 -+xvfcmp.sle.d $xr0, $xr1, $xr2 -+xvfcmp.cun.d $xr0, $xr1, $xr2 -+xvfcmp.sun.d $xr0, $xr1, $xr2 -+xvfcmp.cult.d $xr0, $xr1, $xr2 -+xvfcmp.sult.d $xr0, $xr1, $xr2 -+xvfcmp.cueq.d $xr0, $xr1, $xr2 -+xvfcmp.sueq.d $xr0, $xr1, $xr2 -+xvfcmp.cule.d $xr0, $xr1, $xr2 -+xvfcmp.sule.d $xr0, $xr1, $xr2 -+xvfcmp.cne.d $xr0, $xr1, $xr2 -+xvfcmp.sne.d $xr0, $xr1, $xr2 -+xvfcmp.cor.d $xr0, $xr1, $xr2 -+xvfcmp.sor.d $xr0, $xr1, $xr2 -+xvfcmp.cune.d $xr0, $xr1, $xr2 -+xvfcmp.sune.d $xr0, $xr1, $xr2 -+vld $vr0, $r1, 1 -+vst $vr0, $r1, 1 -+xvld $xr0, $r1, 1 -+xvst $xr0, $r1, 1 -+vldx $vr0, $r1, $r2 -+vstx $vr0, $r1, $r2 -+xvldx $xr0, $r1, $r2 -+xvstx $xr0, $r1, $r2 -+vldrepl.d $vr0, $r1, 1000 -+vldrepl.w $vr0, $r1, 100 -+vldrepl.h $vr0, $r1, 10 -+vldrepl.b $vr0, $r1, 1 -+vstelm.d $vr0, $r1, 1000, 1 -+vstelm.w $vr0, $r1, 100, 1 -+vstelm.h $vr0, $r1, 10, 1 -+vstelm.b $vr0, $r1, 1, 1 -+xvldrepl.d $xr0, $r1, 1000 -+xvldrepl.w $xr0, $r1, 100 -+xvldrepl.h $xr0, $r1, 10 -+xvldrepl.b $xr0, $r1, 1 -+xvstelm.d $xr0, $r1, 1000, 1 -+xvstelm.w $xr0, $r1, 100, 1 -+xvstelm.h $xr0, $r1, 10, 1 -+xvstelm.b $xr0, $r1, 1, 1 -+vseq.b $vr0, $vr1, $vr2 -+vseq.h $vr0, $vr1, $vr2 -+vseq.w $vr0, $vr1, $vr2 -+vseq.d $vr0, $vr1, $vr2 -+vsle.b $vr0, $vr1, $vr2 -+vsle.h $vr0, $vr1, $vr2 -+vsle.w $vr0, $vr1, $vr2 -+vsle.d $vr0, $vr1, $vr2 -+vsle.bu $vr0, $vr1, $vr2 -+vsle.hu $vr0, $vr1, $vr2 -+vsle.wu $vr0, $vr1, $vr2 -+vsle.du $vr0, $vr1, $vr2 -+vslt.b $vr0, $vr1, $vr2 -+vslt.h $vr0, $vr1, $vr2 -+vslt.w $vr0, $vr1, $vr2 -+vslt.d $vr0, $vr1, $vr2 -+vslt.bu $vr0, $vr1, $vr2 -+vslt.hu $vr0, $vr1, $vr2 -+vslt.wu $vr0, $vr1, $vr2 -+vslt.du $vr0, $vr1, $vr2 -+vadd.b $vr0, $vr1, $vr2 -+vadd.h $vr0, $vr1, $vr2 -+vadd.w $vr0, $vr1, $vr2 -+vadd.d $vr0, $vr1, $vr2 -+vsub.b $vr0, $vr1, $vr2 -+vsub.h $vr0, $vr1, $vr2 -+vsub.w $vr0, $vr1, $vr2 -+vsub.d $vr0, $vr1, $vr2 -+vsadd.b $vr0, $vr1, $vr2 -+vsadd.h $vr0, $vr1, $vr2 -+vsadd.w $vr0, $vr1, $vr2 -+vsadd.d $vr0, $vr1, $vr2 -+vssub.b $vr0, $vr1, $vr2 -+vssub.h $vr0, $vr1, $vr2 -+vssub.w $vr0, $vr1, $vr2 -+vssub.d $vr0, $vr1, $vr2 -+vsadd.bu $vr0, $vr1, $vr2 -+vsadd.hu $vr0, $vr1, $vr2 -+vsadd.wu $vr0, $vr1, $vr2 -+vsadd.du $vr0, $vr1, $vr2 -+vssub.bu $vr0, $vr1, $vr2 -+vssub.hu $vr0, $vr1, $vr2 -+vssub.wu $vr0, $vr1, $vr2 -+vssub.du $vr0, $vr1, $vr2 -+vhaddw.h.b $vr0, $vr1, $vr2 -+vhaddw.w.h $vr0, $vr1, $vr2 -+vhaddw.d.w $vr0, $vr1, $vr2 -+vhaddw.q.d $vr0, $vr1, $vr2 -+vhsubw.h.b $vr0, $vr1, $vr2 -+vhsubw.w.h $vr0, $vr1, $vr2 -+vhsubw.d.w $vr0, $vr1, $vr2 -+vhsubw.q.d $vr0, $vr1, $vr2 -+vhaddw.hu.bu $vr0, $vr1, $vr2 -+vhaddw.wu.hu $vr0, $vr1, $vr2 -+vhaddw.du.wu $vr0, $vr1, $vr2 -+vhaddw.qu.du $vr0, $vr1, $vr2 -+vhsubw.hu.bu $vr0, $vr1, $vr2 -+vhsubw.wu.hu $vr0, $vr1, $vr2 -+vhsubw.du.wu $vr0, $vr1, $vr2 -+vhsubw.qu.du $vr0, $vr1, $vr2 -+vadda.b $vr0, $vr1, $vr2 -+vadda.h $vr0, $vr1, $vr2 -+vadda.w $vr0, $vr1, $vr2 -+vadda.d $vr0, $vr1, $vr2 -+vabsd.b $vr0, $vr1, $vr2 -+vabsd.h $vr0, $vr1, $vr2 -+vabsd.w $vr0, $vr1, $vr2 -+vabsd.d $vr0, $vr1, $vr2 -+vabsd.bu $vr0, $vr1, $vr2 -+vabsd.hu $vr0, $vr1, $vr2 -+vabsd.wu $vr0, $vr1, $vr2 -+vabsd.du $vr0, $vr1, $vr2 -+vavg.b $vr0, $vr1, $vr2 -+vavg.h $vr0, $vr1, $vr2 -+vavg.w $vr0, $vr1, $vr2 -+vavg.d $vr0, $vr1, $vr2 -+vavg.bu $vr0, $vr1, $vr2 -+vavg.hu $vr0, $vr1, $vr2 -+vavg.wu $vr0, $vr1, $vr2 -+vavg.du $vr0, $vr1, $vr2 -+vavgr.b $vr0, $vr1, $vr2 -+vavgr.h $vr0, $vr1, $vr2 -+vavgr.w $vr0, $vr1, $vr2 -+vavgr.d $vr0, $vr1, $vr2 -+vavgr.bu $vr0, $vr1, $vr2 -+vavgr.hu $vr0, $vr1, $vr2 -+vavgr.wu $vr0, $vr1, $vr2 -+vavgr.du $vr0, $vr1, $vr2 -+vmax.b $vr0, $vr1, $vr2 -+vmax.h $vr0, $vr1, $vr2 -+vmax.w $vr0, $vr1, $vr2 -+vmax.d $vr0, $vr1, $vr2 -+vmin.b $vr0, $vr1, $vr2 -+vmin.h $vr0, $vr1, $vr2 -+vmin.w $vr0, $vr1, $vr2 -+vmin.d $vr0, $vr1, $vr2 -+vmax.bu $vr0, $vr1, $vr2 -+vmax.hu $vr0, $vr1, $vr2 -+vmax.wu $vr0, $vr1, $vr2 -+vmax.du $vr0, $vr1, $vr2 -+vmin.bu $vr0, $vr1, $vr2 -+vmin.hu $vr0, $vr1, $vr2 -+vmin.wu $vr0, $vr1, $vr2 -+vmin.du $vr0, $vr1, $vr2 -+vmul.b $vr0, $vr1, $vr2 -+vmul.h $vr0, $vr1, $vr2 -+vmul.w $vr0, $vr1, $vr2 -+vmul.d $vr0, $vr1, $vr2 -+vmuh.b $vr0, $vr1, $vr2 -+vmuh.h $vr0, $vr1, $vr2 -+vmuh.w $vr0, $vr1, $vr2 -+vmuh.d $vr0, $vr1, $vr2 -+vmuh.bu $vr0, $vr1, $vr2 -+vmuh.hu $vr0, $vr1, $vr2 -+vmuh.wu $vr0, $vr1, $vr2 -+vmuh.du $vr0, $vr1, $vr2 -+vmadd.b $vr0, $vr1, $vr2 -+vmadd.h $vr0, $vr1, $vr2 -+vmadd.w $vr0, $vr1, $vr2 -+vmadd.d $vr0, $vr1, $vr2 -+vmsub.b $vr0, $vr1, $vr2 -+vmsub.h $vr0, $vr1, $vr2 -+vmsub.w $vr0, $vr1, $vr2 -+vmsub.d $vr0, $vr1, $vr2 -+vdiv.b $vr0, $vr1, $vr2 -+vdiv.h $vr0, $vr1, $vr2 -+vdiv.w $vr0, $vr1, $vr2 -+vdiv.d $vr0, $vr1, $vr2 -+vmod.b $vr0, $vr1, $vr2 -+vmod.h $vr0, $vr1, $vr2 -+vmod.w $vr0, $vr1, $vr2 -+vmod.d $vr0, $vr1, $vr2 -+vdiv.bu $vr0, $vr1, $vr2 -+vdiv.hu $vr0, $vr1, $vr2 -+vdiv.wu $vr0, $vr1, $vr2 -+vdiv.du $vr0, $vr1, $vr2 -+vmod.bu $vr0, $vr1, $vr2 -+vmod.hu $vr0, $vr1, $vr2 -+vmod.wu $vr0, $vr1, $vr2 -+vmod.du $vr0, $vr1, $vr2 -+vsll.b $vr0, $vr1, $vr2 -+vsll.h $vr0, $vr1, $vr2 -+vsll.w $vr0, $vr1, $vr2 -+vsll.d $vr0, $vr1, $vr2 -+vsrl.b $vr0, $vr1, $vr2 -+vsrl.h $vr0, $vr1, $vr2 -+vsrl.w $vr0, $vr1, $vr2 -+vsrl.d $vr0, $vr1, $vr2 -+vsra.b $vr0, $vr1, $vr2 -+vsra.h $vr0, $vr1, $vr2 -+vsra.w $vr0, $vr1, $vr2 -+vsra.d $vr0, $vr1, $vr2 -+vrotr.b $vr0, $vr1, $vr2 -+vrotr.h $vr0, $vr1, $vr2 -+vrotr.w $vr0, $vr1, $vr2 -+vrotr.d $vr0, $vr1, $vr2 -+vsrlr.b $vr0, $vr1, $vr2 -+vsrlr.h $vr0, $vr1, $vr2 -+vsrlr.w $vr0, $vr1, $vr2 -+vsrlr.d $vr0, $vr1, $vr2 -+vsrar.b $vr0, $vr1, $vr2 -+vsrar.h $vr0, $vr1, $vr2 -+vsrar.w $vr0, $vr1, $vr2 -+vsrar.d $vr0, $vr1, $vr2 -+vsrln.b.h $vr0, $vr1, $vr2 -+vsrln.h.w $vr0, $vr1, $vr2 -+vsrln.w.d $vr0, $vr1, $vr2 -+vsran.b.h $vr0, $vr1, $vr2 -+vsran.h.w $vr0, $vr1, $vr2 -+vsran.w.d $vr0, $vr1, $vr2 -+vsrlrn.b.h $vr0, $vr1, $vr2 -+vsrlrn.h.w $vr0, $vr1, $vr2 -+vsrlrn.w.d $vr0, $vr1, $vr2 -+vsrarn.b.h $vr0, $vr1, $vr2 -+vsrarn.h.w $vr0, $vr1, $vr2 -+vsrarn.w.d $vr0, $vr1, $vr2 -+vssrln.b.h $vr0, $vr1, $vr2 -+vssrln.h.w $vr0, $vr1, $vr2 -+vssrln.w.d $vr0, $vr1, $vr2 -+vssran.b.h $vr0, $vr1, $vr2 -+vssran.h.w $vr0, $vr1, $vr2 -+vssran.w.d $vr0, $vr1, $vr2 -+vssrlrn.b.h $vr0, $vr1, $vr2 -+vssrlrn.h.w $vr0, $vr1, $vr2 -+vssrlrn.w.d $vr0, $vr1, $vr2 -+vssrarn.b.h $vr0, $vr1, $vr2 -+vssrarn.h.w $vr0, $vr1, $vr2 -+vssrarn.w.d $vr0, $vr1, $vr2 -+vssrln.bu.h $vr0, $vr1, $vr2 -+vssrln.hu.w $vr0, $vr1, $vr2 -+vssrln.wu.d $vr0, $vr1, $vr2 -+vssran.bu.h $vr0, $vr1, $vr2 -+vssran.hu.w $vr0, $vr1, $vr2 -+vssran.wu.d $vr0, $vr1, $vr2 -+vssrlrn.bu.h $vr0, $vr1, $vr2 -+vssrlrn.hu.w $vr0, $vr1, $vr2 -+vssrlrn.wu.d $vr0, $vr1, $vr2 -+vssrarn.bu.h $vr0, $vr1, $vr2 -+vssrarn.hu.w $vr0, $vr1, $vr2 -+vssrarn.wu.d $vr0, $vr1, $vr2 -+vbitclr.b $vr0, $vr1, $vr2 -+vbitclr.h $vr0, $vr1, $vr2 -+vbitclr.w $vr0, $vr1, $vr2 -+vbitclr.d $vr0, $vr1, $vr2 -+vbitset.b $vr0, $vr1, $vr2 -+vbitset.h $vr0, $vr1, $vr2 -+vbitset.w $vr0, $vr1, $vr2 -+vbitset.d $vr0, $vr1, $vr2 -+vbitrev.b $vr0, $vr1, $vr2 -+vbitrev.h $vr0, $vr1, $vr2 -+vbitrev.w $vr0, $vr1, $vr2 -+vbitrev.d $vr0, $vr1, $vr2 -+vpackev.b $vr0, $vr1, $vr2 -+vpackev.h $vr0, $vr1, $vr2 -+vpackev.w $vr0, $vr1, $vr2 -+vpackev.d $vr0, $vr1, $vr2 -+vpackod.b $vr0, $vr1, $vr2 -+vpackod.h $vr0, $vr1, $vr2 -+vpackod.w $vr0, $vr1, $vr2 -+vpackod.d $vr0, $vr1, $vr2 -+vilvl.b $vr0, $vr1, $vr2 -+vilvl.h $vr0, $vr1, $vr2 -+vilvl.w $vr0, $vr1, $vr2 -+vilvl.d $vr0, $vr1, $vr2 -+vilvh.b $vr0, $vr1, $vr2 -+vilvh.h $vr0, $vr1, $vr2 -+vilvh.w $vr0, $vr1, $vr2 -+vilvh.d $vr0, $vr1, $vr2 -+vpickev.b $vr0, $vr1, $vr2 -+vpickev.h $vr0, $vr1, $vr2 -+vpickev.w $vr0, $vr1, $vr2 -+vpickev.d $vr0, $vr1, $vr2 -+vpickod.b $vr0, $vr1, $vr2 -+vpickod.h $vr0, $vr1, $vr2 -+vpickod.w $vr0, $vr1, $vr2 -+vpickod.d $vr0, $vr1, $vr2 -+vreplve.b $vr0, $vr1, $r2 -+vreplve.h $vr0, $vr1, $r2 -+vreplve.w $vr0, $vr1, $r2 -+vreplve.d $vr0, $vr1, $r2 -+vand.v $vr0, $vr1, $vr2 -+vor.v $vr0, $vr1, $vr2 -+vxor.v $vr0, $vr1, $vr2 -+vnor.v $vr0, $vr1, $vr2 -+vandn.v $vr0, $vr1, $vr2 -+vorn.v $vr0, $vr1, $vr2 -+vfrstp.b $vr0, $vr1, $vr2 -+vfrstp.h $vr0, $vr1, $vr2 -+vadd.q $vr0, $vr1, $vr2 -+vsub.q $vr0, $vr1, $vr2 -+vsigncov.b $vr0, $vr1, $vr2 -+vsigncov.h $vr0, $vr1, $vr2 -+vsigncov.w $vr0, $vr1, $vr2 -+vsigncov.d $vr0, $vr1, $vr2 -+vfadd.s $vr0, $vr1, $vr2 -+vfadd.d $vr0, $vr1, $vr2 -+vfsub.s $vr0, $vr1, $vr2 -+vfsub.d $vr0, $vr1, $vr2 -+vfmul.s $vr0, $vr1, $vr2 -+vfmul.d $vr0, $vr1, $vr2 -+vfdiv.s $vr0, $vr1, $vr2 -+vfdiv.d $vr0, $vr1, $vr2 -+vfmax.s $vr0, $vr1, $vr2 -+vfmax.d $vr0, $vr1, $vr2 -+vfmin.s $vr0, $vr1, $vr2 -+vfmin.d $vr0, $vr1, $vr2 -+vfmaxa.s $vr0, $vr1, $vr2 -+vfmaxa.d $vr0, $vr1, $vr2 -+vfmina.s $vr0, $vr1, $vr2 -+vfmina.d $vr0, $vr1, $vr2 -+vfcvt.h.s $vr0, $vr1, $vr2 -+vfcvt.s.d $vr0, $vr1, $vr2 -+vffint.s.l $vr0, $vr1, $vr2 -+vftint.w.d $vr0, $vr1, $vr2 -+vftintrm.w.d $vr0, $vr1, $vr2 -+vftintrp.w.d $vr0, $vr1, $vr2 -+vftintrz.w.d $vr0, $vr1, $vr2 -+vftintrne.w.d $vr0, $vr1, $vr2 -+vshuf.h $vr0, $vr1, $vr2 -+vshuf.w $vr0, $vr1, $vr2 -+vshuf.d $vr0, $vr1, $vr2 -+vseqi.b $vr0, $vr1, 1 -+vseqi.h $vr0, $vr1, 1 -+vseqi.w $vr0, $vr1, 1 -+vseqi.d $vr0, $vr1, 1 -+vslei.b $vr0, $vr1, 1 -+vslei.h $vr0, $vr1, 1 -+vslei.w $vr0, $vr1, 1 -+vslei.d $vr0, $vr1, 1 -+vslei.bu $vr0, $vr1, 1 -+vslei.hu $vr0, $vr1, 1 -+vslei.wu $vr0, $vr1, 1 -+vslei.du $vr0, $vr1, 1 -+vslti.b $vr0, $vr1, 1 -+vslti.h $vr0, $vr1, 1 -+vslti.w $vr0, $vr1, 1 -+vslti.d $vr0, $vr1, 1 -+vslti.bu $vr0, $vr1, 1 -+vslti.hu $vr0, $vr1, 1 -+vslti.wu $vr0, $vr1, 1 -+vslti.du $vr0, $vr1, 1 -+vaddi.bu $vr0, $vr1, 1 -+vaddi.hu $vr0, $vr1, 1 -+vaddi.wu $vr0, $vr1, 1 -+vaddi.du $vr0, $vr1, 1 -+vsubi.bu $vr0, $vr1, 1 -+vsubi.hu $vr0, $vr1, 1 -+vsubi.wu $vr0, $vr1, 1 -+vsubi.du $vr0, $vr1, 1 -+vbsll.v $vr0, $vr1, 1 -+vbsrl.v $vr0, $vr1, 1 -+vmaxi.b $vr0, $vr1, 1 -+vmaxi.h $vr0, $vr1, 1 -+vmaxi.w $vr0, $vr1, 1 -+vmaxi.d $vr0, $vr1, 1 -+vmini.b $vr0, $vr1, 1 -+vmini.h $vr0, $vr1, 1 -+vmini.w $vr0, $vr1, 1 -+vmini.d $vr0, $vr1, 1 -+vmaxi.bu $vr0, $vr1, 1 -+vmaxi.hu $vr0, $vr1, 1 -+vmaxi.wu $vr0, $vr1, 1 -+vmaxi.du $vr0, $vr1, 1 -+vmini.bu $vr0, $vr1, 1 -+vmini.hu $vr0, $vr1, 1 -+vmini.wu $vr0, $vr1, 1 -+vmini.du $vr0, $vr1, 1 -+vfrstpi.b $vr0, $vr1, 1 -+vfrstpi.h $vr0, $vr1, 1 -+vclo.b $vr0, $vr1 -+vclo.h $vr0, $vr1 -+vclo.w $vr0, $vr1 -+vclo.d $vr0, $vr1 -+vclz.b $vr0, $vr1 -+vclz.h $vr0, $vr1 -+vclz.w $vr0, $vr1 -+vclz.d $vr0, $vr1 -+vpcnt.b $vr0, $vr1 -+vpcnt.h $vr0, $vr1 -+vpcnt.w $vr0, $vr1 -+vpcnt.d $vr0, $vr1 -+vneg.b $vr0, $vr1 -+vneg.h $vr0, $vr1 -+vneg.w $vr0, $vr1 -+vneg.d $vr0, $vr1 -+vmskltz.b $vr0, $vr1 -+vmskltz.h $vr0, $vr1 -+vmskltz.w $vr0, $vr1 -+vmskltz.d $vr0, $vr1 -+vmskgez.b $vr0, $vr1 -+vmsknz.b $vr0, $vr1 -+vseteqz.v $fcc0, $vr1 -+vsetnez.v $fcc0, $vr1 -+vsetanyeqz.b $fcc0, $vr1 -+vsetanyeqz.h $fcc0, $vr1 -+vsetanyeqz.w $fcc0, $vr1 -+vsetanyeqz.d $fcc0, $vr1 -+vsetallnez.b $fcc0, $vr1 -+vsetallnez.h $fcc0, $vr1 -+vsetallnez.w $fcc0, $vr1 -+vsetallnez.d $fcc0, $vr1 -+vflogb.s $vr0, $vr1 -+vflogb.d $vr0, $vr1 -+vfclass.s $vr0, $vr1 -+vfclass.d $vr0, $vr1 -+vfsqrt.s $vr0, $vr1 -+vfsqrt.d $vr0, $vr1 -+vfrecip.s $vr0, $vr1 -+vfrecip.d $vr0, $vr1 -+vfrsqrt.s $vr0, $vr1 -+vfrsqrt.d $vr0, $vr1 -+vfrint.s $vr0, $vr1 -+vfrint.d $vr0, $vr1 -+vfrintrm.s $vr0, $vr1 -+vfrintrm.d $vr0, $vr1 -+vfrintrp.s $vr0, $vr1 -+vfrintrp.d $vr0, $vr1 -+vfrintrz.s $vr0, $vr1 -+vfrintrz.d $vr0, $vr1 -+vfrintrne.s $vr0, $vr1 -+vfrintrne.d $vr0, $vr1 -+vfcvtl.s.h $vr0, $vr1 -+vfcvth.s.h $vr0, $vr1 -+vfcvtl.d.s $vr0, $vr1 -+vfcvth.d.s $vr0, $vr1 -+vffint.s.w $vr0, $vr1 -+vffint.s.wu $vr0, $vr1 -+vffint.d.l $vr0, $vr1 -+vffint.d.lu $vr0, $vr1 -+vffintl.d.w $vr0, $vr1 -+vffinth.d.w $vr0, $vr1 -+vftint.w.s $vr0, $vr1 -+vftint.l.d $vr0, $vr1 -+vftintrm.w.s $vr0, $vr1 -+vftintrm.l.d $vr0, $vr1 -+vftintrp.w.s $vr0, $vr1 -+vftintrp.l.d $vr0, $vr1 -+vftintrz.w.s $vr0, $vr1 -+vftintrz.l.d $vr0, $vr1 -+vftintrne.w.s $vr0, $vr1 -+vftintrne.l.d $vr0, $vr1 -+vftint.wu.s $vr0, $vr1 -+vftint.lu.d $vr0, $vr1 -+vftintrz.wu.s $vr0, $vr1 -+vftintrz.lu.d $vr0, $vr1 -+vftintl.l.s $vr0, $vr1 -+vftinth.l.s $vr0, $vr1 -+vftintrml.l.s $vr0, $vr1 -+vftintrmh.l.s $vr0, $vr1 -+vftintrpl.l.s $vr0, $vr1 -+vftintrph.l.s $vr0, $vr1 -+vftintrzl.l.s $vr0, $vr1 -+vftintrzh.l.s $vr0, $vr1 -+vftintrnel.l.s $vr0, $vr1 -+vftintrneh.l.s $vr0, $vr1 -+vexth.h.b $vr0, $vr1 -+vexth.w.h $vr0, $vr1 -+vexth.d.w $vr0, $vr1 -+vexth.q.d $vr0, $vr1 -+vexth.hu.bu $vr0, $vr1 -+vexth.wu.hu $vr0, $vr1 -+vexth.du.wu $vr0, $vr1 -+vexth.qu.du $vr0, $vr1 -+vreplgr2vr.b $vr0, $r1 -+vreplgr2vr.h $vr0, $r1 -+vreplgr2vr.w $vr0, $r1 -+vreplgr2vr.d $vr0, $r1 -+vrotri.b $vr0, $vr1, 1 -+vrotri.h $vr0, $vr1, 1 -+vrotri.w $vr0, $vr1, 1 -+vrotri.d $vr0, $vr1, 1 -+vsrlri.b $vr0, $vr1, 1 -+vsrlri.h $vr0, $vr1, 1 -+vsrlri.w $vr0, $vr1, 1 -+vsrlri.d $vr0, $vr1, 1 -+vsrari.b $vr0, $vr1, 1 -+vsrari.h $vr0, $vr1, 1 -+vsrari.w $vr0, $vr1, 1 -+vsrari.d $vr0, $vr1, 1 -+vinsgr2vr.b $vr0, $r1, 1 -+vinsgr2vr.h $vr0, $r1, 1 -+vinsgr2vr.w $vr0, $r1, 1 -+vinsgr2vr.d $vr0, $r1, 1 -+vpickve2gr.b $r0, $vr1, 1 -+vpickve2gr.h $r0, $vr1, 1 -+vpickve2gr.w $r0, $vr1, 1 -+vpickve2gr.d $r0, $vr1, 1 -+vpickve2gr.bu $r0, $vr1, 1 -+vpickve2gr.hu $r0, $vr1, 1 -+vpickve2gr.wu $r0, $vr1, 1 -+vpickve2gr.du $r0, $vr1, 1 -+vreplvei.b $vr0, $vr1, 1 -+vreplvei.h $vr0, $vr1, 1 -+vreplvei.w $vr0, $vr1, 1 -+vreplvei.d $vr0, $vr1, 1 -+vsllwil.h.b $vr0, $vr1, 1 -+vsllwil.w.h $vr0, $vr1, 1 -+vsllwil.d.w $vr0, $vr1, 1 -+vextl.q.d $vr0, $vr1 -+vsllwil.hu.bu $vr0, $vr1, 1 -+vsllwil.wu.hu $vr0, $vr1, 1 -+vsllwil.du.wu $vr0, $vr1, 1 -+vextl.qu.du $vr0, $vr1 -+vbitclri.b $vr0, $vr1, 1 -+vbitclri.h $vr0, $vr1, 1 -+vbitclri.w $vr0, $vr1, 1 -+vbitclri.d $vr0, $vr1, 1 -+vbitseti.b $vr0, $vr1, 1 -+vbitseti.h $vr0, $vr1, 1 -+vbitseti.w $vr0, $vr1, 1 -+vbitseti.d $vr0, $vr1, 1 -+vbitrevi.b $vr0, $vr1, 1 -+vbitrevi.h $vr0, $vr1, 1 -+vbitrevi.w $vr0, $vr1, 1 -+vbitrevi.d $vr0, $vr1, 1 -+vsat.b $vr0, $vr1, 1 -+vsat.h $vr0, $vr1, 1 -+vsat.w $vr0, $vr1, 1 -+vsat.d $vr0, $vr1, 1 -+vsat.bu $vr0, $vr1, 1 -+vsat.hu $vr0, $vr1, 1 -+vsat.wu $vr0, $vr1, 1 -+vsat.du $vr0, $vr1, 1 -+vslli.b $vr0, $vr1, 1 -+vslli.h $vr0, $vr1, 1 -+vslli.w $vr0, $vr1, 1 -+vslli.d $vr0, $vr1, 1 -+vsrli.b $vr0, $vr1, 1 -+vsrli.h $vr0, $vr1, 1 -+vsrli.w $vr0, $vr1, 1 -+vsrli.d $vr0, $vr1, 1 -+vsrai.b $vr0, $vr1, 1 -+vsrai.h $vr0, $vr1, 1 -+vsrai.w $vr0, $vr1, 1 -+vsrai.d $vr0, $vr1, 1 -+vsrlni.b.h $vr0, $vr1, 1 -+vsrlni.h.w $vr0, $vr1, 1 -+vsrlni.w.d $vr0, $vr1, 1 -+vsrlni.d.q $vr0, $vr1, 1 -+vssrlni.b.h $vr0, $vr1, 1 -+vssrlni.h.w $vr0, $vr1, 1 -+vssrlni.w.d $vr0, $vr1, 1 -+vssrlni.d.q $vr0, $vr1, 1 -+vsrlrni.b.h $vr0, $vr1, 1 -+vsrlrni.h.w $vr0, $vr1, 1 -+vsrlrni.w.d $vr0, $vr1, 1 -+vsrlrni.d.q $vr0, $vr1, 1 -+vssrlni.bu.h $vr0, $vr1, 1 -+vssrlni.hu.w $vr0, $vr1, 1 -+vssrlni.wu.d $vr0, $vr1, 1 -+vssrlni.du.q $vr0, $vr1, 1 -+vssrlrni.b.h $vr0, $vr1, 1 -+vssrlrni.h.w $vr0, $vr1, 1 -+vssrlrni.w.d $vr0, $vr1, 1 -+vssrlrni.d.q $vr0, $vr1, 1 -+vssrlrni.bu.h $vr0, $vr1, 1 -+vssrlrni.hu.w $vr0, $vr1, 1 -+vssrlrni.wu.d $vr0, $vr1, 1 -+vssrlrni.du.q $vr0, $vr1, 1 -+vsrani.b.h $vr0, $vr1, 1 -+vsrani.h.w $vr0, $vr1, 1 -+vsrani.w.d $vr0, $vr1, 1 -+vsrani.d.q $vr0, $vr1, 1 -+vsrarni.b.h $vr0, $vr1, 1 -+vsrarni.h.w $vr0, $vr1, 1 -+vsrarni.w.d $vr0, $vr1, 1 -+vsrarni.d.q $vr0, $vr1, 1 -+vssrani.b.h $vr0, $vr1, 1 -+vssrani.h.w $vr0, $vr1, 1 -+vssrani.w.d $vr0, $vr1, 1 -+vssrani.d.q $vr0, $vr1, 1 -+vssrani.bu.h $vr0, $vr1, 1 -+vssrani.hu.w $vr0, $vr1, 1 -+vssrani.wu.d $vr0, $vr1, 1 -+vssrani.du.q $vr0, $vr1, 1 -+vssrarni.b.h $vr0, $vr1, 1 -+vssrarni.h.w $vr0, $vr1, 1 -+vssrarni.w.d $vr0, $vr1, 1 -+vssrarni.d.q $vr0, $vr1, 1 -+vssrarni.bu.h $vr0, $vr1, 1 -+vssrarni.hu.w $vr0, $vr1, 1 -+vssrarni.wu.d $vr0, $vr1, 1 -+vssrarni.du.q $vr0, $vr1, 1 -+vextrins.d $vr0, $vr1, 1 -+vextrins.w $vr0, $vr1, 1 -+vextrins.h $vr0, $vr1, 1 -+vextrins.b $vr0, $vr1, 1 -+vshuf4i.b $vr0, $vr1, 1 -+vshuf4i.h $vr0, $vr1, 1 -+vshuf4i.w $vr0, $vr1, 1 -+vshuf4i.d $vr0, $vr1, 1 -+vbitseli.b $vr0, $vr1, 1 -+vandi.b $vr0, $vr1, 1 -+vori.b $vr0, $vr1, 1 -+vxori.b $vr0, $vr1, 1 -+vnori.b $vr0, $vr1, 1 -+vrepli.b $vr0, 1 -+vaddwev.h.b $vr0, $vr1, $vr2 -+vaddwev.w.h $vr0, $vr1, $vr2 -+vaddwev.d.w $vr0, $vr1, $vr2 -+vaddwev.q.d $vr0, $vr1, $vr2 -+vaddwev.h.bu $vr0, $vr1, $vr2 -+vaddwev.w.hu $vr0, $vr1, $vr2 -+vaddwev.d.wu $vr0, $vr1, $vr2 -+vaddwev.q.du $vr0, $vr1, $vr2 -+vaddwev.h.bu.b $vr0, $vr1, $vr2 -+vaddwev.w.hu.h $vr0, $vr1, $vr2 -+vaddwev.d.wu.w $vr0, $vr1, $vr2 -+vaddwev.q.du.d $vr0, $vr1, $vr2 -+vaddwod.h.b $vr0, $vr1, $vr2 -+vaddwod.w.h $vr0, $vr1, $vr2 -+vaddwod.d.w $vr0, $vr1, $vr2 -+vaddwod.q.d $vr0, $vr1, $vr2 -+vaddwod.h.bu $vr0, $vr1, $vr2 -+vaddwod.w.hu $vr0, $vr1, $vr2 -+vaddwod.d.wu $vr0, $vr1, $vr2 -+vaddwod.q.du $vr0, $vr1, $vr2 -+vaddwod.h.bu.b $vr0, $vr1, $vr2 -+vaddwod.w.hu.h $vr0, $vr1, $vr2 -+vaddwod.d.wu.w $vr0, $vr1, $vr2 -+vaddwod.q.du.d $vr0, $vr1, $vr2 -+vmaddwev.h.b $vr0, $vr1, $vr2 -+vmaddwev.w.h $vr0, $vr1, $vr2 -+vmaddwev.d.w $vr0, $vr1, $vr2 -+vmaddwev.q.d $vr0, $vr1, $vr2 -+vmaddwev.h.bu $vr0, $vr1, $vr2 -+vmaddwev.w.hu $vr0, $vr1, $vr2 -+vmaddwev.d.wu $vr0, $vr1, $vr2 -+vmaddwev.q.du $vr0, $vr1, $vr2 -+vmaddwev.h.bu.b $vr0, $vr1, $vr2 -+vmaddwev.w.hu.h $vr0, $vr1, $vr2 -+vmaddwev.d.wu.w $vr0, $vr1, $vr2 -+vmaddwev.q.du.d $vr0, $vr1, $vr2 -+vmaddwod.h.b $vr0, $vr1, $vr2 -+vmaddwod.w.h $vr0, $vr1, $vr2 -+vmaddwod.d.w $vr0, $vr1, $vr2 -+vmaddwod.q.d $vr0, $vr1, $vr2 -+vmaddwod.h.bu $vr0, $vr1, $vr2 -+vmaddwod.w.hu $vr0, $vr1, $vr2 -+vmaddwod.d.wu $vr0, $vr1, $vr2 -+vmaddwod.q.du $vr0, $vr1, $vr2 -+vmaddwod.h.bu.b $vr0, $vr1, $vr2 -+vmaddwod.w.hu.h $vr0, $vr1, $vr2 -+vmaddwod.d.wu.w $vr0, $vr1, $vr2 -+vmaddwod.q.du.d $vr0, $vr1, $vr2 -+vmulwev.h.b $vr0, $vr1, $vr2 -+vmulwev.w.h $vr0, $vr1, $vr2 -+vmulwev.d.w $vr0, $vr1, $vr2 -+vmulwev.q.d $vr0, $vr1, $vr2 -+vmulwev.h.bu $vr0, $vr1, $vr2 -+vmulwev.w.hu $vr0, $vr1, $vr2 -+vmulwev.d.wu $vr0, $vr1, $vr2 -+vmulwev.q.du $vr0, $vr1, $vr2 -+vmulwev.h.bu.b $vr0, $vr1, $vr2 -+vmulwev.w.hu.h $vr0, $vr1, $vr2 -+vmulwev.d.wu.w $vr0, $vr1, $vr2 -+vmulwev.q.du.d $vr0, $vr1, $vr2 -+vmulwod.h.b $vr0, $vr1, $vr2 -+vmulwod.w.h $vr0, $vr1, $vr2 -+vmulwod.d.w $vr0, $vr1, $vr2 -+vmulwod.q.d $vr0, $vr1, $vr2 -+vmulwod.h.bu $vr0, $vr1, $vr2 -+vmulwod.w.hu $vr0, $vr1, $vr2 -+vmulwod.d.wu $vr0, $vr1, $vr2 -+vmulwod.q.du $vr0, $vr1, $vr2 -+vmulwod.h.bu.b $vr0, $vr1, $vr2 -+vmulwod.w.hu.h $vr0, $vr1, $vr2 -+vmulwod.d.wu.w $vr0, $vr1, $vr2 -+vmulwod.q.du.d $vr0, $vr1, $vr2 -+vsubwev.h.b $vr0, $vr1, $vr2 -+vsubwev.w.h $vr0, $vr1, $vr2 -+vsubwev.d.w $vr0, $vr1, $vr2 -+vsubwev.q.d $vr0, $vr1, $vr2 -+vsubwev.h.bu $vr0, $vr1, $vr2 -+vsubwev.w.hu $vr0, $vr1, $vr2 -+vsubwev.d.wu $vr0, $vr1, $vr2 -+vsubwev.q.du $vr0, $vr1, $vr2 -+vsubwod.h.b $vr0, $vr1, $vr2 -+vsubwod.w.h $vr0, $vr1, $vr2 -+vsubwod.d.w $vr0, $vr1, $vr2 -+vsubwod.q.d $vr0, $vr1, $vr2 -+vsubwod.h.bu $vr0, $vr1, $vr2 -+vsubwod.w.hu $vr0, $vr1, $vr2 -+vsubwod.d.wu $vr0, $vr1, $vr2 -+vsubwod.q.du $vr0, $vr1, $vr2 -+vrepli.d $vr0, 1 -+vrepli.h $vr0, 1 -+vrepli.w $vr0, 1 -+vldi $vr0, 1 -+vpermi.w $vr0, $vr1, 1 -+xvseq.b $xr0, $xr1, $xr2 -+xvseq.h $xr0, $xr1, $xr2 -+xvseq.w $xr0, $xr1, $xr2 -+xvseq.d $xr0, $xr1, $xr2 -+xvsle.b $xr0, $xr1, $xr2 -+xvsle.h $xr0, $xr1, $xr2 -+xvsle.w $xr0, $xr1, $xr2 -+xvsle.d $xr0, $xr1, $xr2 -+xvsle.bu $xr0, $xr1, $xr2 -+xvsle.hu $xr0, $xr1, $xr2 -+xvsle.wu $xr0, $xr1, $xr2 -+xvsle.du $xr0, $xr1, $xr2 -+xvslt.b $xr0, $xr1, $xr2 -+xvslt.h $xr0, $xr1, $xr2 -+xvslt.w $xr0, $xr1, $xr2 -+xvslt.d $xr0, $xr1, $xr2 -+xvslt.bu $xr0, $xr1, $xr2 -+xvslt.hu $xr0, $xr1, $xr2 -+xvslt.wu $xr0, $xr1, $xr2 -+xvslt.du $xr0, $xr1, $xr2 -+xvadd.b $xr0, $xr1, $xr2 -+xvadd.h $xr0, $xr1, $xr2 -+xvadd.w $xr0, $xr1, $xr2 -+xvadd.d $xr0, $xr1, $xr2 -+xvsub.b $xr0, $xr1, $xr2 -+xvsub.h $xr0, $xr1, $xr2 -+xvsub.w $xr0, $xr1, $xr2 -+xvsub.d $xr0, $xr1, $xr2 -+xvsadd.b $xr0, $xr1, $xr2 -+xvsadd.h $xr0, $xr1, $xr2 -+xvsadd.w $xr0, $xr1, $xr2 -+xvsadd.d $xr0, $xr1, $xr2 -+xvssub.b $xr0, $xr1, $xr2 -+xvssub.h $xr0, $xr1, $xr2 -+xvssub.w $xr0, $xr1, $xr2 -+xvssub.d $xr0, $xr1, $xr2 -+xvsadd.bu $xr0, $xr1, $xr2 -+xvsadd.hu $xr0, $xr1, $xr2 -+xvsadd.wu $xr0, $xr1, $xr2 -+xvsadd.du $xr0, $xr1, $xr2 -+xvssub.bu $xr0, $xr1, $xr2 -+xvssub.hu $xr0, $xr1, $xr2 -+xvssub.wu $xr0, $xr1, $xr2 -+xvssub.du $xr0, $xr1, $xr2 -+xvhaddw.h.b $xr0, $xr1, $xr2 -+xvhaddw.w.h $xr0, $xr1, $xr2 -+xvhaddw.d.w $xr0, $xr1, $xr2 -+xvhaddw.q.d $xr0, $xr1, $xr2 -+xvhsubw.h.b $xr0, $xr1, $xr2 -+xvhsubw.w.h $xr0, $xr1, $xr2 -+xvhsubw.d.w $xr0, $xr1, $xr2 -+xvhsubw.q.d $xr0, $xr1, $xr2 -+xvhaddw.hu.bu $xr0, $xr1, $xr2 -+xvhaddw.wu.hu $xr0, $xr1, $xr2 -+xvhaddw.du.wu $xr0, $xr1, $xr2 -+xvhaddw.qu.du $xr0, $xr1, $xr2 -+xvhsubw.hu.bu $xr0, $xr1, $xr2 -+xvhsubw.wu.hu $xr0, $xr1, $xr2 -+xvhsubw.du.wu $xr0, $xr1, $xr2 -+xvhsubw.qu.du $xr0, $xr1, $xr2 -+xvaddwev.h.b $xr0, $xr1, $xr2 -+xvaddwev.w.h $xr0, $xr1, $xr2 -+xvaddwev.d.w $xr0, $xr1, $xr2 -+xvaddwev.q.d $xr0, $xr1, $xr2 -+xvaddwev.h.bu $xr0, $xr1, $xr2 -+xvaddwev.w.hu $xr0, $xr1, $xr2 -+xvaddwev.d.wu $xr0, $xr1, $xr2 -+xvaddwev.q.du $xr0, $xr1, $xr2 -+xvaddwev.h.bu.b $xr0, $xr1, $xr2 -+xvaddwev.w.hu.h $xr0, $xr1, $xr2 -+xvaddwev.d.wu.w $xr0, $xr1, $xr2 -+xvaddwev.q.du.d $xr0, $xr1, $xr2 -+xvaddwod.h.b $xr0, $xr1, $xr2 -+xvaddwod.w.h $xr0, $xr1, $xr2 -+xvaddwod.d.w $xr0, $xr1, $xr2 -+xvaddwod.q.d $xr0, $xr1, $xr2 -+xvaddwod.h.bu $xr0, $xr1, $xr2 -+xvaddwod.w.hu $xr0, $xr1, $xr2 -+xvaddwod.d.wu $xr0, $xr1, $xr2 -+xvaddwod.q.du $xr0, $xr1, $xr2 -+xvaddwod.h.bu.b $xr0, $xr1, $xr2 -+xvaddwod.w.hu.h $xr0, $xr1, $xr2 -+xvaddwod.d.wu.w $xr0, $xr1, $xr2 -+xvaddwod.q.du.d $xr0, $xr1, $xr2 -+xvmaddwev.h.b $xr0, $xr1, $xr2 -+xvmaddwev.w.h $xr0, $xr1, $xr2 -+xvmaddwev.d.w $xr0, $xr1, $xr2 -+xvmaddwev.q.d $xr0, $xr1, $xr2 -+xvmaddwev.h.bu.b $xr0, $xr1, $xr2 -+xvmaddwev.w.hu.h $xr0, $xr1, $xr2 -+xvmaddwev.d.wu.w $xr0, $xr1, $xr2 -+xvmaddwev.q.du.d $xr0, $xr1, $xr2 -+xvmaddwev.h.bu $xr0, $xr1, $xr2 -+xvmaddwev.w.hu $xr0, $xr1, $xr2 -+xvmaddwev.d.wu $xr0, $xr1, $xr2 -+xvmaddwev.q.du $xr0, $xr1, $xr2 -+xvmaddwod.h.b $xr0, $xr1, $xr2 -+xvmaddwod.w.h $xr0, $xr1, $xr2 -+xvmaddwod.d.w $xr0, $xr1, $xr2 -+xvmaddwod.q.d $xr0, $xr1, $xr2 -+xvmaddwod.h.bu $xr0, $xr1, $xr2 -+xvmaddwod.w.hu $xr0, $xr1, $xr2 -+xvmaddwod.d.wu $xr0, $xr1, $xr2 -+xvmaddwod.q.du $xr0, $xr1, $xr2 -+xvmaddwod.h.bu.b $xr0, $xr1, $xr2 -+xvmaddwod.w.hu.h $xr0, $xr1, $xr2 -+xvmaddwod.d.wu.w $xr0, $xr1, $xr2 -+xvmaddwod.q.du.d $xr0, $xr1, $xr2 -+xvmulwev.h.b $xr0, $xr1, $xr2 -+xvmulwev.w.h $xr0, $xr1, $xr2 -+xvmulwev.d.w $xr0, $xr1, $xr2 -+xvmulwev.q.d $xr0, $xr1, $xr2 -+xvmulwev.h.bu $xr0, $xr1, $xr2 -+xvmulwev.w.hu $xr0, $xr1, $xr2 -+xvmulwev.d.wu $xr0, $xr1, $xr2 -+xvmulwev.q.du $xr0, $xr1, $xr2 -+xvmulwev.h.bu.b $xr0, $xr1, $xr2 -+xvmulwev.w.hu.h $xr0, $xr1, $xr2 -+xvmulwev.d.wu.w $xr0, $xr1, $xr2 -+xvmulwev.q.du.d $xr0, $xr1, $xr2 -+xvmulwod.h.b $xr0, $xr1, $xr2 -+xvmulwod.w.h $xr0, $xr1, $xr2 -+xvmulwod.d.w $xr0, $xr1, $xr2 -+xvmulwod.q.d $xr0, $xr1, $xr2 -+xvmulwod.h.bu $xr0, $xr1, $xr2 -+xvmulwod.w.hu $xr0, $xr1, $xr2 -+xvmulwod.d.wu $xr0, $xr1, $xr2 -+xvmulwod.q.du $xr0, $xr1, $xr2 -+xvmulwod.h.bu.b $xr0, $xr1, $xr2 -+xvmulwod.w.hu.h $xr0, $xr1, $xr2 -+xvmulwod.d.wu.w $xr0, $xr1, $xr2 -+xvmulwod.q.du.d $xr0, $xr1, $xr2 -+xvsubwev.h.b $xr0, $xr1, $xr2 -+xvsubwev.w.h $xr0, $xr1, $xr2 -+xvsubwev.d.w $xr0, $xr1, $xr2 -+xvsubwev.q.d $xr0, $xr1, $xr2 -+xvsubwev.h.bu $xr0, $xr1, $xr2 -+xvsubwev.w.hu $xr0, $xr1, $xr2 -+xvsubwev.d.wu $xr0, $xr1, $xr2 -+xvsubwev.q.du $xr0, $xr1, $xr2 -+xvsubwod.h.b $xr0, $xr1, $xr2 -+xvsubwod.w.h $xr0, $xr1, $xr2 -+xvsubwod.d.w $xr0, $xr1, $xr2 -+xvsubwod.q.d $xr0, $xr1, $xr2 -+xvsubwod.h.bu $xr0, $xr1, $xr2 -+xvsubwod.w.hu $xr0, $xr1, $xr2 -+xvsubwod.d.wu $xr0, $xr1, $xr2 -+xvsubwod.q.du $xr0, $xr1, $xr2 -+xvadda.b $xr0, $xr1, $xr2 -+xvadda.h $xr0, $xr1, $xr2 -+xvadda.w $xr0, $xr1, $xr2 -+xvadda.d $xr0, $xr1, $xr2 -+xvabsd.b $xr0, $xr1, $xr2 -+xvabsd.h $xr0, $xr1, $xr2 -+xvabsd.w $xr0, $xr1, $xr2 -+xvabsd.d $xr0, $xr1, $xr2 -+xvabsd.bu $xr0, $xr1, $xr2 -+xvabsd.hu $xr0, $xr1, $xr2 -+xvabsd.wu $xr0, $xr1, $xr2 -+xvabsd.du $xr0, $xr1, $xr2 -+xvavg.b $xr0, $xr1, $xr2 -+xvavg.h $xr0, $xr1, $xr2 -+xvavg.w $xr0, $xr1, $xr2 -+xvavg.d $xr0, $xr1, $xr2 -+xvavg.bu $xr0, $xr1, $xr2 -+xvavg.hu $xr0, $xr1, $xr2 -+xvavg.wu $xr0, $xr1, $xr2 -+xvavg.du $xr0, $xr1, $xr2 -+xvavgr.b $xr0, $xr1, $xr2 -+xvavgr.h $xr0, $xr1, $xr2 -+xvavgr.w $xr0, $xr1, $xr2 -+xvavgr.d $xr0, $xr1, $xr2 -+xvavgr.bu $xr0, $xr1, $xr2 -+xvavgr.hu $xr0, $xr1, $xr2 -+xvavgr.wu $xr0, $xr1, $xr2 -+xvavgr.du $xr0, $xr1, $xr2 -+xvmax.b $xr0, $xr1, $xr2 -+xvmax.h $xr0, $xr1, $xr2 -+xvmax.w $xr0, $xr1, $xr2 -+xvmax.d $xr0, $xr1, $xr2 -+xvmin.b $xr0, $xr1, $xr2 -+xvmin.h $xr0, $xr1, $xr2 -+xvmin.w $xr0, $xr1, $xr2 -+xvmin.d $xr0, $xr1, $xr2 -+xvmax.bu $xr0, $xr1, $xr2 -+xvmax.hu $xr0, $xr1, $xr2 -+xvmax.wu $xr0, $xr1, $xr2 -+xvmax.du $xr0, $xr1, $xr2 -+xvmin.bu $xr0, $xr1, $xr2 -+xvmin.hu $xr0, $xr1, $xr2 -+xvmin.wu $xr0, $xr1, $xr2 -+xvmin.du $xr0, $xr1, $xr2 -+xvmul.b $xr0, $xr1, $xr2 -+xvmul.h $xr0, $xr1, $xr2 -+xvmul.w $xr0, $xr1, $xr2 -+xvmul.d $xr0, $xr1, $xr2 -+xvmuh.b $xr0, $xr1, $xr2 -+xvmuh.h $xr0, $xr1, $xr2 -+xvmuh.w $xr0, $xr1, $xr2 -+xvmuh.d $xr0, $xr1, $xr2 -+xvmuh.bu $xr0, $xr1, $xr2 -+xvmuh.hu $xr0, $xr1, $xr2 -+xvmuh.wu $xr0, $xr1, $xr2 -+xvmuh.du $xr0, $xr1, $xr2 -+xvmadd.b $xr0, $xr1, $xr2 -+xvmadd.h $xr0, $xr1, $xr2 -+xvmadd.w $xr0, $xr1, $xr2 -+xvmadd.d $xr0, $xr1, $xr2 -+xvmsub.b $xr0, $xr1, $xr2 -+xvmsub.h $xr0, $xr1, $xr2 -+xvmsub.w $xr0, $xr1, $xr2 -+xvmsub.d $xr0, $xr1, $xr2 -+xvdiv.b $xr0, $xr1, $xr2 -+xvdiv.h $xr0, $xr1, $xr2 -+xvdiv.w $xr0, $xr1, $xr2 -+xvdiv.d $xr0, $xr1, $xr2 -+xvmod.b $xr0, $xr1, $xr2 -+xvmod.h $xr0, $xr1, $xr2 -+xvmod.w $xr0, $xr1, $xr2 -+xvmod.d $xr0, $xr1, $xr2 -+xvdiv.bu $xr0, $xr1, $xr2 -+xvdiv.hu $xr0, $xr1, $xr2 -+xvdiv.wu $xr0, $xr1, $xr2 -+xvdiv.du $xr0, $xr1, $xr2 -+xvmod.bu $xr0, $xr1, $xr2 -+xvmod.hu $xr0, $xr1, $xr2 -+xvmod.wu $xr0, $xr1, $xr2 -+xvmod.du $xr0, $xr1, $xr2 -+xvsll.b $xr0, $xr1, $xr2 -+xvsll.h $xr0, $xr1, $xr2 -+xvsll.w $xr0, $xr1, $xr2 -+xvsll.d $xr0, $xr1, $xr2 -+xvsrl.b $xr0, $xr1, $xr2 -+xvsrl.h $xr0, $xr1, $xr2 -+xvsrl.w $xr0, $xr1, $xr2 -+xvsrl.d $xr0, $xr1, $xr2 -+xvsra.b $xr0, $xr1, $xr2 -+xvsra.h $xr0, $xr1, $xr2 -+xvsra.w $xr0, $xr1, $xr2 -+xvsra.d $xr0, $xr1, $xr2 -+xvrotr.b $xr0, $xr1, $xr2 -+xvrotr.h $xr0, $xr1, $xr2 -+xvrotr.w $xr0, $xr1, $xr2 -+xvrotr.d $xr0, $xr1, $xr2 -+xvsrlr.b $xr0, $xr1, $xr2 -+xvsrlr.h $xr0, $xr1, $xr2 -+xvsrlr.w $xr0, $xr1, $xr2 -+xvsrlr.d $xr0, $xr1, $xr2 -+xvsrar.b $xr0, $xr1, $xr2 -+xvsrar.h $xr0, $xr1, $xr2 -+xvsrar.w $xr0, $xr1, $xr2 -+xvsrar.d $xr0, $xr1, $xr2 -+xvsrln.b.h $xr0, $xr1, $xr2 -+xvsrln.h.w $xr0, $xr1, $xr2 -+xvsrln.w.d $xr0, $xr1, $xr2 -+xvsran.b.h $xr0, $xr1, $xr2 -+xvsran.h.w $xr0, $xr1, $xr2 -+xvsran.w.d $xr0, $xr1, $xr2 -+xvsrlrn.b.h $xr0, $xr1, $xr2 -+xvsrlrn.h.w $xr0, $xr1, $xr2 -+xvsrlrn.w.d $xr0, $xr1, $xr2 -+xvsrarn.b.h $xr0, $xr1, $xr2 -+xvsrarn.h.w $xr0, $xr1, $xr2 -+xvsrarn.w.d $xr0, $xr1, $xr2 -+xvssrln.b.h $xr0, $xr1, $xr2 -+xvssrln.h.w $xr0, $xr1, $xr2 -+xvssrln.w.d $xr0, $xr1, $xr2 -+xvssran.b.h $xr0, $xr1, $xr2 -+xvssran.h.w $xr0, $xr1, $xr2 -+xvssran.w.d $xr0, $xr1, $xr2 -+xvssrlrn.b.h $xr0, $xr1, $xr2 -+xvssrlrn.h.w $xr0, $xr1, $xr2 -+xvssrlrn.w.d $xr0, $xr1, $xr2 -+xvssrarn.b.h $xr0, $xr1, $xr2 -+xvssrarn.h.w $xr0, $xr1, $xr2 -+xvssrarn.w.d $xr0, $xr1, $xr2 -+xvssrln.bu.h $xr0, $xr1, $xr2 -+xvssrln.hu.w $xr0, $xr1, $xr2 -+xvssrln.wu.d $xr0, $xr1, $xr2 -+xvssran.bu.h $xr0, $xr1, $xr2 -+xvssran.hu.w $xr0, $xr1, $xr2 -+xvssran.wu.d $xr0, $xr1, $xr2 -+xvssrlrn.bu.h $xr0, $xr1, $xr2 -+xvssrlrn.hu.w $xr0, $xr1, $xr2 -+xvssrlrn.wu.d $xr0, $xr1, $xr2 -+xvssrarn.bu.h $xr0, $xr1, $xr2 -+xvssrarn.hu.w $xr0, $xr1, $xr2 -+xvssrarn.wu.d $xr0, $xr1, $xr2 -+xvbitclr.b $xr0, $xr1, $xr2 -+xvbitclr.h $xr0, $xr1, $xr2 -+xvbitclr.w $xr0, $xr1, $xr2 -+xvbitclr.d $xr0, $xr1, $xr2 -+xvbitset.b $xr0, $xr1, $xr2 -+xvbitset.h $xr0, $xr1, $xr2 -+xvbitset.w $xr0, $xr1, $xr2 -+xvbitset.d $xr0, $xr1, $xr2 -+xvbitrev.b $xr0, $xr1, $xr2 -+xvbitrev.h $xr0, $xr1, $xr2 -+xvbitrev.w $xr0, $xr1, $xr2 -+xvbitrev.d $xr0, $xr1, $xr2 -+xvpackev.b $xr0, $xr1, $xr2 -+xvpackev.h $xr0, $xr1, $xr2 -+xvpackev.w $xr0, $xr1, $xr2 -+xvpackev.d $xr0, $xr1, $xr2 -+xvpackod.b $xr0, $xr1, $xr2 -+xvpackod.h $xr0, $xr1, $xr2 -+xvpackod.w $xr0, $xr1, $xr2 -+xvpackod.d $xr0, $xr1, $xr2 -+xvilvl.b $xr0, $xr1, $xr2 -+xvilvl.h $xr0, $xr1, $xr2 -+xvilvl.w $xr0, $xr1, $xr2 -+xvilvl.d $xr0, $xr1, $xr2 -+xvilvh.b $xr0, $xr1, $xr2 -+xvilvh.h $xr0, $xr1, $xr2 -+xvilvh.w $xr0, $xr1, $xr2 -+xvilvh.d $xr0, $xr1, $xr2 -+xvpickev.b $xr0, $xr1, $xr2 -+xvpickev.h $xr0, $xr1, $xr2 -+xvpickev.w $xr0, $xr1, $xr2 -+xvpickev.d $xr0, $xr1, $xr2 -+xvpickod.b $xr0, $xr1, $xr2 -+xvpickod.h $xr0, $xr1, $xr2 -+xvpickod.w $xr0, $xr1, $xr2 -+xvpickod.d $xr0, $xr1, $xr2 -+xvreplve.b $xr0, $xr1, $r2 -+xvreplve.h $xr0, $xr1, $r2 -+xvreplve.w $xr0, $xr1, $r2 -+xvreplve.d $xr0, $xr1, $r2 -+xvand.v $xr0, $xr1, $xr2 -+xvor.v $xr0, $xr1, $xr2 -+xvxor.v $xr0, $xr1, $xr2 -+xvnor.v $xr0, $xr1, $xr2 -+xvandn.v $xr0, $xr1, $xr2 -+xvorn.v $xr0, $xr1, $xr2 -+xvfrstp.b $xr0, $xr1, $xr2 -+xvfrstp.h $xr0, $xr1, $xr2 -+xvadd.q $xr0, $xr1, $xr2 -+xvsub.q $xr0, $xr1, $xr2 -+xvsigncov.b $xr0, $xr1, $xr2 -+xvsigncov.h $xr0, $xr1, $xr2 -+xvsigncov.w $xr0, $xr1, $xr2 -+xvsigncov.d $xr0, $xr1, $xr2 -+xvfadd.s $xr0, $xr1, $xr2 -+xvfadd.d $xr0, $xr1, $xr2 -+xvfsub.s $xr0, $xr1, $xr2 -+xvfsub.d $xr0, $xr1, $xr2 -+xvfmul.s $xr0, $xr1, $xr2 -+xvfmul.d $xr0, $xr1, $xr2 -+xvfdiv.s $xr0, $xr1, $xr2 -+xvfdiv.d $xr0, $xr1, $xr2 -+xvfmax.s $xr0, $xr1, $xr2 -+xvfmax.d $xr0, $xr1, $xr2 -+xvfmin.s $xr0, $xr1, $xr2 -+xvfmin.d $xr0, $xr1, $xr2 -+xvfmaxa.s $xr0, $xr1, $xr2 -+xvfmaxa.d $xr0, $xr1, $xr2 -+xvfmina.s $xr0, $xr1, $xr2 -+xvfmina.d $xr0, $xr1, $xr2 -+xvfcvt.h.s $xr0, $xr1, $xr2 -+xvfcvt.s.d $xr0, $xr1, $xr2 -+xvffint.s.l $xr0, $xr1, $xr2 -+xvftint.w.d $xr0, $xr1, $xr2 -+xvftintrm.w.d $xr0, $xr1, $xr2 -+xvftintrp.w.d $xr0, $xr1, $xr2 -+xvftintrz.w.d $xr0, $xr1, $xr2 -+xvftintrne.w.d $xr0, $xr1, $xr2 -+xvshuf.h $xr0, $xr1, $xr2 -+xvshuf.w $xr0, $xr1, $xr2 -+xvshuf.d $xr0, $xr1, $xr2 -+xvperm.w $xr0, $xr1, $xr2 -+xvseqi.b $xr0, $xr1, 1 -+xvseqi.h $xr0, $xr1, 1 -+xvseqi.w $xr0, $xr1, 1 -+xvseqi.d $xr0, $xr1, 1 -+xvslei.b $xr0, $xr1, 1 -+xvslei.h $xr0, $xr1, 1 -+xvslei.w $xr0, $xr1, 1 -+xvslei.d $xr0, $xr1, 1 -+xvslei.bu $xr0, $xr1, 1 -+xvslei.hu $xr0, $xr1, 1 -+xvslei.wu $xr0, $xr1, 1 -+xvslei.du $xr0, $xr1, 1 -+xvslti.b $xr0, $xr1, 1 -+xvslti.h $xr0, $xr1, 1 -+xvslti.w $xr0, $xr1, 1 -+xvslti.d $xr0, $xr1, 1 -+xvslti.bu $xr0, $xr1, 1 -+xvslti.hu $xr0, $xr1, 1 -+xvslti.wu $xr0, $xr1, 1 -+xvslti.du $xr0, $xr1, 1 -+xvaddi.bu $xr0, $xr1, 1 -+xvaddi.hu $xr0, $xr1, 1 -+xvaddi.wu $xr0, $xr1, 1 -+xvaddi.du $xr0, $xr1, 1 -+xvsubi.bu $xr0, $xr1, 1 -+xvsubi.hu $xr0, $xr1, 1 -+xvsubi.wu $xr0, $xr1, 1 -+xvsubi.du $xr0, $xr1, 1 -+xvbsll.v $xr0, $xr1, 1 -+xvbsrl.v $xr0, $xr1, 1 -+xvmaxi.b $xr0, $xr1, 1 -+xvmaxi.h $xr0, $xr1, 1 -+xvmaxi.w $xr0, $xr1, 1 -+xvmaxi.d $xr0, $xr1, 1 -+xvmini.b $xr0, $xr1, 1 -+xvmini.h $xr0, $xr1, 1 -+xvmini.w $xr0, $xr1, 1 -+xvmini.d $xr0, $xr1, 1 -+xvmaxi.bu $xr0, $xr1, 1 -+xvmaxi.hu $xr0, $xr1, 1 -+xvmaxi.wu $xr0, $xr1, 1 -+xvmaxi.du $xr0, $xr1, 1 -+xvmini.bu $xr0, $xr1, 1 -+xvmini.hu $xr0, $xr1, 1 -+xvmini.wu $xr0, $xr1, 1 -+xvmini.du $xr0, $xr1, 1 -+xvfrstpi.b $xr0, $xr1, 1 -+xvfrstpi.h $xr0, $xr1, 1 -+xvclo.b $xr0, $xr1 -+xvclo.h $xr0, $xr1 -+xvclo.w $xr0, $xr1 -+xvclo.d $xr0, $xr1 -+xvclz.b $xr0, $xr1 -+xvclz.h $xr0, $xr1 -+xvclz.w $xr0, $xr1 -+xvclz.d $xr0, $xr1 -+xvpcnt.b $xr0, $xr1 -+xvpcnt.h $xr0, $xr1 -+xvpcnt.w $xr0, $xr1 -+xvpcnt.d $xr0, $xr1 -+xvneg.b $xr0, $xr1 -+xvneg.h $xr0, $xr1 -+xvneg.w $xr0, $xr1 -+xvneg.d $xr0, $xr1 -+xvmskltz.b $xr0, $xr1 -+xvmskltz.h $xr0, $xr1 -+xvmskltz.w $xr0, $xr1 -+xvmskltz.d $xr0, $xr1 -+xvmskgez.b $xr0, $xr1 -+xvmsknz.b $xr0, $xr1 -+xvseteqz.v $fcc0, $xr1 -+xvsetnez.v $fcc0, $xr1 -+xvsetanyeqz.b $fcc0, $xr1 -+xvsetanyeqz.h $fcc0, $xr1 -+xvsetanyeqz.w $fcc0, $xr1 -+xvsetanyeqz.d $fcc0, $xr1 -+xvsetallnez.b $fcc0, $xr1 -+xvsetallnez.h $fcc0, $xr1 -+xvsetallnez.w $fcc0, $xr1 -+xvsetallnez.d $fcc0, $xr1 -+xvflogb.s $xr0, $xr1 -+xvflogb.d $xr0, $xr1 -+xvfclass.s $xr0, $xr1 -+xvfclass.d $xr0, $xr1 -+xvfsqrt.s $xr0, $xr1 -+xvfsqrt.d $xr0, $xr1 -+xvfrecip.s $xr0, $xr1 -+xvfrecip.d $xr0, $xr1 -+xvfrsqrt.s $xr0, $xr1 -+xvfrsqrt.d $xr0, $xr1 -+xvfrint.s $xr0, $xr1 -+xvfrint.d $xr0, $xr1 -+xvfrintrm.s $xr0, $xr1 -+xvfrintrm.d $xr0, $xr1 -+xvfrintrp.s $xr0, $xr1 -+xvfrintrp.d $xr0, $xr1 -+xvfrintrz.s $xr0, $xr1 -+xvfrintrz.d $xr0, $xr1 -+xvfrintrne.s $xr0, $xr1 -+xvfrintrne.d $xr0, $xr1 -+xvfcvtl.s.h $xr0, $xr1 -+xvfcvth.s.h $xr0, $xr1 -+xvfcvtl.d.s $xr0, $xr1 -+xvfcvth.d.s $xr0, $xr1 -+xvffint.s.w $xr0, $xr1 -+xvffint.s.wu $xr0, $xr1 -+xvffint.d.l $xr0, $xr1 -+xvffint.d.lu $xr0, $xr1 -+xvffintl.d.w $xr0, $xr1 -+xvffinth.d.w $xr0, $xr1 -+xvftint.w.s $xr0, $xr1 -+xvftint.l.d $xr0, $xr1 -+xvftintrm.w.s $xr0, $xr1 -+xvftintrm.l.d $xr0, $xr1 -+xvftintrp.w.s $xr0, $xr1 -+xvftintrp.l.d $xr0, $xr1 -+xvftintrz.w.s $xr0, $xr1 -+xvftintrz.l.d $xr0, $xr1 -+xvftintrne.w.s $xr0, $xr1 -+xvftintrne.l.d $xr0, $xr1 -+xvftint.wu.s $xr0, $xr1 -+xvftint.lu.d $xr0, $xr1 -+xvftintrz.wu.s $xr0, $xr1 -+xvftintrz.lu.d $xr0, $xr1 -+xvftintl.l.s $xr0, $xr1 -+xvftinth.l.s $xr0, $xr1 -+xvftintrml.l.s $xr0, $xr1 -+xvftintrmh.l.s $xr0, $xr1 -+xvftintrpl.l.s $xr0, $xr1 -+xvftintrph.l.s $xr0, $xr1 -+xvftintrzl.l.s $xr0, $xr1 -+xvftintrzh.l.s $xr0, $xr1 -+xvftintrnel.l.s $xr0, $xr1 -+xvftintrneh.l.s $xr0, $xr1 -+xvexth.h.b $xr0, $xr1 -+xvexth.w.h $xr0, $xr1 -+xvexth.d.w $xr0, $xr1 -+xvexth.q.d $xr0, $xr1 -+xvexth.hu.bu $xr0, $xr1 -+xvexth.wu.hu $xr0, $xr1 -+xvexth.du.wu $xr0, $xr1 -+xvexth.qu.du $xr0, $xr1 -+xvreplgr2vr.b $xr0, $r1 -+xvreplgr2vr.h $xr0, $r1 -+xvreplgr2vr.w $xr0, $r1 -+xvreplgr2vr.d $xr0, $r1 -+vext2xv.h.b $xr0, $xr1 -+vext2xv.w.b $xr0, $xr1 -+vext2xv.d.b $xr0, $xr1 -+vext2xv.w.h $xr0, $xr1 -+vext2xv.d.h $xr0, $xr1 -+vext2xv.d.w $xr0, $xr1 -+vext2xv.hu.bu $xr0, $xr1 -+vext2xv.wu.bu $xr0, $xr1 -+vext2xv.du.bu $xr0, $xr1 -+vext2xv.wu.hu $xr0, $xr1 -+vext2xv.du.hu $xr0, $xr1 -+vext2xv.du.wu $xr0, $xr1 -+xvhseli.d $xr0, $xr1, 1 -+xvrotri.b $xr0, $xr1, 1 -+xvrotri.h $xr0, $xr1, 1 -+xvrotri.w $xr0, $xr1, 1 -+xvrotri.d $xr0, $xr1, 1 -+xvsrlri.b $xr0, $xr1, 1 -+xvsrlri.h $xr0, $xr1, 1 -+xvsrlri.w $xr0, $xr1, 1 -+xvsrlri.d $xr0, $xr1, 1 -+xvsrari.b $xr0, $xr1, 1 -+xvsrari.h $xr0, $xr1, 1 -+xvsrari.w $xr0, $xr1, 1 -+xvsrari.d $xr0, $xr1, 1 -+xvinsgr2vr.w $xr0, $r1, 1 -+xvinsgr2vr.d $xr0, $r1, 1 -+xvpickve2gr.w $r0, $xr1, 1 -+xvpickve2gr.d $r0, $xr1, 1 -+xvpickve2gr.wu $r0, $xr1, 1 -+xvpickve2gr.du $r0, $xr1, 1 -+xvrepl128vei.b $xr0, $xr1, 1 -+xvrepl128vei.h $xr0, $xr1, 1 -+xvrepl128vei.w $xr0, $xr1, 1 -+xvrepl128vei.d $xr0, $xr1, 1 -+xvinsve0.w $xr0, $xr1, 1 -+xvinsve0.d $xr0, $xr1, 1 -+xvpickve.w $xr0, $xr1, 1 -+xvpickve.d $xr0, $xr1, 1 -+xvreplve0.b $xr0, $xr1 -+xvreplve0.h $xr0, $xr1 -+xvreplve0.w $xr0, $xr1 -+xvreplve0.d $xr0, $xr1 -+xvreplve0.q $xr0, $xr1 -+xvsllwil.h.b $xr0, $xr1, 1 -+xvsllwil.w.h $xr0, $xr1, 1 -+xvsllwil.d.w $xr0, $xr1, 1 -+xvextl.q.d $xr0, $xr1 -+xvsllwil.hu.bu $xr0, $xr1, 1 -+xvsllwil.wu.hu $xr0, $xr1, 1 -+xvsllwil.du.wu $xr0, $xr1, 1 -+xvextl.qu.du $xr0, $xr1 -+xvbitclri.b $xr0, $xr1, 1 -+xvbitclri.h $xr0, $xr1, 1 -+xvbitclri.w $xr0, $xr1, 1 -+xvbitclri.d $xr0, $xr1, 1 -+xvbitseti.b $xr0, $xr1, 1 -+xvbitseti.h $xr0, $xr1, 1 -+xvbitseti.w $xr0, $xr1, 1 -+xvbitseti.d $xr0, $xr1, 1 -+xvbitrevi.b $xr0, $xr1, 1 -+xvbitrevi.h $xr0, $xr1, 1 -+xvbitrevi.w $xr0, $xr1, 1 -+xvbitrevi.d $xr0, $xr1, 1 -+xvsat.b $xr0, $xr1, 1 -+xvsat.h $xr0, $xr1, 1 -+xvsat.w $xr0, $xr1, 1 -+xvsat.d $xr0, $xr1, 1 -+xvsat.bu $xr0, $xr1, 1 -+xvsat.hu $xr0, $xr1, 1 -+xvsat.wu $xr0, $xr1, 1 -+xvsat.du $xr0, $xr1, 1 -+xvslli.b $xr0, $xr1, 1 -+xvslli.h $xr0, $xr1, 1 -+xvslli.w $xr0, $xr1, 1 -+xvslli.d $xr0, $xr1, 1 -+xvsrli.b $xr0, $xr1, 1 -+xvsrli.h $xr0, $xr1, 1 -+xvsrli.w $xr0, $xr1, 1 -+xvsrli.d $xr0, $xr1, 1 -+xvsrai.b $xr0, $xr1, 1 -+xvsrai.h $xr0, $xr1, 1 -+xvsrai.w $xr0, $xr1, 1 -+xvsrai.d $xr0, $xr1, 1 -+xvsrlni.b.h $xr0, $xr1, 1 -+xvsrlni.h.w $xr0, $xr1, 1 -+xvsrlni.w.d $xr0, $xr1, 1 -+xvsrlni.d.q $xr0, $xr1, 1 -+xvsrlrni.b.h $xr0, $xr1, 1 -+xvsrlrni.h.w $xr0, $xr1, 1 -+xvsrlrni.w.d $xr0, $xr1, 1 -+xvsrlrni.d.q $xr0, $xr1, 1 -+xvssrlni.b.h $xr0, $xr1, 1 -+xvssrlni.h.w $xr0, $xr1, 1 -+xvssrlni.w.d $xr0, $xr1, 1 -+xvssrlni.d.q $xr0, $xr1, 1 -+xvssrlni.bu.h $xr0, $xr1, 1 -+xvssrlni.hu.w $xr0, $xr1, 1 -+xvssrlni.wu.d $xr0, $xr1, 1 -+xvssrlni.du.q $xr0, $xr1, 1 -+xvssrlrni.b.h $xr0, $xr1, 1 -+xvssrlrni.h.w $xr0, $xr1, 1 -+xvssrlrni.w.d $xr0, $xr1, 1 -+xvssrlrni.d.q $xr0, $xr1, 1 -+xvssrlrni.bu.h $xr0, $xr1, 1 -+xvssrlrni.hu.w $xr0, $xr1, 1 -+xvssrlrni.wu.d $xr0, $xr1, 1 -+xvssrlrni.du.q $xr0, $xr1, 1 -+xvsrani.b.h $xr0, $xr1, 1 -+xvsrani.h.w $xr0, $xr1, 1 -+xvsrani.w.d $xr0, $xr1, 1 -+xvsrani.d.q $xr0, $xr1, 1 -+xvsrarni.b.h $xr0, $xr1, 1 -+xvsrarni.h.w $xr0, $xr1, 1 -+xvsrarni.w.d $xr0, $xr1, 1 -+xvsrarni.d.q $xr0, $xr1, 1 -+xvssrani.b.h $xr0, $xr1, 1 -+xvssrani.h.w $xr0, $xr1, 1 -+xvssrani.w.d $xr0, $xr1, 1 -+xvssrani.d.q $xr0, $xr1, 1 -+xvssrani.bu.h $xr0, $xr1, 1 -+xvssrani.hu.w $xr0, $xr1, 1 -+xvssrani.wu.d $xr0, $xr1, 1 -+xvssrani.du.q $xr0, $xr1, 1 -+xvssrarni.b.h $xr0, $xr1, 1 -+xvssrarni.h.w $xr0, $xr1, 1 -+xvssrarni.w.d $xr0, $xr1, 1 -+xvssrarni.d.q $xr0, $xr1, 1 -+xvssrarni.bu.h $xr0, $xr1, 1 -+xvssrarni.hu.w $xr0, $xr1, 1 -+xvssrarni.wu.d $xr0, $xr1, 1 -+xvssrarni.du.q $xr0, $xr1, 1 -+xvextrins.d $xr0, $xr1, 1 -+xvextrins.w $xr0, $xr1, 1 -+xvextrins.h $xr0, $xr1, 1 -+xvextrins.b $xr0, $xr1, 1 -+xvshuf4i.b $xr0, $xr1, 1 -+xvshuf4i.h $xr0, $xr1, 1 -+xvshuf4i.w $xr0, $xr1, 1 -+xvshuf4i.d $xr0, $xr1, 1 -+xvbitseli.b $xr0, $xr1, 1 -+xvandi.b $xr0, $xr1, 1 -+xvori.b $xr0, $xr1, 1 -+xvxori.b $xr0, $xr1, 1 -+xvnori.b $xr0, $xr1, 1 -+xvrepli.b $xr0, 1 -+xvrepli.d $xr0, 1 -+xvrepli.h $xr0, 1 -+xvrepli.w $xr0, 1 -+xvldi $xr0, 1 -+xvpermi.w $xr0, $xr1, 1 -+xvpermi.d $xr0, $xr1, 1 -+xvpermi.q $xr0, $xr1, 1 -diff --git a/include/elf/loongarch.h b/include/elf/loongarch.h -index ba0075d..e31395e 100644 ---- a/include/elf/loongarch.h -+++ b/include/elf/loongarch.h -@@ -229,6 +229,28 @@ RELOC_NUMBER (R_LARCH_32_PCREL, 99) - /* RELAX. */ - RELOC_NUMBER (R_LARCH_RELAX, 100) - -+/* relax delete. */ -+RELOC_NUMBER (R_LARCH_DELETE, 101) -+ -+/* relax align. */ -+RELOC_NUMBER (R_LARCH_ALIGN, 102) -+ -+/* pcaddi. */ -+RELOC_NUMBER (R_LARCH_PCREL20_S2, 103) -+ -+/* cfa. */ -+RELOC_NUMBER (R_LARCH_CFA, 104) -+ -+/* DW_CFA_advance_loc. */ -+RELOC_NUMBER (R_LARCH_ADD6, 105) -+RELOC_NUMBER (R_LARCH_SUB6, 106) -+ -+/* unsigned leb128. */ -+RELOC_NUMBER (R_LARCH_ADD_ULEB128, 107) -+RELOC_NUMBER (R_LARCH_SUB_ULEB128, 108) -+ -+RELOC_NUMBER (R_LARCH_64_PCREL, 109) -+ - END_RELOC_NUMBERS (R_LARCH_count) - - /* Processor specific flags for the ELF header e_flags field. */ -diff --git a/include/longlong.h b/include/longlong.h -index 9948a58..32d2048 100644 ---- a/include/longlong.h -+++ b/include/longlong.h -@@ -593,6 +593,18 @@ extern UDItype __umulsidi3 (USItype, USItype); - #define UMUL_TIME 14 - #endif - -+#ifdef __loongarch__ -+# if W_TYPE_SIZE == 32 -+# define count_leading_zeros(count, x) ((count) = __builtin_clz (x)) -+# define count_trailing_zeros(count, x) ((count) = __builtin_ctz (x)) -+# define COUNT_LEADING_ZEROS_0 32 -+# elif W_TYPE_SIZE == 64 -+# define count_leading_zeros(count, x) ((count) = __builtin_clzll (x)) -+# define count_trailing_zeros(count, x) ((count) = __builtin_ctzll (x)) -+# define COUNT_LEADING_ZEROS_0 64 -+# endif -+#endif -+ - #if defined (__M32R__) && W_TYPE_SIZE == 32 - #define add_ssaaaa(sh, sl, ah, al, bh, bl) \ - /* The cmp clears the condition bit. */ \ -diff --git a/include/opcode/loongarch.h b/include/opcode/loongarch.h -index 548732e..351d114 100644 ---- a/include/opcode/loongarch.h -+++ b/include/opcode/loongarch.h -@@ -28,6 +28,20 @@ extern "C" - { - #endif - -+ #define LARCH_NOP 0x03400000 -+ #define LARCH_B 0x50000000 -+ /* BCEQZ/BCNEZ. */ -+ #define LARCH_FLOAT_BRANCH 0x48000000 -+ #define LARCH_BRANCH_OPCODE_MASK 0xfc000000 -+ #define LARCH_BRANCH_INVERT_BIT 0x04000000 -+ #define LARCH_FLOAT_BRANCH_INVERT_BIT 0x00000100 -+ -+ #define ENCODE_BRANCH16_IMM(x) (((x) >> 2) << 10) -+ -+ #define OUT_OF_RANGE(value, bits, align) \ -+ ((value) < (-(1 << ((bits) - 1) << align)) \ -+ || (value) > ((((1 << ((bits) - 1)) - 1) << align))) -+ - typedef uint32_t insn_t; - - struct loongarch_opcode -@@ -118,6 +132,8 @@ dec2 : [1-9][0-9]? - - const unsigned long pinfo; - #define USELESS 0x0l -+/* Instruction is a simple alias only for disassembler use. */ -+#define INSN_DIS_ALIAS 0x00000001l - }; - - struct hash_control; -@@ -172,17 +188,14 @@ dec2 : [1-9][0-9]? - - extern void loongarch_eliminate_adjacent_repeat_char (char *dest, char c); - -- extern int loongarch_parse_dis_options (const char *opts_in); -- extern void loongarch_disassemble_one ( -- int64_t pc, insn_t insn, -- int (*fprintf_func) (void *stream, const char *format, ...), void *stream); -- - extern const char *const loongarch_r_normal_name[32]; - extern const char *const loongarch_r_lp64_name[32]; -- extern const char *const loongarch_r_lp64_name1[32]; -+ extern const char *const loongarch_r_lp64_name_deprecated[32]; - extern const char *const loongarch_f_normal_name[32]; - extern const char *const loongarch_f_lp64_name[32]; -- extern const char *const loongarch_f_lp64_name1[32]; -+ extern const char *const loongarch_f_lp64_name_deprecated[32]; -+ extern const char *const loongarch_fc_normal_name[4]; -+ extern const char *const loongarch_fc_numeric_name[4]; - extern const char *const loongarch_c_normal_name[8]; - extern const char *const loongarch_cr_normal_name[4]; - extern const char *const loongarch_v_normal_name[32]; -@@ -210,6 +223,9 @@ dec2 : [1-9][0-9]? - int use_lsx; - int use_lasx; - -+ int use_lvz; -+ int use_lbt; -+ - int use_la_local_with_abs; - int use_la_global_with_pcrel; - int use_la_global_with_abs; -@@ -224,10 +240,14 @@ dec2 : [1-9][0-9]? - #define ase_lsx isa.use_lsx - #define ase_lasx isa.use_lasx - -+#define ase_lvz isa.use_lvz -+#define ase_lbt isa.use_lbt -+ - #define ase_labs isa.use_la_local_with_abs - #define ase_gpcr isa.use_la_global_with_pcrel - #define ase_gabs isa.use_la_global_with_abs - -+ int relax; - } LARCH_opts; - - extern size_t loongarch_insn_length (insn_t insn); -diff --git a/include/vtv-change-permission.h b/include/vtv-change-permission.h -index 5906e7d..ffb5312 100644 ---- a/include/vtv-change-permission.h -+++ b/include/vtv-change-permission.h -@@ -48,6 +48,10 @@ extern void __VLTChangePermission (int); - #else - #if defined(__sun__) && defined(__svr4__) && defined(__sparc__) - #define VTV_PAGE_SIZE 8192 -+#elif defined(__loongarch_lp64) -+/* The page size is configurable by the kernel to be 4, 16 or 64 KiB. -+ For now, only the default page size of 16KiB is supported. */ -+#define VTV_PAGE_SIZE 16384 - #else - #define VTV_PAGE_SIZE 4096 - #endif -diff --git a/include/xtensa-dynconfig.h b/include/xtensa-dynconfig.h -index bb72d6a..b6b0218 100644 ---- a/include/xtensa-dynconfig.h -+++ b/include/xtensa-dynconfig.h -@@ -104,8 +104,6 @@ struct xtensa_config_v2 - int xtensa_march_earliest; - }; - --typedef struct xtensa_isa_internal_struct xtensa_isa_internal; -- - extern const void *xtensa_load_config (const char *name, - const void *no_plugin_def, - const void *no_name_def); -diff --git a/ld/emultempl/loongarchelf.em b/ld/emultempl/loongarchelf.em -index b790f64..4850feb 100644 ---- a/ld/emultempl/loongarchelf.em -+++ b/ld/emultempl/loongarchelf.em -@@ -23,6 +23,7 @@ fragment <: - [ ]+0:[ ]+1a000014[ ]+pcalau12i[ ]+\$t8,[ ]+0 - [ ]+0:[ ]+R_LARCH_PCALA_HI20[ ]+_start -+[ ]+0:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+4:[ ]+02800294[ ]+addi.w[ ]+\$t8,[ ]+\$t8,[ ]+0 - [ ]+4:[ ]+R_LARCH_PCALA_LO12[ ]+_start -+[ ]+4:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+8:[ ]+4c000281[ ]+jirl[ ]+\$ra,[ ]+\$t8,[ ]+0 -diff --git a/ld/testsuite/ld-loongarch-elf/disas-jirl.d b/ld/testsuite/ld-loongarch-elf/disas-jirl.d -index 595c30c..eeb8dd0 100644 ---- a/ld/testsuite/ld-loongarch-elf/disas-jirl.d -+++ b/ld/testsuite/ld-loongarch-elf/disas-jirl.d -@@ -6,9 +6,11 @@ - - Disassembly of section .text: - --00000000.*: -+00000000.* <_start>: - [ ]+0:[ ]+1a000014[ ]+pcalau12i[ ]+\$t8,[ ]+0 - [ ]+0:[ ]+R_LARCH_PCALA_HI20[ ]+_start -+[ ]+0:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+4:[ ]+02c00294[ ]+addi.d[ ]+\$t8,[ ]+\$t8,[ ]+0 - [ ]+4:[ ]+R_LARCH_PCALA_LO12[ ]+_start -+[ ]+4:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+8:[ ]+4c000281[ ]+jirl[ ]+\$ra,[ ]+\$t8,[ ]+0 -diff --git a/ld/testsuite/ld-loongarch-elf/jmp_op.d b/ld/testsuite/ld-loongarch-elf/jmp_op.d -index 218c13f..231d780 100644 ---- a/ld/testsuite/ld-loongarch-elf/jmp_op.d -+++ b/ld/testsuite/ld-loongarch-elf/jmp_op.d -@@ -1,31 +1,50 @@ - #as: --#objdump: -dr -+#objdump: -dr -M no-aliases - - .*:[ ]+file format .* - - - Disassembly of section .text: - --00000000.* <.text>: --[ ]+0:[ ]+03400000[ ]+[ ]+andi[ ]+\$zero, \$zero, 0x0 --[ ]+4:[ ]+63fffc04[ ]+[ ]+blt[ ]+\$zero, \$a0, -4\(0x3fffc\)[ ]+# 0x0 --[ ]+8:[ ]+67fff880[ ]+[ ]+bge[ ]+\$a0, \$zero, -8\(0x3fff8\)[ ]+# 0x0 --[ ]+c:[ ]+67fff404[ ]+[ ]+bge[ ]+\$zero, \$a0, -12\(0x3fff4\)[ ]+# 0x0 --[ ]+10:[ ]+43fff09f[ ]+[ ]+beqz[ ]+\$a0, -16\(0x7ffff0\)[ ]+# 0x0 --[ ]+14:[ ]+47ffec9f[ ]+[ ]+bnez[ ]+\$a0, -20\(0x7fffec\)[ ]+# 0x0 --[ ]+18:[ ]+4bffe81f[ ]+[ ]+bceqz[ ]+\$fcc0, -24\(0x7fffe8\)[ ]+# 0x0 --[ ]+1c:[ ]+4bffe51f[ ]+[ ]+bcnez[ ]+\$fcc0, -28\(0x7fffe4\)[ ]+# 0x0 --[ ]+20:[ ]+4c000080[ ]+[ ]+jirl[ ]+\$zero, \$a0, 0 --[ ]+24:[ ]+53ffdfff[ ]+[ ]+b[ ]+-36\(0xfffffdc\)[ ]+# 0x0 --[ ]+28:[ ]+57ffdbff[ ]+[ ]+bl[ ]+-40\(0xfffffd8\)[ ]+# 0x0 --[ ]+2c:[ ]+5bffd485[ ]+[ ]+beq[ ]+\$a0, \$a1, -44\(0x3ffd4\)[ ]+# 0x0 --[ ]+30:[ ]+5fffd085[ ]+[ ]+bne[ ]+\$a0, \$a1, -48\(0x3ffd0\)[ ]+# 0x0 --[ ]+34:[ ]+63ffcc85[ ]+[ ]+blt[ ]+\$a0, \$a1, -52\(0x3ffcc\)[ ]+# 0x0 --[ ]+38:[ ]+63ffc8a4[ ]+[ ]+blt[ ]+\$a1, \$a0, -56\(0x3ffc8\)[ ]+# 0x0 --[ ]+3c:[ ]+67ffc485[ ]+[ ]+bge[ ]+\$a0, \$a1, -60\(0x3ffc4\)[ ]+# 0x0 --[ ]+40:[ ]+67ffc0a4[ ]+[ ]+bge[ ]+\$a1, \$a0, -64\(0x3ffc0\)[ ]+# 0x0 --[ ]+44:[ ]+6bffbc85[ ]+[ ]+bltu[ ]+\$a0, \$a1, -68\(0x3ffbc\)[ ]+# 0x0 --[ ]+48:[ ]+6bffb8a4[ ]+[ ]+bltu[ ]+\$a1, \$a0, -72\(0x3ffb8\)[ ]+# 0x0 --[ ]+4c:[ ]+6fffb485[ ]+[ ]+bgeu[ ]+\$a0, \$a1, -76\(0x3ffb4\)[ ]+# 0x0 --[ ]+50:[ ]+6fffb0a4[ ]+[ ]+bgeu[ ]+\$a1, \$a0, -80\(0x3ffb0\)[ ]+# 0x0 --[ ]+54:[ ]+4c000020[ ]+[ ]+jirl[ ]+\$zero, \$ra, 0 -+00000000.* <.L1>: -+[ ]+0:[ ]+03400000[ ]+andi[ ]+\$zero,[ ]+\$zero,[ ]+0x0 -+[ ]+4:[ ]+63fffc04[ ]+blt[ ]+\$zero,[ ]+\$a0,[ ]+-4[ ]+#[ ]+0[ ]+<.L1> -+[ ]+4:[ ]+R_LARCH_B16[ ]+.L1 -+[ ]+8:[ ]+67fff880[ ]+bge[ ]+\$a0,[ ]+\$zero,[ ]+-8[ ]+#[ ]+0[ ]+<.L1> -+[ ]+8:[ ]+R_LARCH_B16[ ]+.L1 -+[ ]+c:[ ]+67fff404[ ]+bge[ ]+\$zero,[ ]+\$a0,[ ]+-12[ ]+#[ ]+0[ ]+<.L1> -+[ ]+c:[ ]+R_LARCH_B16[ ]+.L1 -+[ ]+10:[ ]+43fff09f[ ]+beqz[ ]+\$a0,[ ]+-16[ ]+#[ ]+0[ ]+<.L1> -+[ ]+10:[ ]+R_LARCH_B21[ ]+.L1 -+[ ]+14:[ ]+47ffec9f[ ]+bnez[ ]+\$a0,[ ]+-20[ ]+#[ ]+0[ ]+<.L1> -+[ ]+14:[ ]+R_LARCH_B21[ ]+.L1 -+[ ]+18:[ ]+4bffe81f[ ]+bceqz[ ]+\$fcc0,[ ]+-24[ ]+#[ ]+0[ ]+<.L1> -+[ ]+18:[ ]+R_LARCH_B21[ ]+.L1 -+[ ]+1c:[ ]+4bffe51f[ ]+bcnez[ ]+\$fcc0,[ ]+-28[ ]+#[ ]+0[ ]+<.L1> -+[ ]+1c:[ ]+R_LARCH_B21[ ]+.L1 -+[ ]+20:[ ]+4c000080[ ]+jirl[ ]+\$zero,[ ]+\$a0,[ ]+0 -+[ ]+24:[ ]+53ffdfff[ ]+b[ ]+-36[ ]+#[ ]+0[ ]+<.L1> -+[ ]+24:[ ]+R_LARCH_B26[ ]+.L1 -+[ ]+28:[ ]+57ffdbff[ ]+bl[ ]+-40[ ]+#[ ]+0[ ]+<.L1> -+[ ]+28:[ ]+R_LARCH_B26[ ]+.L1 -+[ ]+2c:[ ]+5bffd485[ ]+beq[ ]+\$a0,[ ]+\$a1,[ ]+-44[ ]+#[ ]+0[ ]+<.L1> -+[ ]+2c:[ ]+R_LARCH_B16[ ]+.L1 -+[ ]+30:[ ]+5fffd085[ ]+bne[ ]+\$a0,[ ]+\$a1,[ ]+-48[ ]+#[ ]+0[ ]+<.L1> -+[ ]+30:[ ]+R_LARCH_B16[ ]+.L1 -+[ ]+34:[ ]+63ffcc85[ ]+blt[ ]+\$a0,[ ]+\$a1,[ ]+-52[ ]+#[ ]+0[ ]+<.L1> -+[ ]+34:[ ]+R_LARCH_B16[ ]+.L1 -+[ ]+38:[ ]+63ffc8a4[ ]+blt[ ]+\$a1,[ ]+\$a0,[ ]+-56[ ]+#[ ]+0[ ]+<.L1> -+[ ]+38:[ ]+R_LARCH_B16[ ]+.L1 -+[ ]+3c:[ ]+67ffc485[ ]+bge[ ]+\$a0,[ ]+\$a1,[ ]+-60[ ]+#[ ]+0[ ]+<.L1> -+[ ]+3c:[ ]+R_LARCH_B16[ ]+.L1 -+[ ]+40:[ ]+67ffc0a4[ ]+bge[ ]+\$a1,[ ]+\$a0,[ ]+-64[ ]+#[ ]+0[ ]+<.L1> -+[ ]+40:[ ]+R_LARCH_B16[ ]+.L1 -+[ ]+44:[ ]+6bffbc85[ ]+bltu[ ]+\$a0,[ ]+\$a1,[ ]+-68[ ]+#[ ]+0[ ]+<.L1> -+[ ]+44:[ ]+R_LARCH_B16[ ]+.L1 -+[ ]+48:[ ]+6bffb8a4[ ]+bltu[ ]+\$a1,[ ]+\$a0,[ ]+-72[ ]+#[ ]+0[ ]+<.L1> -+[ ]+48:[ ]+R_LARCH_B16[ ]+.L1 -+[ ]+4c:[ ]+6fffb485[ ]+bgeu[ ]+\$a0,[ ]+\$a1,[ ]+-76[ ]+#[ ]+0[ ]+<.L1> -+[ ]+4c:[ ]+R_LARCH_B16[ ]+.L1 -+[ ]+50:[ ]+6fffb0a4[ ]+bgeu[ ]+\$a1,[ ]+\$a0,[ ]+-80[ ]+#[ ]+0[ ]+<.L1> -+[ ]+50:[ ]+R_LARCH_B16[ ]+.L1 -+[ ]+54:[ ]+4c000020[ ]+jirl[ ]+\$zero,[ ]+\$ra,[ ]+0 -diff --git a/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp b/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp -index 50a1208..b95cc53 100644 ---- a/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp -+++ b/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp -@@ -40,3 +40,19 @@ if [istarget "loongarch32-*-*"] { - run_dump_test "syscall" - run_dump_test "disas-jirl-32" - } -+ -+if [istarget "loongarch64-*-*"] { -+ run_ld_link_tests \ -+ [list \ -+ [list \ -+ "64_pcrel" \ -+ "-e 0x0 -z relro" "" \ -+ "" \ -+ {64_pcrel.s} \ -+ [list \ -+ [list objdump -D 64_pcrel.d] \ -+ ] \ -+ "64_pcrel" \ -+ ] \ -+ ] -+} -diff --git a/ld/testsuite/ld-loongarch-elf/local-ifunc-reloc.d b/ld/testsuite/ld-loongarch-elf/local-ifunc-reloc.d -index 29f2d3f..bf73d9f 100644 ---- a/ld/testsuite/ld-loongarch-elf/local-ifunc-reloc.d -+++ b/ld/testsuite/ld-loongarch-elf/local-ifunc-reloc.d -@@ -6,5 +6,5 @@ - - DYNAMIC RELOCATION RECORDS - OFFSET +TYPE +VALUE --[[:xdigit:]]+ R_LARCH_IRELATIVE +\*ABS\*\+0x[[:xdigit:]]+ - [[:xdigit:]]+ R_LARCH_64 +test -+[[:xdigit:]]+ R_LARCH_IRELATIVE +\*ABS\*\+0x[[:xdigit:]]+ -diff --git a/ld/testsuite/ld-loongarch-elf/macro_op.d b/ld/testsuite/ld-loongarch-elf/macro_op.d -index a1c64fc..edc71bc 100644 ---- a/ld/testsuite/ld-loongarch-elf/macro_op.d -+++ b/ld/testsuite/ld-loongarch-elf/macro_op.d -@@ -6,118 +6,150 @@ - - Disassembly of section .text: - --00000000.* <.text>: -+00000000.* <.L1>: - [ ]+0:[ ]+00150004[ ]+move[ ]+\$a0,[ ]+\$zero --[ ]+4:[ ]+02bffc04[ ]+addi.w[ ]+\$a0,[ ]+\$zero,[ ]+-1\(0xfff\) -+[ ]+4:[ ]+02bffc04[ ]+li\.w[ ]+\$a0,[ ]+-1 - [ ]+8:[ ]+00150004[ ]+move[ ]+\$a0,[ ]+\$zero --[ ]+c:[ ]+02bffc04[ ]+addi.w[ ]+\$a0,[ ]+\$zero,[ ]+-1\(0xfff\) -+[ ]+c:[ ]+02bffc04[ ]+li\.w[ ]+\$a0,[ ]+-1 - [ ]+10:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+10:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text -+[ ]+10:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 -+[ ]+10:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+14:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 --[ ]+14:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text -+[ ]+14:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 -+[ ]+14:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+18:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+18:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text -+[ ]+18:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 -+[ ]+18:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+1c:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 --[ ]+1c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text -+[ ]+1c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 -+[ ]+1c:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+20:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+20:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text --[ ]+24:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 --[ ]+24:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text -+[ ]+20:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 -+[ ]+20:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+24:[ ]+02c00005[ ]+li\.d[ ]+\$a1,[ ]+0 -+[ ]+24:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 -+[ ]+24:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+28:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 --[ ]+28:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.text -+[ ]+28:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.L1 - [ ]+2c:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 --[ ]+2c:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.text -+[ ]+2c:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.L1 - [ ]+30:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 - [ ]+34:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+34:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text -+[ ]+34:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 -+[ ]+34:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+38:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 --[ ]+38:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text -+[ ]+38:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 -+[ ]+38:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+3c:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+3c:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text --[ ]+40:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 --[ ]+40:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text -+[ ]+3c:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 -+[ ]+3c:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+40:[ ]+02c00005[ ]+li\.d[ ]+\$a1,[ ]+0 -+[ ]+40:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 -+[ ]+40:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+44:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 --[ ]+44:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.text -+[ ]+44:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.L1 - [ ]+48:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 --[ ]+48:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.text -+[ ]+48:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.L1 - [ ]+4c:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 - [ ]+50:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+50:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text -+[ ]+50:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 -+[ ]+50:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+54:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 --[ ]+54:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text -+[ ]+54:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 -+[ ]+54:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+58:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+58:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text --[ ]+5c:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 --[ ]+5c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text -+[ ]+58:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 -+[ ]+58:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+5c:[ ]+02c00005[ ]+li\.d[ ]+\$a1,[ ]+0 -+[ ]+5c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 -+[ ]+5c:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+60:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 --[ ]+60:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.text -+[ ]+60:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.L1 - [ ]+64:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 --[ ]+64:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.text -+[ ]+64:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.L1 - [ ]+68:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 - [ ]+6c:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+6c:[ ]+R_LARCH_PCALA_HI20[ ]+.text -+[ ]+6c:[ ]+R_LARCH_PCALA_HI20[ ]+.L1 -+[ ]+6c:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+70:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 --[ ]+70:[ ]+R_LARCH_PCALA_LO12[ ]+.text -+[ ]+70:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 -+[ ]+70:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+74:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+74:[ ]+R_LARCH_PCALA_HI20[ ]+.text --[ ]+78:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 --[ ]+78:[ ]+R_LARCH_PCALA_LO12[ ]+.text -+[ ]+74:[ ]+R_LARCH_PCALA_HI20[ ]+.L1 -+[ ]+74:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+78:[ ]+02c00005[ ]+li\.d[ ]+\$a1,[ ]+0 -+[ ]+78:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 -+[ ]+78:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+7c:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 --[ ]+7c:[ ]+R_LARCH_PCALA64_LO20[ ]+.text -+[ ]+7c:[ ]+R_LARCH_PCALA64_LO20[ ]+.L1 - [ ]+80:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 --[ ]+80:[ ]+R_LARCH_PCALA64_HI12[ ]+.text -+[ ]+80:[ ]+R_LARCH_PCALA64_HI12[ ]+.L1 - [ ]+84:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 - [ ]+88:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+88:[ ]+R_LARCH_PCALA_HI20[ ]+.text -+[ ]+88:[ ]+R_LARCH_PCALA_HI20[ ]+.L1 -+[ ]+88:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+8c:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 --[ ]+8c:[ ]+R_LARCH_PCALA_LO12[ ]+.text -+[ ]+8c:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 -+[ ]+8c:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+90:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+90:[ ]+R_LARCH_PCALA_HI20[ ]+.text --[ ]+94:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 --[ ]+94:[ ]+R_LARCH_PCALA_LO12[ ]+.text -+[ ]+90:[ ]+R_LARCH_PCALA_HI20[ ]+.L1 -+[ ]+90:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+94:[ ]+02c00005[ ]+li\.d[ ]+\$a1,[ ]+0 -+[ ]+94:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 -+[ ]+94:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+98:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 --[ ]+98:[ ]+R_LARCH_PCALA64_LO20[ ]+.text -+[ ]+98:[ ]+R_LARCH_PCALA64_LO20[ ]+.L1 - [ ]+9c:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 --[ ]+9c:[ ]+R_LARCH_PCALA64_HI12[ ]+.text -+[ ]+9c:[ ]+R_LARCH_PCALA64_HI12[ ]+.L1 - [ ]+a0:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 - [ ]+a4:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 - [ ]+a4:[ ]+R_LARCH_MARK_LA[ ]+\*ABS\* --[ ]+a4:[ ]+R_LARCH_ABS_HI20[ ]+.text -+[ ]+a4:[ ]+R_LARCH_ABS_HI20[ ]+.L1 - [ ]+a8:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 --[ ]+a8:[ ]+R_LARCH_ABS_LO12[ ]+.text -+[ ]+a8:[ ]+R_LARCH_ABS_LO12[ ]+.L1 - [ ]+ac:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 --[ ]+ac:[ ]+R_LARCH_ABS64_LO20[ ]+.text -+[ ]+ac:[ ]+R_LARCH_ABS64_LO20[ ]+.L1 - [ ]+b0:[ ]+03000084[ ]+lu52i.d[ ]+\$a0,[ ]+\$a0,[ ]+0 --[ ]+b0:[ ]+R_LARCH_ABS64_HI12[ ]+.text -+[ ]+b0:[ ]+R_LARCH_ABS64_HI12[ ]+.L1 - [ ]+b4:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+b4:[ ]+R_LARCH_PCALA_HI20[ ]+.text -+[ ]+b4:[ ]+R_LARCH_PCALA_HI20[ ]+.L1 -+[ ]+b4:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+b8:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 --[ ]+b8:[ ]+R_LARCH_PCALA_LO12[ ]+.text -+[ ]+b8:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 -+[ ]+b8:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+bc:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+bc:[ ]+R_LARCH_PCALA_HI20[ ]+.text -+[ ]+bc:[ ]+R_LARCH_PCALA_HI20[ ]+.L1 -+[ ]+bc:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+c0:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 --[ ]+c0:[ ]+R_LARCH_PCALA_LO12[ ]+.text -+[ ]+c0:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 -+[ ]+c0:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+c4:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+c4:[ ]+R_LARCH_PCALA_HI20[ ]+.text --[ ]+c8:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 --[ ]+c8:[ ]+R_LARCH_PCALA_LO12[ ]+.text -+[ ]+c4:[ ]+R_LARCH_PCALA_HI20[ ]+.L1 -+[ ]+c4:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+c8:[ ]+02c00005[ ]+li\.d[ ]+\$a1,[ ]+0 -+[ ]+c8:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 -+[ ]+c8:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+cc:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 --[ ]+cc:[ ]+R_LARCH_PCALA64_LO20[ ]+.text -+[ ]+cc:[ ]+R_LARCH_PCALA64_LO20[ ]+.L1 - [ ]+d0:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 --[ ]+d0:[ ]+R_LARCH_PCALA64_HI12[ ]+.text -+[ ]+d0:[ ]+R_LARCH_PCALA64_HI12[ ]+.L1 - [ ]+d4:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 - [ ]+d8:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+d8:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text -+[ ]+d8:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 -+[ ]+d8:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+dc:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 --[ ]+dc:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text -+[ ]+dc:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 -+[ ]+dc:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+e0:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+e0:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text --[ ]+e4:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 --[ ]+e4:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text -+[ ]+e0:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 -+[ ]+e0:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -+[ ]+e4:[ ]+02c00005[ ]+li\.d[ ]+\$a1,[ ]+0 -+[ ]+e4:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 -+[ ]+e4:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+e8:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 --[ ]+e8:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.text -+[ ]+e8:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.L1 - [ ]+ec:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 --[ ]+ec:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.text -+[ ]+ec:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.L1 - [ ]+f0:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 - [ ]+f4:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 - [ ]+f4:[ ]+R_LARCH_TLS_LE_HI20[ ]+TLS1 -@@ -129,7 +161,7 @@ Disassembly of section .text: - [ ]+100:[ ]+R_LARCH_TLS_IE_PC_LO12[ ]+TLS1 - [ ]+104:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 - [ ]+104:[ ]+R_LARCH_TLS_IE_PC_HI20[ ]+TLS1 --[ ]+108:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 -+[ ]+108:[ ]+02c00005[ ]+li\.d[ ]+\$a1,[ ]+0 - [ ]+108:[ ]+R_LARCH_TLS_IE_PC_LO12[ ]+TLS1 - [ ]+10c:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 - [ ]+10c:[ ]+R_LARCH_TLS_IE64_PC_LO20[ ]+TLS1 -@@ -140,10 +172,12 @@ Disassembly of section .text: - [ ]+118:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLS1 - [ ]+11c:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 - [ ]+11c:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 -+[ ]+11c:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+120:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 - [ ]+120:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLS1 --[ ]+124:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 -+[ ]+124:[ ]+02c00005[ ]+li\.d[ ]+\$a1,[ ]+0 - [ ]+124:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 -+[ ]+124:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+128:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 - [ ]+128:[ ]+R_LARCH_GOT64_PC_LO20[ ]+TLS1 - [ ]+12c:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 -@@ -153,10 +187,12 @@ Disassembly of section .text: - [ ]+134:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLS1 - [ ]+138:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 - [ ]+138:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 -+[ ]+138:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+13c:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 - [ ]+13c:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLS1 --[ ]+140:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 -+[ ]+140:[ ]+02c00005[ ]+li\.d[ ]+\$a1,[ ]+0 - [ ]+140:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 -+[ ]+140:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+144:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 - [ ]+144:[ ]+R_LARCH_GOT64_PC_LO20[ ]+TLS1 - [ ]+148:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 -diff --git a/ld/testsuite/ld-loongarch-elf/macro_op_32.d b/ld/testsuite/ld-loongarch-elf/macro_op_32.d -index 145d852..188026a 100644 ---- a/ld/testsuite/ld-loongarch-elf/macro_op_32.d -+++ b/ld/testsuite/ld-loongarch-elf/macro_op_32.d -@@ -7,36 +7,46 @@ - - Disassembly of section .text: - --00000000.* <.text>: -+00000000.* <.L1>: - [ ]+0:[ ]+00150004[ ]+move[ ]+\$a0,[ ]+\$zero --[ ]+4:[ ]+02bffc04[ ]+addi.w[ ]+\$a0,[ ]+\$zero,[ ]+-1\(0xfff\) -+[ ]+4:[ ]+02bffc04[ ]+li\.w[ ]+\$a0,[ ]+-1 - [ ]+8:[ ]+00150004[ ]+move[ ]+\$a0,[ ]+\$zero --[ ]+c:[ ]+02bffc04[ ]+addi.w[ ]+\$a0,[ ]+\$zero,[ ]+-1\(0xfff\) -+[ ]+c:[ ]+02bffc04[ ]+li\.w[ ]+\$a0,[ ]+-1 - [ ]+10:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+10:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text -+[ ]+10:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 -+[ ]+10:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+14:[ ]+28800084[ ]+ld.w[ ]+\$a0,[ ]+\$a0,[ ]+0 --[ ]+14:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text -+[ ]+14:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 -+[ ]+14:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+18:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+18:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text -+[ ]+18:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 -+[ ]+18:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+1c:[ ]+28800084[ ]+ld.w[ ]+\$a0,[ ]+\$a0,[ ]+0 --[ ]+1c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text -+[ ]+1c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 -+[ ]+1c:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+20:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+20:[ ]+R_LARCH_PCALA_HI20[ ]+.text -+[ ]+20:[ ]+R_LARCH_PCALA_HI20[ ]+.L1 -+[ ]+20:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+24:[ ]+02800084[ ]+addi.w[ ]+\$a0,[ ]+\$a0,[ ]+0 --[ ]+24:[ ]+R_LARCH_PCALA_LO12[ ]+.text -+[ ]+24:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 -+[ ]+24:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+28:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 - [ ]+28:[ ]+R_LARCH_MARK_LA[ ]+\*ABS\* --[ ]+28:[ ]+R_LARCH_ABS_HI20[ ]+.text -+[ ]+28:[ ]+R_LARCH_ABS_HI20[ ]+.L1 - [ ]+2c:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 --[ ]+2c:[ ]+R_LARCH_ABS_LO12[ ]+.text -+[ ]+2c:[ ]+R_LARCH_ABS_LO12[ ]+.L1 - [ ]+30:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+30:[ ]+R_LARCH_PCALA_HI20[ ]+.text -+[ ]+30:[ ]+R_LARCH_PCALA_HI20[ ]+.L1 -+[ ]+30:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+34:[ ]+02800084[ ]+addi.w[ ]+\$a0,[ ]+\$a0,[ ]+0 --[ ]+34:[ ]+R_LARCH_PCALA_LO12[ ]+.text -+[ ]+34:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 -+[ ]+34:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+38:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 --[ ]+38:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text -+[ ]+38:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 -+[ ]+38:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+3c:[ ]+28800084[ ]+ld.w[ ]+\$a0,[ ]+\$a0,[ ]+0 --[ ]+3c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text -+[ ]+3c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 -+[ ]+3c:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+40:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 - [ ]+40:[ ]+R_LARCH_TLS_LE_HI20[ ]+TLS1 - [ ]+44:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 -@@ -49,7 +59,9 @@ Disassembly of section .text: - [ ]+50:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLS1 - [ ]+54:[ ]+02800084[ ]+addi.w[ ]+\$a0,[ ]+\$a0,[ ]+0 - [ ]+54:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 -+[ ]+54:[ ]+R_LARCH_RELAX[ ]+\*ABS\* - [ ]+58:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 - [ ]+58:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLS1 - [ ]+5c:[ ]+02800084[ ]+addi.w[ ]+\$a0,[ ]+\$a0,[ ]+0 - [ ]+5c:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 -+[ ]+5c:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -diff --git a/ld/testsuite/ld-loongarch-elf/relax-align.dd b/ld/testsuite/ld-loongarch-elf/relax-align.dd -new file mode 100644 -index 0000000..5fce225 ---- /dev/null -+++ b/ld/testsuite/ld-loongarch-elf/relax-align.dd -@@ -0,0 +1,7 @@ -+#... -+.*pcaddi.* -+.*pcaddi.* -+.*nop.* -+.*nop.* -+.*0:.*pcaddi.* -+#pass -diff --git a/ld/testsuite/ld-loongarch-elf/relax-align.s b/ld/testsuite/ld-loongarch-elf/relax-align.s -new file mode 100644 -index 0000000..9617c02 ---- /dev/null -+++ b/ld/testsuite/ld-loongarch-elf/relax-align.s -@@ -0,0 +1,9 @@ -+# relax-align.o has 3 andi(nop) insns. -+# relax-align has 2 andi insns, ld relax delete andi insns. -+# the last pcaddi 16 bytes align. -+ .text -+L1: -+ la.local $a0, L1 -+ la.local $a0, L1 -+ .align 4 -+ la.local $a0, L1 -diff --git a/ld/testsuite/ld-loongarch-elf/relax.exp b/ld/testsuite/ld-loongarch-elf/relax.exp -new file mode 100644 -index 0000000..7ff876d ---- /dev/null -+++ b/ld/testsuite/ld-loongarch-elf/relax.exp -@@ -0,0 +1,77 @@ -+# Expect script for LoongArch ELF linker tests -+# Copyright (C) 2022 Free Software Foundation, Inc. -+# -+# This file is part of the GNU Binutils. -+# -+# This program is free software; you can redistribute it and/or modify -+# it under the terms of the GNU General Public License as published by -+# the Free Software Foundation; either version 3 of the License, or -+# (at your option) any later version. -+# -+# This program is distributed in the hope that it will be useful, -+# but WITHOUT ANY WARRANTY; without even the implied warranty of -+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+# GNU General Public License for more details. -+# -+# You should have received a copy of the GNU General Public License -+# along with this program; if not, write to the Free Software -+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, -+# MA 02110-1301, USA. -+# -+ -+if [istarget loongarch64-*-*] { -+ -+ if [isbuild loongarch64-*-*] { -+ set testname "loongarch relax build" -+ set pre_builds [list \ -+ [list \ -+ "$testname" \ -+ "" \ -+ "" \ -+ {relax.s} \ -+ {} \ -+ "relax" \ -+ ] \ -+ ] -+ -+ run_cc_link_tests $pre_builds -+ -+ if [file exist "tmpdir/relax"] { -+ set objdump_output [run_host_cmd "objdump" "-d tmpdir/relax"] -+ if { [ regexp ".*pcaddi.*pcaddi.*" $objdump_output] } { -+ pass "loongarch relax" -+ } { -+ fail "loongarch relax" -+ } -+ } -+ } -+ -+ run_ld_link_tests \ -+ [list \ -+ [list \ -+ "relax-align" \ -+ "-e 0x0 -z relro" "" \ -+ "" \ -+ {relax-align.s} \ -+ [list \ -+ [list objdump -d relax-align.dd] \ -+ ] \ -+ "relax-align" \ -+ ] \ -+ ] -+ -+ set objdump_flags "-s -j .data" -+ run_ld_link_tests \ -+ [list \ -+ [list \ -+ "uleb128" \ -+ "-e 0x0" "" \ -+ "" \ -+ {uleb128.s} \ -+ [list \ -+ [list objdump $objdump_flags uleb128.dd] \ -+ ] \ -+ "uleb128" \ -+ ] \ -+ ] -+} -diff --git a/ld/testsuite/ld-loongarch-elf/relax.s b/ld/testsuite/ld-loongarch-elf/relax.s -new file mode 100644 -index 0000000..2979ffa ---- /dev/null -+++ b/ld/testsuite/ld-loongarch-elf/relax.s -@@ -0,0 +1,16 @@ -+ .data -+ .global a -+ .type a, @object -+a: -+ .word 123 -+ -+ .text -+ .global main -+ .type main, @function -+main: -+ la.local $a0, a -+ ld.w $a1, $a0, 0 -+ la.global $a0, a -+ ld.w $a0, $a0, 0 -+ sub.d $a0, $a0, $a1 -+ jr $ra -diff --git a/ld/testsuite/ld-loongarch-elf/uleb128.dd b/ld/testsuite/ld-loongarch-elf/uleb128.dd -new file mode 100644 -index 0000000..c4ad307 ---- /dev/null -+++ b/ld/testsuite/ld-loongarch-elf/uleb128.dd -@@ -0,0 +1,10 @@ -+.*: .* -+ -+Contents of section .* -+ [0-9a-f]+ 01020381 01000000 00000000 00000000.* -+#... -+ [0-9a-f]+ 00000004 ffff0500 06078380 01000000.* -+#... -+ [0-9a-f]+ 00000000 00000000 00000008 ffffffff.* -+ [0-9a-f]+ 09090909 09090909 09090909 09090909.* -+#pass -diff --git a/ld/testsuite/ld-loongarch-elf/uleb128.s b/ld/testsuite/ld-loongarch-elf/uleb128.s -new file mode 100644 -index 0000000..7299fb9 ---- /dev/null -+++ b/ld/testsuite/ld-loongarch-elf/uleb128.s -@@ -0,0 +1,21 @@ -+# From gas/all/relax.s, test ld process add_uleb128/sub_uleb128 reloc pair. -+ .data -+ .byte 1, 2, 3 -+ .uleb128 L2 - L1 -+L1: -+ .space 128 - 2 -+ .byte 4 -+ .p2align 1, 0xff -+L2: -+ .byte 5 -+ -+ .p2align 2 -+ .byte 6, 7 -+ .uleb128 L4 - L3 -+L3: -+ .space 128*128 - 2 -+ .byte 8 -+ .p2align 2, 0xff -+L4: -+ .byte 9 -+ .p2align 4, 9 -diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c -index ff8cb87..0216811 100644 ---- a/opcodes/disassemble.c -+++ b/opcodes/disassemble.c -@@ -647,6 +647,11 @@ disassemble_init_for_target (struct disassemble_info * info) - info->skip_zeroes = 16; - break; - #endif -+#ifdef ARCH_loongarch -+ case bfd_arch_loongarch: -+ info->created_styled_output = true; -+ break; -+#endif - #ifdef ARCH_tic4x - case bfd_arch_tic4x: - info->skip_zeroes = 32; -diff --git a/opcodes/loongarch-dis.c b/opcodes/loongarch-dis.c -index d064d30..1e711f2 100644 ---- a/opcodes/loongarch-dis.c -+++ b/opcodes/loongarch-dis.c -@@ -25,6 +25,15 @@ - #include "libiberty.h" - #include - -+static bool loongarch_dis_show_aliases = true; -+static const char *const *loongarch_r_disname = NULL; -+static const char *const *loongarch_f_disname = NULL; -+static const char *const *loongarch_fc_disname = NULL; -+static const char *const *loongarch_c_disname = NULL; -+static const char *const *loongarch_cr_disname = NULL; -+static const char *const *loongarch_v_disname = NULL; -+static const char *const *loongarch_x_disname = NULL; -+ - static const struct loongarch_opcode * - get_loongarch_opcode_by_binfmt (insn_t insn) - { -@@ -41,7 +50,9 @@ get_loongarch_opcode_by_binfmt (insn_t insn) - { - for (it = ase->opcodes; it->mask; it++) - if (!ase->opc_htab[LARCH_INSN_OPC (it->match)] -- && it->macro == NULL) -+ && it->macro == NULL -+ && (!(it->pinfo & INSN_DIS_ALIAS) -+ || loongarch_dis_show_aliases)) - ase->opc_htab[LARCH_INSN_OPC (it->match)] = it; - for (i = 0; i < 16; i++) - if (!ase->opc_htab[i]) -@@ -59,13 +70,6 @@ get_loongarch_opcode_by_binfmt (insn_t insn) - return NULL; - } - --static const char *const *loongarch_r_disname = NULL; --static const char *const *loongarch_f_disname = NULL; --static const char *const *loongarch_c_disname = NULL; --static const char *const *loongarch_cr_disname = NULL; --static const char *const *loongarch_v_disname = NULL; --static const char *const *loongarch_x_disname = NULL; -- - static void - set_default_loongarch_dis_options (void) - { -@@ -75,9 +79,12 @@ set_default_loongarch_dis_options (void) - LARCH_opts.ase_df = 1; - LARCH_opts.ase_lsx = 1; - LARCH_opts.ase_lasx = 1; -+ LARCH_opts.ase_lvz = 1; -+ LARCH_opts.ase_lbt = 1; - - loongarch_r_disname = loongarch_r_lp64_name; - loongarch_f_disname = loongarch_f_lp64_name; -+ loongarch_fc_disname = loongarch_fc_normal_name; - loongarch_c_disname = loongarch_c_normal_name; - loongarch_cr_disname = loongarch_cr_normal_name; - loongarch_v_disname = loongarch_v_normal_name; -@@ -87,6 +94,9 @@ set_default_loongarch_dis_options (void) - static int - parse_loongarch_dis_option (const char *option) - { -+ if (strcmp (option, "no-aliases") == 0) -+ loongarch_dis_show_aliases = false; -+ - if (strcmp (option, "numeric") == 0) - { - loongarch_r_disname = loongarch_r_normal_name; -@@ -126,11 +136,12 @@ dis_one_arg (char esc1, char esc2, const char *bit_field, - struct disassemble_info *info = context; - insn_t insn = *(insn_t *) info->private_data; - int32_t imm, u_imm; -+ enum disassembler_style style; - - if (esc1) - { - if (need_comma) -- info->fprintf_func (info->stream, ", "); -+ info->fprintf_styled_func (info->stream, dis_style_text, ", "); - need_comma = 1; - imm = loongarch_decode_imm (bit_field, insn, 1); - u_imm = loongarch_decode_imm (bit_field, insn, 0); -@@ -139,35 +150,51 @@ dis_one_arg (char esc1, char esc2, const char *bit_field, - switch (esc1) - { - case 'r': -- info->fprintf_func (info->stream, "%s", loongarch_r_disname[u_imm]); -+ info->fprintf_styled_func (info->stream, dis_style_register, "%s", loongarch_r_disname[u_imm]); - break; - case 'f': -- info->fprintf_func (info->stream, "%s", loongarch_f_disname[u_imm]); -+ switch (esc2) -+ { -+ case 'c': -+ info->fprintf_styled_func (info->stream, dis_style_register, "%s", loongarch_fc_disname[u_imm]); -+ break; -+ default: -+ info->fprintf_styled_func (info->stream, dis_style_register, "%s", loongarch_f_disname[u_imm]); -+ } - break; - case 'c': - switch (esc2) - { - case 'r': -- info->fprintf_func (info->stream, "%s", loongarch_cr_disname[u_imm]); -+ info->fprintf_styled_func (info->stream, dis_style_register, "%s", loongarch_cr_disname[u_imm]); - break; - default: -- info->fprintf_func (info->stream, "%s", loongarch_c_disname[u_imm]); -+ info->fprintf_styled_func (info->stream, dis_style_register, "%s", loongarch_c_disname[u_imm]); - } - break; - case 'v': -- info->fprintf_func (info->stream, "%s", loongarch_v_disname[u_imm]); -+ info->fprintf_styled_func (info->stream, dis_style_register, "%s", loongarch_v_disname[u_imm]); - break; - case 'x': -- info->fprintf_func (info->stream, "%s", loongarch_x_disname[u_imm]); -+ info->fprintf_styled_func (info->stream, dis_style_register, "%s", loongarch_x_disname[u_imm]); - break; - case 'u': -- info->fprintf_func (info->stream, "0x%x", u_imm); -+ style = esc2 == 'o' ? dis_style_address_offset : dis_style_immediate; -+ info->fprintf_styled_func (info->stream, style, "0x%x", u_imm); - break; - case 's': -- if (imm == 0) -- info->fprintf_func (info->stream, "%d", imm); -- else -- info->fprintf_func (info->stream, "%d(0x%x)", imm, u_imm); -+ switch (esc2) -+ { -+ case 'b': -+ case 'o': -+ /* Both represent address offsets. */ -+ style = dis_style_address_offset; -+ break; -+ default: -+ style = dis_style_immediate; -+ break; -+ } -+ info->fprintf_styled_func (info->stream, style, "%d", imm); - switch (esc2) - { - case 'b': -@@ -221,44 +248,41 @@ disassemble_one (insn_t insn, struct disassemble_info *info) - for (i = 31; 0 <= i; i--) - { - if (t & insn) -- info->fprintf_func (info->stream, "1"); -+ info->fprintf_styled_func (info->stream, dis_style_text, "1"); - else -- info->fprintf_func (info->stream, "0"); -+ info->fprintf_styled_func (info->stream, dis_style_text, "0"); - if (have_space[i]) -- info->fprintf_func (info->stream, " "); -+ info->fprintf_styled_func (info->stream, dis_style_text, " "); - t = t >> 1; - } -- info->fprintf_func (info->stream, "\t"); -+ info->fprintf_styled_func (info->stream, dis_style_text, "\t"); - #endif - - if (!opc) - { - info->insn_type = dis_noninsn; -- info->fprintf_func (info->stream, "0x%08x", insn); -+ info->fprintf_styled_func (info->stream, dis_style_assembler_directive, ".word\t\t"); -+ info->fprintf_styled_func (info->stream, dis_style_immediate, "0x%08x", insn); - return; - } - - info->insn_type = dis_nonbranch; -- info->fprintf_func (info->stream, "%-12s", opc->name); -+ info->fprintf_styled_func (info->stream, dis_style_mnemonic, "%-12s", opc->name); - - { - char *fake_args = xmalloc (strlen (opc->format) + 1); - const char *fake_arg_strs[MAX_ARG_NUM_PLUS_2]; - strcpy (fake_args, opc->format); - if (0 < loongarch_split_args_by_comma (fake_args, fake_arg_strs)) -- info->fprintf_func (info->stream, "\t"); -+ info->fprintf_styled_func (info->stream, dis_style_text, "\t"); - info->private_data = &insn; - loongarch_foreach_args (opc->format, fake_arg_strs, dis_one_arg, info); - free (fake_args); - } - -- if (info->insn_type == dis_branch || info->insn_type == dis_condbranch -- /* Someother if we have extra info to print. */) -- info->fprintf_func (info->stream, "\t#"); -- - if (info->insn_type == dis_branch || info->insn_type == dis_condbranch) - { -- info->fprintf_func (info->stream, " "); -+ info->fprintf_styled_func (info->stream, dis_style_comment_start, "\t# "); - info->print_address_func (info->target, info); - } - } -@@ -301,42 +325,9 @@ print_loongarch_disassembler_options (FILE *stream) - The following LoongArch disassembler options are supported for use\n\ - with the -M switch (multiple options should be separated by commas):\n")); - -+ fprintf (stream, _("\n\ -+ no-aliases Use canonical instruction forms.\n")); - fprintf (stream, _("\n\ - numeric Print numeric register names, rather than ABI names.\n")); - fprintf (stream, _("\n")); - } -- --int --loongarch_parse_dis_options (const char *opts_in) --{ -- return parse_loongarch_dis_options (opts_in); --} -- --static void --my_print_address_func (bfd_vma addr, struct disassemble_info *dinfo) --{ -- dinfo->fprintf_func (dinfo->stream, "0x%llx", (long long) addr); --} -- --void --loongarch_disassemble_one (int64_t pc, insn_t insn, -- int (*fprintf_func) (void *stream, -- const char *format, ...), -- void *stream) --{ -- static struct disassemble_info my_disinfo = -- { -- .print_address_func = my_print_address_func, -- }; -- static int not_init_yet = 1; -- if (not_init_yet) -- { -- loongarch_parse_dis_options (NULL); -- not_init_yet = 0; -- } -- -- my_disinfo.fprintf_func = fprintf_func; -- my_disinfo.stream = stream; -- my_disinfo.target = pc; -- disassemble_one (insn, &my_disinfo); --} -diff --git a/opcodes/loongarch-opc.c b/opcodes/loongarch-opc.c -index 32f7307..2f02e33 100644 ---- a/opcodes/loongarch-opc.c -+++ b/opcodes/loongarch-opc.c -@@ -22,7 +22,10 @@ - #include "opcode/loongarch.h" - #include "libiberty.h" - --struct loongarch_ASEs_option LARCH_opts; -+struct loongarch_ASEs_option LARCH_opts = -+{ -+ .relax = 1 -+}; - - size_t - loongarch_insn_length (insn_t insn ATTRIBUTE_UNUSED) -@@ -42,14 +45,14 @@ const char *const loongarch_r_lp64_name[32] = - { - "$zero", "$ra", "$tp", "$sp", "$a0", "$a1", "$a2", "$a3", - "$a4", "$a5", "$a6", "$a7", "$t0", "$t1", "$t2", "$t3", -- "$t4", "$t5", "$t6", "$t7", "$t8", "$x", "$fp", "$s0", -+ "$t4", "$t5", "$t6", "$t7", "$t8", "$r21","$fp", "$s0", - "$s1", "$s2", "$s3", "$s4", "$s5", "$s6", "$s7", "$s8", - }; - --const char *const loongarch_r_lp64_name1[32] = -+const char *const loongarch_r_lp64_name_deprecated[32] = - { - "", "", "", "", "$v0", "$v1", "", "", "", "", "", "", "", "", "", "", -- "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", -+ "", "", "", "", "", "$x", "", "", "", "", "", "", "", "", "", "", - }; - - const char *const loongarch_f_normal_name[32] = -@@ -68,12 +71,22 @@ const char *const loongarch_f_lp64_name[32] = - "$fs0", "$fs1", "$fs2", "$fs3", "$fs4", "$fs5", "$fs6", "$fs7", - }; - --const char *const loongarch_f_lp64_name1[32] = -+const char *const loongarch_f_lp64_name_deprecated[32] = - { - "$fv0", "$fv1", "", "", "", "", "", "", "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", - }; - -+const char *const loongarch_fc_normal_name[4] = -+{ -+ "$fcsr0", "$fcsr1", "$fcsr2", "$fcsr3", -+}; -+ -+const char *const loongarch_fc_numeric_name[4] = -+{ -+ "$r0", "$r1", "$r2", "$r3", -+}; -+ - const char *const loongarch_c_normal_name[8] = - { - "$fcc0", "$fcc1", "$fcc2", "$fcc3", "$fcc4", "$fcc5", "$fcc6", "$fcc7", -@@ -142,10 +155,10 @@ const char *const loongarch_x_normal_name[32] = - &LARCH_opts.ase_lp64 - /* got32 abs. */ - #define INSN_LA_GOT32_ABS \ -- "lu12i.w %1,%%got_hi20(%2);" \ -+ "lu12i.w %1,%%got_hi20(%2);" \ - "ori %1,%1,%%got_lo12(%2);" \ -- "ld.w %1,%1,0;", \ -- &LARCH_opts.ase_gabs, \ -+ "ld.w %1,%1,0;", \ -+ &LARCH_opts.ase_gabs, \ - &LARCH_opts.ase_lp64 - #define INSN_LA_GOT64 \ - "pcalau12i %1,%%got_pc_hi20(%2);" \ -@@ -153,7 +166,7 @@ const char *const loongarch_x_normal_name[32] = - &LARCH_opts.ase_lp64, 0 - /* got64 abs. */ - #define INSN_LA_GOT64_LARGE_ABS \ -- "lu12i.w %1,%%got_hi20(%2);" \ -+ "lu12i.w %1,%%got_hi20(%2);" \ - "ori %1,%1,%%got_lo12(%2);" \ - "lu32i.d %1,%%got64_lo20(%2);" \ - "lu52i.d %1,%1,%%got64_hi12(%2);" \ -@@ -186,11 +199,11 @@ const char *const loongarch_x_normal_name[32] = - - #define INSN_LA_TLS_IE32 \ - "pcalau12i %1,%%ie_pc_hi20(%2);" \ -- "ld.w %1,%1,%%ie_pc_lo12(%2);", \ -+ "ld.w %1,%1,%%ie_pc_lo12(%2);", \ - &LARCH_opts.ase_ilp32, \ - &LARCH_opts.ase_lp64 - /* For ie32 abs. */ --#define INSN_LA_TLS_IE32_ABS \ -+#define INSN_LA_TLS_IE32_ABS \ - "lu12i.w %1,%%ie_hi20(%2);" \ - "ori %1,%1,%%ie_lo12(%2);" \ - "ld.w %1,%1,0", \ -@@ -198,14 +211,14 @@ const char *const loongarch_x_normal_name[32] = - &LARCH_opts.ase_lp64 - #define INSN_LA_TLS_IE64 \ - "pcalau12i %1,%%ie_pc_hi20(%2);" \ -- "ld.d %1,%1,%%ie_pc_lo12(%2);", \ -+ "ld.d %1,%1,%%ie_pc_lo12(%2);", \ - &LARCH_opts.ase_lp64, 0 - /* For ie64 pic. */ - #define INSN_LA_TLS_IE64_LARGE_PCREL \ - "pcalau12i %1,%%ie_pc_hi20(%3);" \ -- "addi.d %2,$r0,%%ie_pc_lo12(%3);" \ -- "lu32i.d %2,%%ie64_pc_lo20(%3);" \ -- "lu52i.d %2,%2,%%ie64_pc_hi12(%3);"\ -+ "addi.d %2,$r0,%%ie_pc_lo12(%3);" \ -+ "lu32i.d %2,%%ie64_pc_lo20(%3);" \ -+ "lu52i.d %2,%2,%%ie64_pc_hi12(%3);" \ - "ldx.d %1,%1,%2;", \ - &LARCH_opts.ase_lp64, \ - &LARCH_opts.ase_gabs -@@ -213,8 +226,8 @@ const char *const loongarch_x_normal_name[32] = - #define INSN_LA_TLS_IE64_LARGE_ABS \ - "lu12i.w %1,%%ie_hi20(%2);" \ - "ori %1,%1,%%ie_lo12(%2);" \ -- "lu32i.d %1,%%ie64_lo20(%2);" \ -- "lu52i.d %1,%1,%%ie64_hi12(%2);" \ -+ "lu32i.d %1,%%ie64_lo20(%2);" \ -+ "lu52i.d %1,%1,%%ie64_hi12(%2);" \ - "ld.d %1,%1,0", \ - &LARCH_opts.ase_lp64, \ - &LARCH_opts.ase_gpcr -@@ -328,12 +341,32 @@ static struct loongarch_opcode loongarch_macro_opcodes[] = - { 0, 0, "la.tls.gd", "r,l", INSN_LA_TLS_GD64_LARGE_ABS, 0 }, - { 0, 0, "la.tls.gd", "r,r,l", INSN_LA_TLS_GD64_LARGE_PCREL, 0 }, - -- { 0 } /* Terminate the list. */ -+ { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ -+}; -+ -+static struct loongarch_opcode loongarch_alias_opcodes[] = -+{ -+ /* match, mask, name, format, macro, include, exclude, pinfo. */ -+ { 0x00150000, 0xfffffc00, "move", "r0:5,r5:5", 0, 0, 0, INSN_DIS_ALIAS }, /* or rd, rj, zero */ -+ { 0x02800000, 0xffc003e0, "li.w", "r0:5,s10:12", 0, 0, 0, INSN_DIS_ALIAS }, /* addi.w rd, zero, simm */ -+ { 0x02c00000, 0xffc003e0, "li.d", "r0:5,s10:12", 0, 0, 0, INSN_DIS_ALIAS }, /* addi.d rd, zero, simm */ -+ { 0x03400000, 0xffffffff, "nop", "", 0, 0, 0, INSN_DIS_ALIAS }, /* andi zero, zero, 0 */ -+ { 0x03800000, 0xffc003e0, "li.w", "r0:5,u10:12", 0, 0, 0, INSN_DIS_ALIAS }, /* ori rd, zero, uimm */ -+ /* ret must come before jr because it is more specific. */ -+ { 0x4c000020, 0xffffffff, "ret", "", 0, 0, 0, INSN_DIS_ALIAS }, /* jirl zero, ra, 0 */ -+ { 0x4c000000, 0xfffffc1f, "jr", "r5:5", 0, 0, 0, INSN_DIS_ALIAS }, /* jirl zero, rj, 0 */ -+ { 0x60000000, 0xfc00001f, "bltz", "r5:5,sb10:16<<2", 0, 0, 0, INSN_DIS_ALIAS }, /* blt rj, zero, offset */ -+ { 0x60000000, 0xfc0003e0, "bgtz", "r0:5,sb10:16<<2", 0, 0, 0, INSN_DIS_ALIAS }, /* blt zero, rd, offset */ -+ { 0x64000000, 0xfc00001f, "bgez", "r5:5,sb10:16<<2", 0, 0, 0, INSN_DIS_ALIAS }, /* bge rj, zero, offset */ -+ { 0x64000000, 0xfc0003e0, "blez", "r0:5,sb10:16<<2", 0, 0, 0, INSN_DIS_ALIAS }, /* bge zero, rd, offset */ -+ { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ - }; - -+ - static struct loongarch_opcode loongarch_fix_opcodes[] = - { - /* match, mask, name, format, macro, include, exclude, pinfo. */ -+ { 0x0, 0x0, "move", "r,r", "or %1,%2,$r0", 0, 0, 0 }, - { 0x00001000, 0xfffffc00, "clo.w", "r0:5,r5:5", 0, 0, 0, 0 }, - { 0x00001400, 0xfffffc00, "clz.w", "r0:5,r5:5", 0, 0, 0, 0 }, - { 0x00001800, 0xfffffc00, "cto.w", "r0:5,r5:5", 0, 0, 0, 0 }, -@@ -354,8 +387,6 @@ static struct loongarch_opcode loongarch_fix_opcodes[] = - { 0x00005400, 0xfffffc00, "bitrev.d", "r0:5,r5:5", 0, 0, 0, 0 }, - { 0x00005800, 0xfffffc00, "ext.w.h", "r0:5,r5:5", 0, 0, 0, 0 }, - { 0x00005c00, 0xfffffc00, "ext.w.b", "r0:5,r5:5", 0, 0, 0, 0 }, -- /* or %1,%2,$r0 */ -- { 0x00150000, 0xfffffc00, "move", "r0:5,r5:5", 0, 0, 0, 0 }, - { 0x00006000, 0xfffffc00, "rdtimel.w", "r0:5,r5:5", 0, 0, 0, 0 }, - { 0x00006400, 0xfffffc00, "rdtimeh.w", "r0:5,r5:5", 0, 0, 0, 0 }, - { 0x00006800, 0xfffffc00, "rdtime.d", "r0:5,r5:5", 0, 0, 0, 0 }, -@@ -428,7 +459,7 @@ static struct loongarch_opcode loongarch_fix_opcodes[] = - { 0x00608000, 0xffe08000, "bstrpick.w", "r0:5,r5:5,u16:5,u10:5", 0, 0, 0, 0 }, - { 0x00800000, 0xffc00000, "bstrins.d", "r0:5,r5:5,u16:6,u10:6", 0, 0, 0, 0 }, - { 0x00c00000, 0xffc00000, "bstrpick.d", "r0:5,r5:5,u16:6,u10:6", 0, 0, 0, 0 }, -- { 0 } /* Terminate the list. */ -+ { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ - }; - - static struct loongarch_opcode loongarch_single_float_opcodes[] = -@@ -456,8 +487,8 @@ static struct loongarch_opcode loongarch_single_float_opcodes[] = - { 0x0114ac00, 0xfffffc00, "movgr2frh.w", "f0:5,r5:5", 0, 0, 0, 0 }, - { 0x0114b400, 0xfffffc00, "movfr2gr.s", "r0:5,f5:5", 0, 0, 0, 0 }, - { 0x0114bc00, 0xfffffc00, "movfrh2gr.s", "r0:5,f5:5", 0, 0, 0, 0 }, -- { 0x0114c000, 0xfffffc00, "movgr2fcsr", "r0:5,r5:5", 0, 0, 0, 0 }, -- { 0x0114c800, 0xfffffc00, "movfcsr2gr", "r0:5,r5:5", 0, 0, 0, 0 }, -+ { 0x0114c000, 0xfffffc1c, "movgr2fcsr", "fc0:2,r5:5", 0, 0, 0, 0 }, -+ { 0x0114c800, 0xffffff80, "movfcsr2gr", "r0:5,fc5:2", 0, 0, 0, 0 }, - { 0x0114d000, 0xfffffc18, "movfr2cf", "c0:3,f5:5", 0, 0, 0, 0 }, - { 0x0114d400, 0xffffff00, "movcf2fr", "f0:5,c5:3", 0, 0, 0, 0 }, - { 0x0114d800, 0xfffffc18, "movgr2cf", "c0:3,r5:5", 0, 0, 0, 0 }, -@@ -475,7 +506,7 @@ static struct loongarch_opcode loongarch_single_float_opcodes[] = - { 0x011d1000, 0xfffffc00, "ffint.s.w", "f0:5,f5:5", 0, 0, 0, 0 }, - { 0x011d1800, 0xfffffc00, "ffint.s.l", "f0:5,f5:5", 0, 0, 0, 0 }, - { 0x011e4400, 0xfffffc00, "frint.s", "f0:5,f5:5", 0, 0, 0, 0 }, -- { 0 } /* Terminate the list. */ -+ { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ - }; - static struct loongarch_opcode loongarch_double_float_opcodes[] = - { -@@ -515,7 +546,7 @@ static struct loongarch_opcode loongarch_double_float_opcodes[] = - { 0x011d2000, 0xfffffc00, "ffint.d.w", "f0:5,f5:5", 0, 0, 0, 0 }, - { 0x011d2800, 0xfffffc00, "ffint.d.l", "f0:5,f5:5", 0, 0, 0, 0 }, - { 0x011e4800, 0xfffffc00, "frint.d", "f0:5,f5:5", 0, 0, 0, 0 }, -- { 0 } /* Terminate the list. */ -+ { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ - }; - - static struct loongarch_opcode loongarch_imm_opcodes[] = -@@ -537,7 +568,7 @@ static struct loongarch_opcode loongarch_imm_opcodes[] = - { 0x1a000000, 0xfe000000, "pcalau12i", "r0:5,s5:20", 0, 0, 0, 0 }, - { 0x1c000000, 0xfe000000, "pcaddu12i", "r0:5,s5:20", 0, 0, 0, 0 }, - { 0x1e000000, 0xfe000000, "pcaddu18i", "r0:5,s5:20", 0, 0, 0, 0 }, -- { 0 } /* Terminate the list. */ -+ { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ - }; - - static struct loongarch_opcode loongarch_privilege_opcodes[] = -@@ -566,44 +597,100 @@ static struct loongarch_opcode loongarch_privilege_opcodes[] = - { 0x06483800, 0xffffffff, "ertn", "", 0, 0, 0, 0 }, - { 0x06488000, 0xffff8000, "idle", "u0:15", 0, 0, 0, 0 }, - { 0x06498000, 0xffff8000, "invtlb", "u0:5,r5:5,r10:5", 0, 0, 0, 0 }, -- { 0 } /* Terminate the list. */ -+ { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ - }; - - static struct loongarch_opcode loongarch_4opt_single_float_opcodes[] = - { -- /* match, mask, name, format, macro, include, exclude, pinfo. */ -- { 0x08100000, 0xfff00000, "fmadd.s", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, -- { 0x08500000, 0xfff00000, "fmsub.s", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, -- { 0x08900000, 0xfff00000, "fnmadd.s", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, -- { 0x08d00000, 0xfff00000, "fnmsub.s", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, -- { 0x0c100000, 0xffff8018, "fcmp.caf.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -- { 0x0c108000, 0xffff8018, "fcmp.saf.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -- { 0x0c110000, 0xffff8018, "fcmp.clt.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -- { 0x0c118000, 0xffff8018, "fcmp.slt.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -- { 0x0c118000, 0xffff8018, "fcmp.sgt.s", "c0:3,f10:5,f5:5", 0, 0, 0, 0 }, -- { 0x0c120000, 0xffff8018, "fcmp.ceq.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -- { 0x0c128000, 0xffff8018, "fcmp.seq.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -- { 0x0c130000, 0xffff8018, "fcmp.cle.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -- { 0x0c138000, 0xffff8018, "fcmp.sle.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -- { 0x0c138000, 0xffff8018, "fcmp.sge.s", "c0:3,f10:5,f5:5", 0, 0, 0, 0 }, -- { 0x0c140000, 0xffff8018, "fcmp.cun.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -- { 0x0c148000, 0xffff8018, "fcmp.sun.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -- { 0x0c150000, 0xffff8018, "fcmp.cult.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -- { 0x0c150000, 0xffff8018, "fcmp.cugt.s", "c0:3,f10:5,f5:5", 0, 0, 0, 0 }, -- { 0x0c158000, 0xffff8018, "fcmp.sult.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -- { 0x0c160000, 0xffff8018, "fcmp.cueq.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -- { 0x0c168000, 0xffff8018, "fcmp.sueq.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -- { 0x0c170000, 0xffff8018, "fcmp.cule.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -- { 0x0c170000, 0xffff8018, "fcmp.cuge.s", "c0:3,f10:5,f5:5", 0, 0, 0, 0 }, -- { 0x0c178000, 0xffff8018, "fcmp.sule.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -- { 0x0c180000, 0xffff8018, "fcmp.cne.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -- { 0x0c188000, 0xffff8018, "fcmp.sne.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -- { 0x0c1a0000, 0xffff8018, "fcmp.cor.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -- { 0x0c1a8000, 0xffff8018, "fcmp.sor.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -- { 0x0c1c0000, 0xffff8018, "fcmp.cune.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -- { 0x0c1c8000, 0xffff8018, "fcmp.sune.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -- { 0x0d000000, 0xfffc0000, "fsel", "f0:5,f5:5,f10:5,c15:3", 0, 0, 0, 0 }, -- { 0 } /* Terminate the list. */ -+ /* match, mask, name, format, macro, include, exclude, pinfo. */ -+ { 0x08100000, 0xfff00000, "fmadd.s", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, -+ { 0x08500000, 0xfff00000, "fmsub.s", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, -+ { 0x08900000, 0xfff00000, "fnmadd.s", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, -+ { 0x08d00000, 0xfff00000, "fnmsub.s", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, -+ { 0x09100000, 0xfff00000, "vfmadd.s", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0 }, -+ { 0x09500000, 0xfff00000, "vfmsub.s", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0 }, -+ { 0x09900000, 0xfff00000, "vfnmadd.s", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0 }, -+ { 0x09d00000, 0xfff00000, "vfnmsub.s", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0 }, -+ { 0x0a100000, 0xfff00000, "xvfmadd.s", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0 }, -+ { 0x0a500000, 0xfff00000, "xvfmsub.s", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0 }, -+ { 0x0a900000, 0xfff00000, "xvfnmadd.s", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0 }, -+ { 0x0ad00000, 0xfff00000, "xvfnmsub.s", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0 }, -+ { 0x0c100000, 0xffff8018, "fcmp.caf.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -+ { 0x0c108000, 0xffff8018, "fcmp.saf.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -+ { 0x0c110000, 0xffff8018, "fcmp.clt.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -+ { 0x0c118000, 0xffff8018, "fcmp.slt.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -+ { 0x0c118000, 0xffff8018, "fcmp.sgt.s", "c0:3,f10:5,f5:5", 0, 0, 0, 0 }, -+ { 0x0c120000, 0xffff8018, "fcmp.ceq.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -+ { 0x0c128000, 0xffff8018, "fcmp.seq.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -+ { 0x0c130000, 0xffff8018, "fcmp.cle.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -+ { 0x0c138000, 0xffff8018, "fcmp.sle.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -+ { 0x0c138000, 0xffff8018, "fcmp.sge.s", "c0:3,f10:5,f5:5", 0, 0, 0, 0 }, -+ { 0x0c140000, 0xffff8018, "fcmp.cun.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -+ { 0x0c148000, 0xffff8018, "fcmp.sun.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -+ { 0x0c150000, 0xffff8018, "fcmp.cult.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -+ { 0x0c150000, 0xffff8018, "fcmp.cugt.s", "c0:3,f10:5,f5:5", 0, 0, 0, 0 }, -+ { 0x0c158000, 0xffff8018, "fcmp.sult.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -+ { 0x0c160000, 0xffff8018, "fcmp.cueq.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -+ { 0x0c168000, 0xffff8018, "fcmp.sueq.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -+ { 0x0c170000, 0xffff8018, "fcmp.cule.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -+ { 0x0c170000, 0xffff8018, "fcmp.cuge.s", "c0:3,f10:5,f5:5", 0, 0, 0, 0 }, -+ { 0x0c178000, 0xffff8018, "fcmp.sule.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -+ { 0x0c180000, 0xffff8018, "fcmp.cne.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -+ { 0x0c188000, 0xffff8018, "fcmp.sne.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -+ { 0x0c1a0000, 0xffff8018, "fcmp.cor.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -+ { 0x0c1a8000, 0xffff8018, "fcmp.sor.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -+ { 0x0c1c0000, 0xffff8018, "fcmp.cune.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -+ { 0x0c1c8000, 0xffff8018, "fcmp.sune.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -+ { 0x0c500000, 0xffff8000, "vfcmp.caf.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c508000, 0xffff8000, "vfcmp.saf.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c510000, 0xffff8000, "vfcmp.clt.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c518000, 0xffff8000, "vfcmp.slt.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c520000, 0xffff8000, "vfcmp.ceq.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c528000, 0xffff8000, "vfcmp.seq.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c530000, 0xffff8000, "vfcmp.cle.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c538000, 0xffff8000, "vfcmp.sle.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c540000, 0xffff8000, "vfcmp.cun.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c548000, 0xffff8000, "vfcmp.sun.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c550000, 0xffff8000, "vfcmp.cult.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c558000, 0xffff8000, "vfcmp.sult.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c560000, 0xffff8000, "vfcmp.cueq.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c568000, 0xffff8000, "vfcmp.sueq.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c570000, 0xffff8000, "vfcmp.cule.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c578000, 0xffff8000, "vfcmp.sule.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c580000, 0xffff8000, "vfcmp.cne.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c588000, 0xffff8000, "vfcmp.sne.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c5a0000, 0xffff8000, "vfcmp.cor.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c5a8000, 0xffff8000, "vfcmp.sor.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c5c0000, 0xffff8000, "vfcmp.cune.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c5c8000, 0xffff8000, "vfcmp.sune.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c900000, 0xffff8000, "xvfcmp.caf.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0c908000, 0xffff8000, "xvfcmp.saf.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0c910000, 0xffff8000, "xvfcmp.clt.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0c918000, 0xffff8000, "xvfcmp.slt.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0c920000, 0xffff8000, "xvfcmp.ceq.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0c928000, 0xffff8000, "xvfcmp.seq.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0c930000, 0xffff8000, "xvfcmp.cle.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0c938000, 0xffff8000, "xvfcmp.sle.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0c940000, 0xffff8000, "xvfcmp.cun.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0c948000, 0xffff8000, "xvfcmp.sun.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0c950000, 0xffff8000, "xvfcmp.cult.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0c958000, 0xffff8000, "xvfcmp.sult.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0c960000, 0xffff8000, "xvfcmp.cueq.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0c968000, 0xffff8000, "xvfcmp.sueq.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0c970000, 0xffff8000, "xvfcmp.cule.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0c978000, 0xffff8000, "xvfcmp.sule.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0c980000, 0xffff8000, "xvfcmp.cne.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0c988000, 0xffff8000, "xvfcmp.sne.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0c9a0000, 0xffff8000, "xvfcmp.cor.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0c9a8000, 0xffff8000, "xvfcmp.sor.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0c9c0000, 0xffff8000, "xvfcmp.cune.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0c9c8000, 0xffff8000, "xvfcmp.sune.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0d000000, 0xfffc0000, "fsel", "f0:5,f5:5,f10:5,c15:3", 0, 0, 0, 0 }, -+ { 0x0d100000, 0xfff00000, "vbitsel.v", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0 }, -+ { 0x0d200000, 0xfff00000, "xvbitsel.v", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0 }, -+ { 0x0d500000, 0xfff00000, "vshuf.b", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0 }, -+ { 0x0d600000, 0xfff00000, "xvshuf.b", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0 }, -+ { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ - }; - - static struct loongarch_opcode loongarch_4opt_double_float_opcodes[] = -@@ -613,6 +700,14 @@ static struct loongarch_opcode loongarch_4opt_double_float_opcodes[] = - { 0x08600000, 0xfff00000, "fmsub.d", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, - { 0x08a00000, 0xfff00000, "fnmadd.d", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, - { 0x08e00000, 0xfff00000, "fnmsub.d", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, -+ { 0x09200000, 0xfff00000, "vfmadd.d", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0 }, -+ { 0x09600000, 0xfff00000, "vfmsub.d", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0 }, -+ { 0x09a00000, 0xfff00000, "vfnmadd.d", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0 }, -+ { 0x09e00000, 0xfff00000, "vfnmsub.d", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0 }, -+ { 0x0a200000, 0xfff00000, "xvfmadd.d", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0 }, -+ { 0x0a600000, 0xfff00000, "xvfmsub.d", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0 }, -+ { 0x0aa00000, 0xfff00000, "xvfnmadd.d", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0 }, -+ { 0x0ae00000, 0xfff00000, "xvfnmsub.d", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0 }, - { 0x0c200000, 0xffff8018, "fcmp.caf.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, - { 0x0c208000, 0xffff8018, "fcmp.saf.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, - { 0x0c210000, 0xffff8018, "fcmp.clt.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -@@ -639,32 +734,76 @@ static struct loongarch_opcode loongarch_4opt_double_float_opcodes[] = - { 0x0c2a8000, 0xffff8018, "fcmp.sor.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, - { 0x0c2c0000, 0xffff8018, "fcmp.cune.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, - { 0x0c2c8000, 0xffff8018, "fcmp.sune.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, -- { 0 } /* Terminate the list. */ -+ { 0x0c600000, 0xffff8000, "vfcmp.caf.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c608000, 0xffff8000, "vfcmp.saf.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c610000, 0xffff8000, "vfcmp.clt.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c618000, 0xffff8000, "vfcmp.slt.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c620000, 0xffff8000, "vfcmp.ceq.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c628000, 0xffff8000, "vfcmp.seq.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c630000, 0xffff8000, "vfcmp.cle.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c638000, 0xffff8000, "vfcmp.sle.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c640000, 0xffff8000, "vfcmp.cun.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c648000, 0xffff8000, "vfcmp.sun.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c650000, 0xffff8000, "vfcmp.cult.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c658000, 0xffff8000, "vfcmp.sult.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c660000, 0xffff8000, "vfcmp.cueq.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c668000, 0xffff8000, "vfcmp.sueq.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c670000, 0xffff8000, "vfcmp.cule.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c678000, 0xffff8000, "vfcmp.sule.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c680000, 0xffff8000, "vfcmp.cne.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c688000, 0xffff8000, "vfcmp.sne.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c6a0000, 0xffff8000, "vfcmp.cor.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c6a8000, 0xffff8000, "vfcmp.sor.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c6c0000, 0xffff8000, "vfcmp.cune.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0c6c8000, 0xffff8000, "vfcmp.sune.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x0ca00000, 0xffff8000, "xvfcmp.caf.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0ca08000, 0xffff8000, "xvfcmp.saf.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0ca10000, 0xffff8000, "xvfcmp.clt.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0ca18000, 0xffff8000, "xvfcmp.slt.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0ca20000, 0xffff8000, "xvfcmp.ceq.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0ca28000, 0xffff8000, "xvfcmp.seq.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0ca30000, 0xffff8000, "xvfcmp.cle.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0ca38000, 0xffff8000, "xvfcmp.sle.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0ca40000, 0xffff8000, "xvfcmp.cun.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0ca48000, 0xffff8000, "xvfcmp.sun.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0ca50000, 0xffff8000, "xvfcmp.cult.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0ca58000, 0xffff8000, "xvfcmp.sult.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0ca60000, 0xffff8000, "xvfcmp.cueq.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0ca68000, 0xffff8000, "xvfcmp.sueq.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0ca70000, 0xffff8000, "xvfcmp.cule.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0ca78000, 0xffff8000, "xvfcmp.sule.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0ca80000, 0xffff8000, "xvfcmp.cne.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0ca88000, 0xffff8000, "xvfcmp.sne.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0caa0000, 0xffff8000, "xvfcmp.cor.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0caa8000, 0xffff8000, "xvfcmp.sor.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0cac0000, 0xffff8000, "xvfcmp.cune.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x0cac8000, 0xffff8000, "xvfcmp.sune.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ - }; - - static struct loongarch_opcode loongarch_load_store_opcodes[] = - { - /* match, mask, name, format, macro, include, exclude, pinfo. */ -- { 0x20000000, 0xff000000, "ll.w", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0 }, -- { 0x21000000, 0xff000000, "sc.w", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0 }, -- { 0x22000000, 0xff000000, "ll.d", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0 }, -- { 0x23000000, 0xff000000, "sc.d", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0 }, -- { 0x24000000, 0xff000000, "ldptr.w", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0 }, -- { 0x25000000, 0xff000000, "stptr.w", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0 }, -- { 0x26000000, 0xff000000, "ldptr.d", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0 }, -- { 0x27000000, 0xff000000, "stptr.d", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0 }, -- { 0x28000000, 0xffc00000, "ld.b", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, -- { 0x28400000, 0xffc00000, "ld.h", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, -- { 0x28800000, 0xffc00000, "ld.w", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, -- { 0x28c00000, 0xffc00000, "ld.d", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, -- { 0x29000000, 0xffc00000, "st.b", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, -- { 0x29400000, 0xffc00000, "st.h", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, -- { 0x29800000, 0xffc00000, "st.w", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, -- { 0x29c00000, 0xffc00000, "st.d", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, -- { 0x2a000000, 0xffc00000, "ld.bu", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, -- { 0x2a400000, 0xffc00000, "ld.hu", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, -- { 0x2a800000, 0xffc00000, "ld.wu", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, -- { 0x2ac00000, 0xffc00000, "preld", "u0:5,r5:5,s10:12", 0, 0, 0, 0 }, -+ { 0x20000000, 0xff000000, "ll.w", "r0:5,r5:5,so10:14<<2", 0, 0, 0, 0 }, -+ { 0x21000000, 0xff000000, "sc.w", "r0:5,r5:5,so10:14<<2", 0, 0, 0, 0 }, -+ { 0x22000000, 0xff000000, "ll.d", "r0:5,r5:5,so10:14<<2", 0, 0, 0, 0 }, -+ { 0x23000000, 0xff000000, "sc.d", "r0:5,r5:5,so10:14<<2", 0, 0, 0, 0 }, -+ { 0x24000000, 0xff000000, "ldptr.w", "r0:5,r5:5,so10:14<<2", 0, 0, 0, 0 }, -+ { 0x25000000, 0xff000000, "stptr.w", "r0:5,r5:5,so10:14<<2", 0, 0, 0, 0 }, -+ { 0x26000000, 0xff000000, "ldptr.d", "r0:5,r5:5,so10:14<<2", 0, 0, 0, 0 }, -+ { 0x27000000, 0xff000000, "stptr.d", "r0:5,r5:5,so10:14<<2", 0, 0, 0, 0 }, -+ { 0x28000000, 0xffc00000, "ld.b", "r0:5,r5:5,so10:12", 0, 0, 0, 0 }, -+ { 0x28400000, 0xffc00000, "ld.h", "r0:5,r5:5,so10:12", 0, 0, 0, 0 }, -+ { 0x28800000, 0xffc00000, "ld.w", "r0:5,r5:5,so10:12", 0, 0, 0, 0 }, -+ { 0x28c00000, 0xffc00000, "ld.d", "r0:5,r5:5,so10:12", 0, 0, 0, 0 }, -+ { 0x29000000, 0xffc00000, "st.b", "r0:5,r5:5,so10:12", 0, 0, 0, 0 }, -+ { 0x29400000, 0xffc00000, "st.h", "r0:5,r5:5,so10:12", 0, 0, 0, 0 }, -+ { 0x29800000, 0xffc00000, "st.w", "r0:5,r5:5,so10:12", 0, 0, 0, 0 }, -+ { 0x29c00000, 0xffc00000, "st.d", "r0:5,r5:5,so10:12", 0, 0, 0, 0 }, -+ { 0x2a000000, 0xffc00000, "ld.bu", "r0:5,r5:5,so10:12", 0, 0, 0, 0 }, -+ { 0x2a400000, 0xffc00000, "ld.hu", "r0:5,r5:5,so10:12", 0, 0, 0, 0 }, -+ { 0x2a800000, 0xffc00000, "ld.wu", "r0:5,r5:5,so10:12", 0, 0, 0, 0 }, -+ { 0x2ac00000, 0xffc00000, "preld", "u0:5,r5:5,so10:12", 0, 0, 0, 0 }, - { 0x38000000, 0xffff8000, "ldx.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, - { 0x38040000, 0xffff8000, "ldx.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, - { 0x38080000, 0xffff8000, "ldx.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, -@@ -767,35 +906,59 @@ static struct loongarch_opcode loongarch_load_store_opcodes[] = - { 0x387e8000, 0xffff8000, "stle.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, - { 0x387f0000, 0xffff8000, "stle.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, - { 0x387f8000, 0xffff8000, "stle.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, -- { 0 } /* Terminate the list. */ -+ { 0x2c000000, 0xffc00000, "vld", "v0:5,r5:5,so10:12", 0, 0, 0, 0 }, -+ { 0x2c400000, 0xffc00000, "vst", "v0:5,r5:5,so10:12", 0, 0, 0, 0 }, -+ { 0x2c800000, 0xffc00000, "xvld", "x0:5,r5:5,so10:12", 0, 0, 0, 0 }, -+ { 0x2cc00000, 0xffc00000, "xvst", "x0:5,r5:5,so10:12", 0, 0, 0, 0 }, -+ { 0x38400000, 0xffff8000, "vldx", "v0:5,r5:5,r10:5", 0, 0, 0, 0 }, -+ { 0x38440000, 0xffff8000, "vstx", "v0:5,r5:5,r10:5", 0, 0, 0, 0 }, -+ { 0x38480000, 0xffff8000, "xvldx", "x0:5,r5:5,r10:5", 0, 0, 0, 0 }, -+ { 0x384c0000, 0xffff8000, "xvstx", "x0:5,r5:5,r10:5", 0, 0, 0, 0 }, -+ { 0x30100000, 0xfff80000, "vldrepl.d", "v0:5,r5:5,so10:9<<3", 0, 0, 0, 0 }, -+ { 0x30200000, 0xfff00000, "vldrepl.w", "v0:5,r5:5,so10:10<<2", 0, 0, 0, 0 }, -+ { 0x30400000, 0xffe00000, "vldrepl.h", "v0:5,r5:5,so10:11<<1", 0, 0, 0, 0 }, -+ { 0x30800000, 0xffc00000, "vldrepl.b", "v0:5,r5:5,so10:12", 0, 0, 0, 0 }, -+ { 0x31100000, 0xfff80000, "vstelm.d", "v0:5,r5:5,so10:8<<3,u18:1", 0, 0, 0, 0 }, -+ { 0x31200000, 0xfff00000, "vstelm.w", "v0:5,r5:5,so10:8<<2,u18:2", 0, 0, 0, 0 }, -+ { 0x31400000, 0xffe00000, "vstelm.h", "v0:5,r5:5,so10:8<<1,u18:3", 0, 0, 0, 0 }, -+ { 0x31800000, 0xffc00000, "vstelm.b", "v0:5,r5:5,so10:8,u18:4", 0, 0, 0, 0 }, -+ { 0x32100000, 0xfff80000, "xvldrepl.d", "x0:5,r5:5,so10:9<<3", 0, 0, 0, 0 }, -+ { 0x32200000, 0xfff00000, "xvldrepl.w", "x0:5,r5:5,so10:10<<2", 0, 0, 0, 0 }, -+ { 0x32400000, 0xffe00000, "xvldrepl.h", "x0:5,r5:5,so10:11<<1", 0, 0, 0, 0 }, -+ { 0x32800000, 0xffc00000, "xvldrepl.b", "x0:5,r5:5,so10:12", 0, 0, 0, 0 }, -+ { 0x33100000, 0xfff00000, "xvstelm.d", "x0:5,r5:5,so10:8<<3,u18:2", 0, 0, 0, 0 }, -+ { 0x33200000, 0xffe00000, "xvstelm.w", "x0:5,r5:5,so10:8<<2,u18:3", 0, 0, 0, 0 }, -+ { 0x33400000, 0xffc00000, "xvstelm.h", "x0:5,r5:5,so10:8<<1,u18:4", 0, 0, 0, 0 }, -+ { 0x33800000, 0xff800000, "xvstelm.b", "x0:5,r5:5,so10:8,u18:5", 0, 0, 0, 0 }, -+ { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ - }; - - static struct loongarch_opcode loongarch_single_float_load_store_opcodes[] = - { - /* match, mask, name, format, macro, include, exclude, pinfo. */ -- { 0x2b000000, 0xffc00000, "fld.s", "f0:5,r5:5,s10:12", 0, 0, 0, 0 }, -- { 0x2b400000, 0xffc00000, "fst.s", "f0:5,r5:5,s10:12", 0, 0, 0, 0 }, -+ { 0x2b000000, 0xffc00000, "fld.s", "f0:5,r5:5,so10:12", 0, 0, 0, 0 }, -+ { 0x2b400000, 0xffc00000, "fst.s", "f0:5,r5:5,so10:12", 0, 0, 0, 0 }, - { 0x38300000, 0xffff8000, "fldx.s", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, - { 0x38380000, 0xffff8000, "fstx.s", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, - { 0x38740000, 0xffff8000, "fldgt.s", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, - { 0x38750000, 0xffff8000, "fldle.s", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, - { 0x38760000, 0xffff8000, "fstgt.s", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, - { 0x38770000, 0xffff8000, "fstle.s", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, -- { 0 } /* Terminate the list. */ -+ { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ - }; - - static struct loongarch_opcode loongarch_double_float_load_store_opcodes[] = - { - /* match, mask, name, format, macro, include, exclude, pinfo. */ -- { 0x2b800000, 0xffc00000, "fld.d", "f0:5,r5:5,s10:12", 0, 0, 0, 0 }, -- { 0x2bc00000, 0xffc00000, "fst.d", "f0:5,r5:5,s10:12", 0, 0, 0, 0 }, -+ { 0x2b800000, 0xffc00000, "fld.d", "f0:5,r5:5,so10:12", 0, 0, 0, 0 }, -+ { 0x2bc00000, 0xffc00000, "fst.d", "f0:5,r5:5,so10:12", 0, 0, 0, 0 }, - { 0x38340000, 0xffff8000, "fldx.d", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, - { 0x383c0000, 0xffff8000, "fstx.d", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, - { 0x38748000, 0xffff8000, "fldgt.d", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, - { 0x38758000, 0xffff8000, "fldle.d", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, - { 0x38768000, 0xffff8000, "fstgt.d", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, - { 0x38778000, 0xffff8000, "fstle.d", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, -- { 0 } /* Terminate the list. */ -+ { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ - }; - - static struct loongarch_opcode loongarch_float_jmp_opcodes[] = -@@ -804,7 +967,7 @@ static struct loongarch_opcode loongarch_float_jmp_opcodes[] = - { 0x48000000, 0xfc000300, "bceqz", "c5:3,sb0:5|10:16<<2", 0, 0, 0, 0 }, - { 0x0, 0x0, "bcnez", "c,la", "bcnez %1,%%b21(%2)", 0, 0, 0 }, - { 0x48000100, 0xfc000300, "bcnez", "c5:3,sb0:5|10:16<<2", 0, 0, 0, 0 }, -- { 0 } /* Terminate the list. */ -+ { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ - }; - - static struct loongarch_opcode loongarch_jmp_opcodes[] = -@@ -814,7 +977,7 @@ static struct loongarch_opcode loongarch_jmp_opcodes[] = - { 0x40000000, 0xfc000000, "beqz", "r5:5,sb0:5|10:16<<2", 0, 0, 0, 0 }, - { 0x0, 0x0, "bnez", "r,la", "bnez %1,%%b21(%2)", 0, 0, 0 }, - { 0x44000000, 0xfc000000, "bnez", "r5:5,sb0:5|10:16<<2", 0, 0, 0, 0 }, -- { 0x4c000000, 0xfc000000, "jirl", "r0:5,r5:5,s10:16<<2", 0, 0, 0, 0 }, -+ { 0x4c000000, 0xfc000000, "jirl", "r0:5,r5:5,so10:16<<2", 0, 0, 0, 0 }, - { 0x0, 0x0, "b", "la", "b %%b26(%1)", 0, 0, 0 }, - { 0x50000000, 0xfc000000, "b", "sb0:10|10:16<<2", 0, 0, 0, 0 }, - { 0x0, 0x0, "bl", "la", "bl %%b26(%1)", 0, 0, 0 }, -@@ -842,12 +1005,1537 @@ static struct loongarch_opcode loongarch_jmp_opcodes[] = - { 0x0, 0x0, "bleu", "r,r,la", "bgeu %2,%1,%%b16(%3)", 0, 0, 0 }, - { 0x0, 0x0, "jr", "r", "jirl $r0,%1,0", 0, 0, 0 }, - { 0x0, 0x0, "ret", "", "jirl $r0,$r1,0", 0, 0, 0 }, -- { 0 } /* Terminate the list. */ -+ { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ -+}; -+ -+static struct loongarch_opcode loongarch_lsx_opcodes[] = -+{ -+/* match, mask, name, format, macro, include, exclude, pinfo. */ -+ { 0x70000000, 0xffff8000, "vseq.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70008000, 0xffff8000, "vseq.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70010000, 0xffff8000, "vseq.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70018000, 0xffff8000, "vseq.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70020000, 0xffff8000, "vsle.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70028000, 0xffff8000, "vsle.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70030000, 0xffff8000, "vsle.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70038000, 0xffff8000, "vsle.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70040000, 0xffff8000, "vsle.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70048000, 0xffff8000, "vsle.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70050000, 0xffff8000, "vsle.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70058000, 0xffff8000, "vsle.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70060000, 0xffff8000, "vslt.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70068000, 0xffff8000, "vslt.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70070000, 0xffff8000, "vslt.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70078000, 0xffff8000, "vslt.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70080000, 0xffff8000, "vslt.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70088000, 0xffff8000, "vslt.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70090000, 0xffff8000, "vslt.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70098000, 0xffff8000, "vslt.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x700a0000, 0xffff8000, "vadd.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x700a8000, 0xffff8000, "vadd.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x700b0000, 0xffff8000, "vadd.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x700b8000, 0xffff8000, "vadd.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x700c0000, 0xffff8000, "vsub.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x700c8000, 0xffff8000, "vsub.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x700d0000, 0xffff8000, "vsub.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x700d8000, 0xffff8000, "vsub.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70460000, 0xffff8000, "vsadd.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70468000, 0xffff8000, "vsadd.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70470000, 0xffff8000, "vsadd.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70478000, 0xffff8000, "vsadd.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70480000, 0xffff8000, "vssub.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70488000, 0xffff8000, "vssub.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70490000, 0xffff8000, "vssub.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70498000, 0xffff8000, "vssub.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x704a0000, 0xffff8000, "vsadd.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x704a8000, 0xffff8000, "vsadd.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x704b0000, 0xffff8000, "vsadd.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x704b8000, 0xffff8000, "vsadd.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x704c0000, 0xffff8000, "vssub.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x704c8000, 0xffff8000, "vssub.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x704d0000, 0xffff8000, "vssub.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x704d8000, 0xffff8000, "vssub.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70540000, 0xffff8000, "vhaddw.h.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70548000, 0xffff8000, "vhaddw.w.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70550000, 0xffff8000, "vhaddw.d.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70558000, 0xffff8000, "vhaddw.q.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70560000, 0xffff8000, "vhsubw.h.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70568000, 0xffff8000, "vhsubw.w.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70570000, 0xffff8000, "vhsubw.d.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70578000, 0xffff8000, "vhsubw.q.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70580000, 0xffff8000, "vhaddw.hu.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70588000, 0xffff8000, "vhaddw.wu.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70590000, 0xffff8000, "vhaddw.du.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70598000, 0xffff8000, "vhaddw.qu.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x705a0000, 0xffff8000, "vhsubw.hu.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x705a8000, 0xffff8000, "vhsubw.wu.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x705b0000, 0xffff8000, "vhsubw.du.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x705b8000, 0xffff8000, "vhsubw.qu.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x705c0000, 0xffff8000, "vadda.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x705c8000, 0xffff8000, "vadda.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x705d0000, 0xffff8000, "vadda.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x705d8000, 0xffff8000, "vadda.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70600000, 0xffff8000, "vabsd.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70608000, 0xffff8000, "vabsd.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70610000, 0xffff8000, "vabsd.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70618000, 0xffff8000, "vabsd.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70620000, 0xffff8000, "vabsd.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70628000, 0xffff8000, "vabsd.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70630000, 0xffff8000, "vabsd.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70638000, 0xffff8000, "vabsd.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70640000, 0xffff8000, "vavg.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70648000, 0xffff8000, "vavg.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70650000, 0xffff8000, "vavg.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70658000, 0xffff8000, "vavg.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70660000, 0xffff8000, "vavg.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70668000, 0xffff8000, "vavg.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70670000, 0xffff8000, "vavg.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70678000, 0xffff8000, "vavg.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70680000, 0xffff8000, "vavgr.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70688000, 0xffff8000, "vavgr.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70690000, 0xffff8000, "vavgr.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70698000, 0xffff8000, "vavgr.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x706a0000, 0xffff8000, "vavgr.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x706a8000, 0xffff8000, "vavgr.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x706b0000, 0xffff8000, "vavgr.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x706b8000, 0xffff8000, "vavgr.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70700000, 0xffff8000, "vmax.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70708000, 0xffff8000, "vmax.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70710000, 0xffff8000, "vmax.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70718000, 0xffff8000, "vmax.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70720000, 0xffff8000, "vmin.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70728000, 0xffff8000, "vmin.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70730000, 0xffff8000, "vmin.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70738000, 0xffff8000, "vmin.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70740000, 0xffff8000, "vmax.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70748000, 0xffff8000, "vmax.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70750000, 0xffff8000, "vmax.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70758000, 0xffff8000, "vmax.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70760000, 0xffff8000, "vmin.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70768000, 0xffff8000, "vmin.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70770000, 0xffff8000, "vmin.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70778000, 0xffff8000, "vmin.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70840000, 0xffff8000, "vmul.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70848000, 0xffff8000, "vmul.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70850000, 0xffff8000, "vmul.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70858000, 0xffff8000, "vmul.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70860000, 0xffff8000, "vmuh.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70868000, 0xffff8000, "vmuh.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70870000, 0xffff8000, "vmuh.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70878000, 0xffff8000, "vmuh.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70880000, 0xffff8000, "vmuh.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70888000, 0xffff8000, "vmuh.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70890000, 0xffff8000, "vmuh.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70898000, 0xffff8000, "vmuh.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70a80000, 0xffff8000, "vmadd.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70a88000, 0xffff8000, "vmadd.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70a90000, 0xffff8000, "vmadd.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70a98000, 0xffff8000, "vmadd.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70aa0000, 0xffff8000, "vmsub.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70aa8000, 0xffff8000, "vmsub.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70ab0000, 0xffff8000, "vmsub.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70ab8000, 0xffff8000, "vmsub.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70e00000, 0xffff8000, "vdiv.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70e08000, 0xffff8000, "vdiv.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70e10000, 0xffff8000, "vdiv.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70e18000, 0xffff8000, "vdiv.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70e20000, 0xffff8000, "vmod.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70e28000, 0xffff8000, "vmod.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70e30000, 0xffff8000, "vmod.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70e38000, 0xffff8000, "vmod.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70e40000, 0xffff8000, "vdiv.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70e48000, 0xffff8000, "vdiv.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70e50000, 0xffff8000, "vdiv.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70e58000, 0xffff8000, "vdiv.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70e60000, 0xffff8000, "vmod.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70e68000, 0xffff8000, "vmod.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70e70000, 0xffff8000, "vmod.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70e78000, 0xffff8000, "vmod.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70e80000, 0xffff8000, "vsll.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70e88000, 0xffff8000, "vsll.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70e90000, 0xffff8000, "vsll.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70e98000, 0xffff8000, "vsll.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70ea0000, 0xffff8000, "vsrl.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70ea8000, 0xffff8000, "vsrl.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70eb0000, 0xffff8000, "vsrl.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70eb8000, 0xffff8000, "vsrl.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70ec0000, 0xffff8000, "vsra.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70ec8000, 0xffff8000, "vsra.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70ed0000, 0xffff8000, "vsra.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70ed8000, 0xffff8000, "vsra.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70ee0000, 0xffff8000, "vrotr.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70ee8000, 0xffff8000, "vrotr.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70ef0000, 0xffff8000, "vrotr.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70ef8000, 0xffff8000, "vrotr.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70f00000, 0xffff8000, "vsrlr.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70f08000, 0xffff8000, "vsrlr.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70f10000, 0xffff8000, "vsrlr.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70f18000, 0xffff8000, "vsrlr.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70f20000, 0xffff8000, "vsrar.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70f28000, 0xffff8000, "vsrar.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70f30000, 0xffff8000, "vsrar.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70f38000, 0xffff8000, "vsrar.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70f48000, 0xffff8000, "vsrln.b.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70f50000, 0xffff8000, "vsrln.h.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70f58000, 0xffff8000, "vsrln.w.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70f68000, 0xffff8000, "vsran.b.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70f70000, 0xffff8000, "vsran.h.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70f78000, 0xffff8000, "vsran.w.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70f88000, 0xffff8000, "vsrlrn.b.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70f90000, 0xffff8000, "vsrlrn.h.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70f98000, 0xffff8000, "vsrlrn.w.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70fa8000, 0xffff8000, "vsrarn.b.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70fb0000, 0xffff8000, "vsrarn.h.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70fb8000, 0xffff8000, "vsrarn.w.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70fc8000, 0xffff8000, "vssrln.b.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70fd0000, 0xffff8000, "vssrln.h.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70fd8000, 0xffff8000, "vssrln.w.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70fe8000, 0xffff8000, "vssran.b.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70ff0000, 0xffff8000, "vssran.h.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70ff8000, 0xffff8000, "vssran.w.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71008000, 0xffff8000, "vssrlrn.b.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71010000, 0xffff8000, "vssrlrn.h.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71018000, 0xffff8000, "vssrlrn.w.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71028000, 0xffff8000, "vssrarn.b.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71030000, 0xffff8000, "vssrarn.h.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71038000, 0xffff8000, "vssrarn.w.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71048000, 0xffff8000, "vssrln.bu.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71050000, 0xffff8000, "vssrln.hu.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71058000, 0xffff8000, "vssrln.wu.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71068000, 0xffff8000, "vssran.bu.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71070000, 0xffff8000, "vssran.hu.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71078000, 0xffff8000, "vssran.wu.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71088000, 0xffff8000, "vssrlrn.bu.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71090000, 0xffff8000, "vssrlrn.hu.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71098000, 0xffff8000, "vssrlrn.wu.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x710a8000, 0xffff8000, "vssrarn.bu.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x710b0000, 0xffff8000, "vssrarn.hu.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x710b8000, 0xffff8000, "vssrarn.wu.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x710c0000, 0xffff8000, "vbitclr.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x710c8000, 0xffff8000, "vbitclr.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x710d0000, 0xffff8000, "vbitclr.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x710d8000, 0xffff8000, "vbitclr.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x710e0000, 0xffff8000, "vbitset.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x710e8000, 0xffff8000, "vbitset.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x710f0000, 0xffff8000, "vbitset.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x710f8000, 0xffff8000, "vbitset.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71100000, 0xffff8000, "vbitrev.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71108000, 0xffff8000, "vbitrev.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71110000, 0xffff8000, "vbitrev.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71118000, 0xffff8000, "vbitrev.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71160000, 0xffff8000, "vpackev.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71168000, 0xffff8000, "vpackev.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71170000, 0xffff8000, "vpackev.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71178000, 0xffff8000, "vpackev.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71180000, 0xffff8000, "vpackod.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71188000, 0xffff8000, "vpackod.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71190000, 0xffff8000, "vpackod.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71198000, 0xffff8000, "vpackod.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x711a0000, 0xffff8000, "vilvl.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x711a8000, 0xffff8000, "vilvl.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x711b0000, 0xffff8000, "vilvl.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x711b8000, 0xffff8000, "vilvl.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x711c0000, 0xffff8000, "vilvh.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x711c8000, 0xffff8000, "vilvh.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x711d0000, 0xffff8000, "vilvh.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x711d8000, 0xffff8000, "vilvh.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x711e0000, 0xffff8000, "vpickev.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x711e8000, 0xffff8000, "vpickev.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x711f0000, 0xffff8000, "vpickev.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x711f8000, 0xffff8000, "vpickev.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71200000, 0xffff8000, "vpickod.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71208000, 0xffff8000, "vpickod.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71210000, 0xffff8000, "vpickod.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71218000, 0xffff8000, "vpickod.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71220000, 0xffff8000, "vreplve.b", "v0:5,v5:5,r10:5", 0, 0, 0, 0}, -+ { 0x71228000, 0xffff8000, "vreplve.h", "v0:5,v5:5,r10:5", 0, 0, 0, 0}, -+ { 0x71230000, 0xffff8000, "vreplve.w", "v0:5,v5:5,r10:5", 0, 0, 0, 0}, -+ { 0x71238000, 0xffff8000, "vreplve.d", "v0:5,v5:5,r10:5", 0, 0, 0, 0}, -+ { 0x71260000, 0xffff8000, "vand.v", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71268000, 0xffff8000, "vor.v", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71270000, 0xffff8000, "vxor.v", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71278000, 0xffff8000, "vnor.v", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71280000, 0xffff8000, "vandn.v", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71288000, 0xffff8000, "vorn.v", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x712b0000, 0xffff8000, "vfrstp.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x712b8000, 0xffff8000, "vfrstp.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x712d0000, 0xffff8000, "vadd.q", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x712d8000, 0xffff8000, "vsub.q", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x712e0000, 0xffff8000, "vsigncov.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x712e8000, 0xffff8000, "vsigncov.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x712f0000, 0xffff8000, "vsigncov.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x712f8000, 0xffff8000, "vsigncov.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71308000, 0xffff8000, "vfadd.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71310000, 0xffff8000, "vfadd.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71328000, 0xffff8000, "vfsub.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71330000, 0xffff8000, "vfsub.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71388000, 0xffff8000, "vfmul.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71390000, 0xffff8000, "vfmul.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x713a8000, 0xffff8000, "vfdiv.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x713b0000, 0xffff8000, "vfdiv.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x713c8000, 0xffff8000, "vfmax.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x713d0000, 0xffff8000, "vfmax.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x713e8000, 0xffff8000, "vfmin.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x713f0000, 0xffff8000, "vfmin.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71408000, 0xffff8000, "vfmaxa.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71410000, 0xffff8000, "vfmaxa.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71428000, 0xffff8000, "vfmina.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71430000, 0xffff8000, "vfmina.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71460000, 0xffff8000, "vfcvt.h.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71468000, 0xffff8000, "vfcvt.s.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71480000, 0xffff8000, "vffint.s.l", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x71498000, 0xffff8000, "vftint.w.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x714a0000, 0xffff8000, "vftintrm.w.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x714a8000, 0xffff8000, "vftintrp.w.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x714b0000, 0xffff8000, "vftintrz.w.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x714b8000, 0xffff8000, "vftintrne.w.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x717a8000, 0xffff8000, "vshuf.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x717b0000, 0xffff8000, "vshuf.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x717b8000, 0xffff8000, "vshuf.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x72800000, 0xffff8000, "vseqi.b", "v0:5,v5:5,s10:5", 0, 0, 0, 0}, -+ { 0x72808000, 0xffff8000, "vseqi.h", "v0:5,v5:5,s10:5", 0, 0, 0, 0}, -+ { 0x72810000, 0xffff8000, "vseqi.w", "v0:5,v5:5,s10:5", 0, 0, 0, 0}, -+ { 0x72818000, 0xffff8000, "vseqi.d", "v0:5,v5:5,s10:5", 0, 0, 0, 0}, -+ { 0x72820000, 0xffff8000, "vslei.b", "v0:5,v5:5,s10:5", 0, 0, 0, 0}, -+ { 0x72828000, 0xffff8000, "vslei.h", "v0:5,v5:5,s10:5", 0, 0, 0, 0}, -+ { 0x72830000, 0xffff8000, "vslei.w", "v0:5,v5:5,s10:5", 0, 0, 0, 0}, -+ { 0x72838000, 0xffff8000, "vslei.d", "v0:5,v5:5,s10:5", 0, 0, 0, 0}, -+ { 0x72840000, 0xffff8000, "vslei.bu", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x72848000, 0xffff8000, "vslei.hu", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x72850000, 0xffff8000, "vslei.wu", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x72858000, 0xffff8000, "vslei.du", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x72860000, 0xffff8000, "vslti.b", "v0:5,v5:5,s10:5", 0, 0, 0, 0}, -+ { 0x72868000, 0xffff8000, "vslti.h", "v0:5,v5:5,s10:5", 0, 0, 0, 0}, -+ { 0x72870000, 0xffff8000, "vslti.w", "v0:5,v5:5,s10:5", 0, 0, 0, 0}, -+ { 0x72878000, 0xffff8000, "vslti.d", "v0:5,v5:5,s10:5", 0, 0, 0, 0}, -+ { 0x72880000, 0xffff8000, "vslti.bu", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x72888000, 0xffff8000, "vslti.hu", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x72890000, 0xffff8000, "vslti.wu", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x72898000, 0xffff8000, "vslti.du", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x728a0000, 0xffff8000, "vaddi.bu", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x728a8000, 0xffff8000, "vaddi.hu", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x728b0000, 0xffff8000, "vaddi.wu", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x728b8000, 0xffff8000, "vaddi.du", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x728c0000, 0xffff8000, "vsubi.bu", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x728c8000, 0xffff8000, "vsubi.hu", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x728d0000, 0xffff8000, "vsubi.wu", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x728d8000, 0xffff8000, "vsubi.du", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x728e0000, 0xffff8000, "vbsll.v", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x728e8000, 0xffff8000, "vbsrl.v", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x72900000, 0xffff8000, "vmaxi.b", "v0:5,v5:5,s10:5", 0, 0, 0, 0}, -+ { 0x72908000, 0xffff8000, "vmaxi.h", "v0:5,v5:5,s10:5", 0, 0, 0, 0}, -+ { 0x72910000, 0xffff8000, "vmaxi.w", "v0:5,v5:5,s10:5", 0, 0, 0, 0}, -+ { 0x72918000, 0xffff8000, "vmaxi.d", "v0:5,v5:5,s10:5", 0, 0, 0, 0}, -+ { 0x72920000, 0xffff8000, "vmini.b", "v0:5,v5:5,s10:5", 0, 0, 0, 0}, -+ { 0x72928000, 0xffff8000, "vmini.h", "v0:5,v5:5,s10:5", 0, 0, 0, 0}, -+ { 0x72930000, 0xffff8000, "vmini.w", "v0:5,v5:5,s10:5", 0, 0, 0, 0}, -+ { 0x72938000, 0xffff8000, "vmini.d", "v0:5,v5:5,s10:5", 0, 0, 0, 0}, -+ { 0x72940000, 0xffff8000, "vmaxi.bu", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x72948000, 0xffff8000, "vmaxi.hu", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x72950000, 0xffff8000, "vmaxi.wu", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x72958000, 0xffff8000, "vmaxi.du", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x72960000, 0xffff8000, "vmini.bu", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x72968000, 0xffff8000, "vmini.hu", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x72970000, 0xffff8000, "vmini.wu", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x72978000, 0xffff8000, "vmini.du", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x729a0000, 0xffff8000, "vfrstpi.b", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x729a8000, 0xffff8000, "vfrstpi.h", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x729c0000, 0xfffffc00, "vclo.b", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729c0400, 0xfffffc00, "vclo.h", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729c0800, 0xfffffc00, "vclo.w", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729c0c00, 0xfffffc00, "vclo.d", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729c1000, 0xfffffc00, "vclz.b", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729c1400, 0xfffffc00, "vclz.h", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729c1800, 0xfffffc00, "vclz.w", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729c1c00, 0xfffffc00, "vclz.d", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729c2000, 0xfffffc00, "vpcnt.b", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729c2400, 0xfffffc00, "vpcnt.h", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729c2800, 0xfffffc00, "vpcnt.w", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729c2c00, 0xfffffc00, "vpcnt.d", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729c3000, 0xfffffc00, "vneg.b", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729c3400, 0xfffffc00, "vneg.h", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729c3800, 0xfffffc00, "vneg.w", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729c3c00, 0xfffffc00, "vneg.d", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729c4000, 0xfffffc00, "vmskltz.b", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729c4400, 0xfffffc00, "vmskltz.h", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729c4800, 0xfffffc00, "vmskltz.w", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729c4c00, 0xfffffc00, "vmskltz.d", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729c5000, 0xfffffc00, "vmskgez.b", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729c6000, 0xfffffc00, "vmsknz.b", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729c9800, 0xfffffc18, "vseteqz.v", "c0:3,v5:5", 0, 0, 0, 0}, -+ { 0x729c9c00, 0xfffffc18, "vsetnez.v", "c0:3,v5:5", 0, 0, 0, 0}, -+ { 0x729ca000, 0xfffffc18, "vsetanyeqz.b", "c0:3,v5:5", 0, 0, 0, 0}, -+ { 0x729ca400, 0xfffffc18, "vsetanyeqz.h", "c0:3,v5:5", 0, 0, 0, 0}, -+ { 0x729ca800, 0xfffffc18, "vsetanyeqz.w", "c0:3,v5:5", 0, 0, 0, 0}, -+ { 0x729cac00, 0xfffffc18, "vsetanyeqz.d", "c0:3,v5:5", 0, 0, 0, 0}, -+ { 0x729cb000, 0xfffffc18, "vsetallnez.b", "c0:3,v5:5", 0, 0, 0, 0}, -+ { 0x729cb400, 0xfffffc18, "vsetallnez.h", "c0:3,v5:5", 0, 0, 0, 0}, -+ { 0x729cb800, 0xfffffc18, "vsetallnez.w", "c0:3,v5:5", 0, 0, 0, 0}, -+ { 0x729cbc00, 0xfffffc18, "vsetallnez.d", "c0:3,v5:5", 0, 0, 0, 0}, -+ { 0x729cc400, 0xfffffc00, "vflogb.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729cc800, 0xfffffc00, "vflogb.d", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729cd400, 0xfffffc00, "vfclass.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729cd800, 0xfffffc00, "vfclass.d", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729ce400, 0xfffffc00, "vfsqrt.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729ce800, 0xfffffc00, "vfsqrt.d", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729cf400, 0xfffffc00, "vfrecip.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729cf800, 0xfffffc00, "vfrecip.d", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729d0400, 0xfffffc00, "vfrsqrt.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729d0800, 0xfffffc00, "vfrsqrt.d", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729d3400, 0xfffffc00, "vfrint.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729d3800, 0xfffffc00, "vfrint.d", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729d4400, 0xfffffc00, "vfrintrm.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729d4800, 0xfffffc00, "vfrintrm.d", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729d5400, 0xfffffc00, "vfrintrp.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729d5800, 0xfffffc00, "vfrintrp.d", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729d6400, 0xfffffc00, "vfrintrz.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729d6800, 0xfffffc00, "vfrintrz.d", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729d7400, 0xfffffc00, "vfrintrne.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729d7800, 0xfffffc00, "vfrintrne.d", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729de800, 0xfffffc00, "vfcvtl.s.h", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729dec00, 0xfffffc00, "vfcvth.s.h", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729df000, 0xfffffc00, "vfcvtl.d.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729df400, 0xfffffc00, "vfcvth.d.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e0000, 0xfffffc00, "vffint.s.w", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e0400, 0xfffffc00, "vffint.s.wu", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e0800, 0xfffffc00, "vffint.d.l", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e0c00, 0xfffffc00, "vffint.d.lu", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e1000, 0xfffffc00, "vffintl.d.w", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e1400, 0xfffffc00, "vffinth.d.w", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e3000, 0xfffffc00, "vftint.w.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e3400, 0xfffffc00, "vftint.l.d", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e3800, 0xfffffc00, "vftintrm.w.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e3c00, 0xfffffc00, "vftintrm.l.d", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e4000, 0xfffffc00, "vftintrp.w.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e4400, 0xfffffc00, "vftintrp.l.d", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e4800, 0xfffffc00, "vftintrz.w.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e4c00, 0xfffffc00, "vftintrz.l.d", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e5000, 0xfffffc00, "vftintrne.w.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e5400, 0xfffffc00, "vftintrne.l.d", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e5800, 0xfffffc00, "vftint.wu.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e5c00, 0xfffffc00, "vftint.lu.d", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e7000, 0xfffffc00, "vftintrz.wu.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e7400, 0xfffffc00, "vftintrz.lu.d", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e8000, 0xfffffc00, "vftintl.l.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e8400, 0xfffffc00, "vftinth.l.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e8800, 0xfffffc00, "vftintrml.l.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e8c00, 0xfffffc00, "vftintrmh.l.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e9000, 0xfffffc00, "vftintrpl.l.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e9400, 0xfffffc00, "vftintrph.l.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e9800, 0xfffffc00, "vftintrzl.l.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729e9c00, 0xfffffc00, "vftintrzh.l.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729ea000, 0xfffffc00, "vftintrnel.l.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729ea400, 0xfffffc00, "vftintrneh.l.s", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729ee000, 0xfffffc00, "vexth.h.b", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729ee400, 0xfffffc00, "vexth.w.h", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729ee800, 0xfffffc00, "vexth.d.w", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729eec00, 0xfffffc00, "vexth.q.d", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729ef000, 0xfffffc00, "vexth.hu.bu", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729ef400, 0xfffffc00, "vexth.wu.hu", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729ef800, 0xfffffc00, "vexth.du.wu", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729efc00, 0xfffffc00, "vexth.qu.du", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x729f0000, 0xfffffc00, "vreplgr2vr.b", "v0:5,r5:5", 0, 0, 0, 0}, -+ { 0x729f0400, 0xfffffc00, "vreplgr2vr.h", "v0:5,r5:5", 0, 0, 0, 0}, -+ { 0x729f0800, 0xfffffc00, "vreplgr2vr.w", "v0:5,r5:5", 0, 0, 0, 0}, -+ { 0x729f0c00, 0xfffffc00, "vreplgr2vr.d", "v0:5,r5:5", 0, 0, 0, 0}, -+ { 0x72a02000, 0xffffe000, "vrotri.b", "v0:5,v5:5,u10:3", 0, 0, 0, 0}, -+ { 0x72a04000, 0xffffc000, "vrotri.h", "v0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x72a08000, 0xffff8000, "vrotri.w", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x72a10000, 0xffff0000, "vrotri.d", "v0:5,v5:5,u10:6", 0, 0, 0, 0}, -+ { 0x72a42000, 0xffffe000, "vsrlri.b", "v0:5,v5:5,u10:3", 0, 0, 0, 0}, -+ { 0x72a44000, 0xffffc000, "vsrlri.h", "v0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x72a48000, 0xffff8000, "vsrlri.w", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x72a50000, 0xffff0000, "vsrlri.d", "v0:5,v5:5,u10:6", 0, 0, 0, 0}, -+ { 0x72a82000, 0xffffe000, "vsrari.b", "v0:5,v5:5,u10:3", 0, 0, 0, 0}, -+ { 0x72a84000, 0xffffc000, "vsrari.h", "v0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x72a88000, 0xffff8000, "vsrari.w", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x72a90000, 0xffff0000, "vsrari.d", "v0:5,v5:5,u10:6", 0, 0, 0, 0}, -+ { 0x72eb8000, 0xffffc000, "vinsgr2vr.b", "v0:5,r5:5,u10:4", 0, 0, 0, 0}, -+ { 0x72ebc000, 0xffffe000, "vinsgr2vr.h", "v0:5,r5:5,u10:3", 0, 0, 0, 0}, -+ { 0x72ebe000, 0xfffff000, "vinsgr2vr.w", "v0:5,r5:5,u10:2", 0, 0, 0, 0}, -+ { 0x72ebf000, 0xfffff800, "vinsgr2vr.d", "v0:5,r5:5,u10:1", 0, 0, 0, 0}, -+ { 0x72ef8000, 0xffffc000, "vpickve2gr.b", "r0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x72efc000, 0xffffe000, "vpickve2gr.h", "r0:5,v5:5,u10:3", 0, 0, 0, 0}, -+ { 0x72efe000, 0xfffff000, "vpickve2gr.w", "r0:5,v5:5,u10:2", 0, 0, 0, 0}, -+ { 0x72eff000, 0xfffff800, "vpickve2gr.d", "r0:5,v5:5,u10:1", 0, 0, 0, 0}, -+ { 0x72f38000, 0xffffc000, "vpickve2gr.bu", "r0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x72f3c000, 0xffffe000, "vpickve2gr.hu", "r0:5,v5:5,u10:3", 0, 0, 0, 0}, -+ { 0x72f3e000, 0xfffff000, "vpickve2gr.wu", "r0:5,v5:5,u10:2", 0, 0, 0, 0}, -+ { 0x72f3f000, 0xfffff800, "vpickve2gr.du", "r0:5,v5:5,u10:1", 0, 0, 0, 0}, -+ { 0x72f78000, 0xffffc000, "vreplvei.b", "v0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x72f7c000, 0xffffe000, "vreplvei.h", "v0:5,v5:5,u10:3", 0, 0, 0, 0}, -+ { 0x72f7e000, 0xfffff000, "vreplvei.w", "v0:5,v5:5,u10:2", 0, 0, 0, 0}, -+ { 0x72f7f000, 0xfffff800, "vreplvei.d", "v0:5,v5:5,u10:1", 0, 0, 0, 0}, -+ { 0x73082000, 0xffffe000, "vsllwil.h.b", "v0:5,v5:5,u10:3", 0, 0, 0, 0}, -+ { 0x73084000, 0xffffc000, "vsllwil.w.h", "v0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x73088000, 0xffff8000, "vsllwil.d.w", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x73090000, 0xfffffc00, "vextl.q.d", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x730c2000, 0xffffe000, "vsllwil.hu.bu", "v0:5,v5:5,u10:3", 0, 0, 0, 0}, -+ { 0x730c4000, 0xffffc000, "vsllwil.wu.hu", "v0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x730c8000, 0xffff8000, "vsllwil.du.wu", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x730d0000, 0xfffffc00, "vextl.qu.du", "v0:5,v5:5", 0, 0, 0, 0}, -+ { 0x73102000, 0xffffe000, "vbitclri.b", "v0:5,v5:5,u10:3", 0, 0, 0, 0}, -+ { 0x73104000, 0xffffc000, "vbitclri.h", "v0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x73108000, 0xffff8000, "vbitclri.w", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x73110000, 0xffff0000, "vbitclri.d", "v0:5,v5:5,u10:6", 0, 0, 0, 0}, -+ { 0x73142000, 0xffffe000, "vbitseti.b", "v0:5,v5:5,u10:3", 0, 0, 0, 0}, -+ { 0x73144000, 0xffffc000, "vbitseti.h", "v0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x73148000, 0xffff8000, "vbitseti.w", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x73150000, 0xffff0000, "vbitseti.d", "v0:5,v5:5,u10:6", 0, 0, 0, 0}, -+ { 0x73182000, 0xffffe000, "vbitrevi.b", "v0:5,v5:5,u10:3", 0, 0, 0, 0}, -+ { 0x73184000, 0xffffc000, "vbitrevi.h", "v0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x73188000, 0xffff8000, "vbitrevi.w", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x73190000, 0xffff0000, "vbitrevi.d", "v0:5,v5:5,u10:6", 0, 0, 0, 0}, -+ { 0x73242000, 0xffffe000, "vsat.b", "v0:5,v5:5,u10:3", 0, 0, 0, 0}, -+ { 0x73244000, 0xffffc000, "vsat.h", "v0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x73248000, 0xffff8000, "vsat.w", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x73250000, 0xffff0000, "vsat.d", "v0:5,v5:5,u10:6", 0, 0, 0, 0}, -+ { 0x73282000, 0xffffe000, "vsat.bu", "v0:5,v5:5,u10:3", 0, 0, 0, 0}, -+ { 0x73284000, 0xffffc000, "vsat.hu", "v0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x73288000, 0xffff8000, "vsat.wu", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x73290000, 0xffff0000, "vsat.du", "v0:5,v5:5,u10:6", 0, 0, 0, 0}, -+ { 0x732c2000, 0xffffe000, "vslli.b", "v0:5,v5:5,u10:3", 0, 0, 0, 0}, -+ { 0x732c4000, 0xffffc000, "vslli.h", "v0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x732c8000, 0xffff8000, "vslli.w", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x732d0000, 0xffff0000, "vslli.d", "v0:5,v5:5,u10:6", 0, 0, 0, 0}, -+ { 0x73302000, 0xffffe000, "vsrli.b", "v0:5,v5:5,u10:3", 0, 0, 0, 0}, -+ { 0x73304000, 0xffffc000, "vsrli.h", "v0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x73308000, 0xffff8000, "vsrli.w", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x73310000, 0xffff0000, "vsrli.d", "v0:5,v5:5,u10:6", 0, 0, 0, 0}, -+ { 0x73342000, 0xffffe000, "vsrai.b", "v0:5,v5:5,u10:3", 0, 0, 0, 0}, -+ { 0x73344000, 0xffffc000, "vsrai.h", "v0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x73348000, 0xffff8000, "vsrai.w", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x73350000, 0xffff0000, "vsrai.d", "v0:5,v5:5,u10:6", 0, 0, 0, 0}, -+ { 0x73404000, 0xffffc000, "vsrlni.b.h", "v0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x73408000, 0xffff8000, "vsrlni.h.w", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x73410000, 0xffff0000, "vsrlni.w.d", "v0:5,v5:5,u10:6", 0, 0, 0, 0}, -+ { 0x73420000, 0xfffe0000, "vsrlni.d.q", "v0:5,v5:5,u10:7", 0, 0, 0, 0}, -+ { 0x73484000, 0xffffc000, "vssrlni.b.h", "v0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x73488000, 0xffff8000, "vssrlni.h.w", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x73490000, 0xffff0000, "vssrlni.w.d", "v0:5,v5:5,u10:6", 0, 0, 0, 0}, -+ { 0x734a0000, 0xfffe0000, "vssrlni.d.q", "v0:5,v5:5,u10:7", 0, 0, 0, 0}, -+ { 0x73444000, 0xffffc000, "vsrlrni.b.h", "v0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x73448000, 0xffff8000, "vsrlrni.h.w", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x73450000, 0xffff0000, "vsrlrni.w.d", "v0:5,v5:5,u10:6", 0, 0, 0, 0}, -+ { 0x73460000, 0xfffe0000, "vsrlrni.d.q", "v0:5,v5:5,u10:7", 0, 0, 0, 0}, -+ { 0x734c4000, 0xffffc000, "vssrlni.bu.h", "v0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x734c8000, 0xffff8000, "vssrlni.hu.w", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x734d0000, 0xffff0000, "vssrlni.wu.d", "v0:5,v5:5,u10:6", 0, 0, 0, 0}, -+ { 0x734e0000, 0xfffe0000, "vssrlni.du.q", "v0:5,v5:5,u10:7", 0, 0, 0, 0}, -+ { 0x73504000, 0xffffc000, "vssrlrni.b.h", "v0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x73508000, 0xffff8000, "vssrlrni.h.w", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x73510000, 0xffff0000, "vssrlrni.w.d", "v0:5,v5:5,u10:6", 0, 0, 0, 0}, -+ { 0x73520000, 0xfffe0000, "vssrlrni.d.q", "v0:5,v5:5,u10:7", 0, 0, 0, 0}, -+ { 0x73544000, 0xffffc000, "vssrlrni.bu.h", "v0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x73548000, 0xffff8000, "vssrlrni.hu.w", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x73550000, 0xffff0000, "vssrlrni.wu.d", "v0:5,v5:5,u10:6", 0, 0, 0, 0}, -+ { 0x73560000, 0xfffe0000, "vssrlrni.du.q", "v0:5,v5:5,u10:7", 0, 0, 0, 0}, -+ { 0x73584000, 0xffffc000, "vsrani.b.h", "v0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x73588000, 0xffff8000, "vsrani.h.w", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x73590000, 0xffff0000, "vsrani.w.d", "v0:5,v5:5,u10:6", 0, 0, 0, 0}, -+ { 0x735a0000, 0xfffe0000, "vsrani.d.q", "v0:5,v5:5,u10:7", 0, 0, 0, 0}, -+ { 0x735c4000, 0xffffc000, "vsrarni.b.h", "v0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x735c8000, 0xffff8000, "vsrarni.h.w", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x735d0000, 0xffff0000, "vsrarni.w.d", "v0:5,v5:5,u10:6", 0, 0, 0, 0}, -+ { 0x735e0000, 0xfffe0000, "vsrarni.d.q", "v0:5,v5:5,u10:7", 0, 0, 0, 0}, -+ { 0x73604000, 0xffffc000, "vssrani.b.h", "v0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x73608000, 0xffff8000, "vssrani.h.w", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x73610000, 0xffff0000, "vssrani.w.d", "v0:5,v5:5,u10:6", 0, 0, 0, 0}, -+ { 0x73620000, 0xfffe0000, "vssrani.d.q", "v0:5,v5:5,u10:7", 0, 0, 0, 0}, -+ { 0x73644000, 0xffffc000, "vssrani.bu.h", "v0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x73648000, 0xffff8000, "vssrani.hu.w", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x73650000, 0xffff0000, "vssrani.wu.d", "v0:5,v5:5,u10:6", 0, 0, 0, 0}, -+ { 0x73660000, 0xfffe0000, "vssrani.du.q", "v0:5,v5:5,u10:7", 0, 0, 0, 0}, -+ { 0x73684000, 0xffffc000, "vssrarni.b.h", "v0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x73688000, 0xffff8000, "vssrarni.h.w", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x73690000, 0xffff0000, "vssrarni.w.d", "v0:5,v5:5,u10:6", 0, 0, 0, 0}, -+ { 0x736a0000, 0xfffe0000, "vssrarni.d.q", "v0:5,v5:5,u10:7", 0, 0, 0, 0}, -+ { 0x736c4000, 0xffffc000, "vssrarni.bu.h", "v0:5,v5:5,u10:4", 0, 0, 0, 0}, -+ { 0x736c8000, 0xffff8000, "vssrarni.hu.w", "v0:5,v5:5,u10:5", 0, 0, 0, 0}, -+ { 0x736d0000, 0xffff0000, "vssrarni.wu.d", "v0:5,v5:5,u10:6", 0, 0, 0, 0}, -+ { 0x736e0000, 0xfffe0000, "vssrarni.du.q", "v0:5,v5:5,u10:7", 0, 0, 0, 0}, -+ { 0x73800000, 0xfffc0000, "vextrins.d", "v0:5,v5:5,u10:8", 0, 0, 0, 0}, -+ { 0x73840000, 0xfffc0000, "vextrins.w", "v0:5,v5:5,u10:8", 0, 0, 0, 0}, -+ { 0x73880000, 0xfffc0000, "vextrins.h", "v0:5,v5:5,u10:8", 0, 0, 0, 0}, -+ { 0x738c0000, 0xfffc0000, "vextrins.b", "v0:5,v5:5,u10:8", 0, 0, 0, 0}, -+ { 0x73900000, 0xfffc0000, "vshuf4i.b", "v0:5,v5:5,u10:8", 0, 0, 0, 0}, -+ { 0x73940000, 0xfffc0000, "vshuf4i.h", "v0:5,v5:5,u10:8", 0, 0, 0, 0}, -+ { 0x73980000, 0xfffc0000, "vshuf4i.w", "v0:5,v5:5,u10:8", 0, 0, 0, 0}, -+ { 0x739c0000, 0xfffc0000, "vshuf4i.d", "v0:5,v5:5,u10:8", 0, 0, 0, 0}, -+ { 0x73c40000, 0xfffc0000, "vbitseli.b", "v0:5,v5:5,u10:8", 0, 0, 0, 0}, -+ { 0x73d00000, 0xfffc0000, "vandi.b", "v0:5,v5:5,u10:8", 0, 0, 0, 0}, -+ { 0x73d40000, 0xfffc0000, "vori.b", "v0:5,v5:5,u10:8", 0, 0, 0, 0}, -+ { 0x73d80000, 0xfffc0000, "vxori.b", "v0:5,v5:5,u10:8", 0, 0, 0, 0}, -+ { 0x73dc0000, 0xfffc0000, "vnori.b", "v0:5,v5:5,u10:8", 0, 0, 0, 0}, -+ { 0, 0, "vrepli.b", "v,s0:10", "vldi %1,(%2)&0x3ff", 0, 0, 0}, -+ { 0x701e0000, 0xffff8000, "vaddwev.h.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x701e8000, 0xffff8000, "vaddwev.w.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x701f0000, 0xffff8000, "vaddwev.d.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x701f8000, 0xffff8000, "vaddwev.q.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x702e0000, 0xffff8000, "vaddwev.h.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x702e8000, 0xffff8000, "vaddwev.w.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x702f0000, 0xffff8000, "vaddwev.d.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x702f8000, 0xffff8000, "vaddwev.q.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x703e0000, 0xffff8000, "vaddwev.h.bu.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x703e8000, 0xffff8000, "vaddwev.w.hu.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x703f0000, 0xffff8000, "vaddwev.d.wu.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x703f8000, 0xffff8000, "vaddwev.q.du.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70220000, 0xffff8000, "vaddwod.h.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70228000, 0xffff8000, "vaddwod.w.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70230000, 0xffff8000, "vaddwod.d.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70238000, 0xffff8000, "vaddwod.q.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70320000, 0xffff8000, "vaddwod.h.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70328000, 0xffff8000, "vaddwod.w.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70330000, 0xffff8000, "vaddwod.d.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70338000, 0xffff8000, "vaddwod.q.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70400000, 0xffff8000, "vaddwod.h.bu.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70408000, 0xffff8000, "vaddwod.w.hu.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70410000, 0xffff8000, "vaddwod.d.wu.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70418000, 0xffff8000, "vaddwod.q.du.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70ac0000, 0xffff8000, "vmaddwev.h.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70ac8000, 0xffff8000, "vmaddwev.w.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70ad0000, 0xffff8000, "vmaddwev.d.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70ad8000, 0xffff8000, "vmaddwev.q.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70b40000, 0xffff8000, "vmaddwev.h.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70b48000, 0xffff8000, "vmaddwev.w.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70b50000, 0xffff8000, "vmaddwev.d.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70b58000, 0xffff8000, "vmaddwev.q.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70bc0000, 0xffff8000, "vmaddwev.h.bu.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70bc8000, 0xffff8000, "vmaddwev.w.hu.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70bd0000, 0xffff8000, "vmaddwev.d.wu.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70bd8000, 0xffff8000, "vmaddwev.q.du.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70ae0000, 0xffff8000, "vmaddwod.h.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70ae8000, 0xffff8000, "vmaddwod.w.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70af0000, 0xffff8000, "vmaddwod.d.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70af8000, 0xffff8000, "vmaddwod.q.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70b60000, 0xffff8000, "vmaddwod.h.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70b68000, 0xffff8000, "vmaddwod.w.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70b70000, 0xffff8000, "vmaddwod.d.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70b78000, 0xffff8000, "vmaddwod.q.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70be0000, 0xffff8000, "vmaddwod.h.bu.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70be8000, 0xffff8000, "vmaddwod.w.hu.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70bf0000, 0xffff8000, "vmaddwod.d.wu.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70bf8000, 0xffff8000, "vmaddwod.q.du.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70900000, 0xffff8000, "vmulwev.h.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70908000, 0xffff8000, "vmulwev.w.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70910000, 0xffff8000, "vmulwev.d.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70918000, 0xffff8000, "vmulwev.q.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70980000, 0xffff8000, "vmulwev.h.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70988000, 0xffff8000, "vmulwev.w.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70990000, 0xffff8000, "vmulwev.d.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70998000, 0xffff8000, "vmulwev.q.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70a00000, 0xffff8000, "vmulwev.h.bu.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70a08000, 0xffff8000, "vmulwev.w.hu.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70a10000, 0xffff8000, "vmulwev.d.wu.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70a18000, 0xffff8000, "vmulwev.q.du.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70920000, 0xffff8000, "vmulwod.h.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70928000, 0xffff8000, "vmulwod.w.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70930000, 0xffff8000, "vmulwod.d.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70938000, 0xffff8000, "vmulwod.q.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x709a0000, 0xffff8000, "vmulwod.h.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x709a8000, 0xffff8000, "vmulwod.w.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x709b0000, 0xffff8000, "vmulwod.d.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x709b8000, 0xffff8000, "vmulwod.q.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70a20000, 0xffff8000, "vmulwod.h.bu.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70a28000, 0xffff8000, "vmulwod.w.hu.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70a30000, 0xffff8000, "vmulwod.d.wu.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70a38000, 0xffff8000, "vmulwod.q.du.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70200000, 0xffff8000, "vsubwev.h.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70208000, 0xffff8000, "vsubwev.w.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70210000, 0xffff8000, "vsubwev.d.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70218000, 0xffff8000, "vsubwev.q.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70300000, 0xffff8000, "vsubwev.h.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70308000, 0xffff8000, "vsubwev.w.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70310000, 0xffff8000, "vsubwev.d.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70318000, 0xffff8000, "vsubwev.q.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70240000, 0xffff8000, "vsubwod.h.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70248000, 0xffff8000, "vsubwod.w.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70250000, 0xffff8000, "vsubwod.d.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70258000, 0xffff8000, "vsubwod.q.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70340000, 0xffff8000, "vsubwod.h.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70348000, 0xffff8000, "vsubwod.w.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70350000, 0xffff8000, "vsubwod.d.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0x70358000, 0xffff8000, "vsubwod.q.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, -+ { 0, 0, "vrepli.d", "v,s0:10", "vldi %1,((%2)&0x3ff)|0xc00", 0, 0, 0}, -+ { 0, 0, "vrepli.h", "v,s0:10", "vldi %1,((%2)&0x3ff)|0x400", 0, 0, 0}, -+ { 0, 0, "vrepli.w", "v,s0:10", "vldi %1,((%2)&0x3ff)|0x800", 0, 0, 0}, -+ { 0x73e00000, 0xfffc0000, "vldi", "v0:5,s5:13", 0, 0, 0, 0}, -+ { 0x73e40000, 0xfffc0000, "vpermi.w", "v0:5,v5:5,u10:8", 0, 0, 0, 0}, -+ { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ -+}; -+ -+static struct loongarch_opcode loongarch_lasx_opcodes[] = -+{ -+/* match, mask, name, format, macro, include, exclude, pinfo. */ -+ { 0x74000000, 0xffff8000, "xvseq.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74008000, 0xffff8000, "xvseq.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74010000, 0xffff8000, "xvseq.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74018000, 0xffff8000, "xvseq.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74020000, 0xffff8000, "xvsle.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74028000, 0xffff8000, "xvsle.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74030000, 0xffff8000, "xvsle.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74038000, 0xffff8000, "xvsle.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74040000, 0xffff8000, "xvsle.bu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74048000, 0xffff8000, "xvsle.hu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74050000, 0xffff8000, "xvsle.wu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74058000, 0xffff8000, "xvsle.du", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74060000, 0xffff8000, "xvslt.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74068000, 0xffff8000, "xvslt.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74070000, 0xffff8000, "xvslt.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74078000, 0xffff8000, "xvslt.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74080000, 0xffff8000, "xvslt.bu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74088000, 0xffff8000, "xvslt.hu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74090000, 0xffff8000, "xvslt.wu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74098000, 0xffff8000, "xvslt.du", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x740a0000, 0xffff8000, "xvadd.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x740a8000, 0xffff8000, "xvadd.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x740b0000, 0xffff8000, "xvadd.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x740b8000, 0xffff8000, "xvadd.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x740c0000, 0xffff8000, "xvsub.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x740c8000, 0xffff8000, "xvsub.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x740d0000, 0xffff8000, "xvsub.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x740d8000, 0xffff8000, "xvsub.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74460000, 0xffff8000, "xvsadd.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74468000, 0xffff8000, "xvsadd.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74470000, 0xffff8000, "xvsadd.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74478000, 0xffff8000, "xvsadd.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74480000, 0xffff8000, "xvssub.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74488000, 0xffff8000, "xvssub.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74490000, 0xffff8000, "xvssub.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74498000, 0xffff8000, "xvssub.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x744a0000, 0xffff8000, "xvsadd.bu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x744a8000, 0xffff8000, "xvsadd.hu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x744b0000, 0xffff8000, "xvsadd.wu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x744b8000, 0xffff8000, "xvsadd.du", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x744c0000, 0xffff8000, "xvssub.bu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x744c8000, 0xffff8000, "xvssub.hu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x744d0000, 0xffff8000, "xvssub.wu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x744d8000, 0xffff8000, "xvssub.du", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74540000, 0xffff8000, "xvhaddw.h.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74548000, 0xffff8000, "xvhaddw.w.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74550000, 0xffff8000, "xvhaddw.d.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74558000, 0xffff8000, "xvhaddw.q.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74560000, 0xffff8000, "xvhsubw.h.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74568000, 0xffff8000, "xvhsubw.w.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74570000, 0xffff8000, "xvhsubw.d.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74578000, 0xffff8000, "xvhsubw.q.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74580000, 0xffff8000, "xvhaddw.hu.bu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74588000, 0xffff8000, "xvhaddw.wu.hu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74590000, 0xffff8000, "xvhaddw.du.wu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74598000, 0xffff8000, "xvhaddw.qu.du", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x745a0000, 0xffff8000, "xvhsubw.hu.bu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x745a8000, 0xffff8000, "xvhsubw.wu.hu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x745b0000, 0xffff8000, "xvhsubw.du.wu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x745b8000, 0xffff8000, "xvhsubw.qu.du", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x741e0000, 0xffff8000, "xvaddwev.h.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x741e8000, 0xffff8000, "xvaddwev.w.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x741f0000, 0xffff8000, "xvaddwev.d.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x741f8000, 0xffff8000, "xvaddwev.q.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x742e0000, 0xffff8000, "xvaddwev.h.bu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x742e8000, 0xffff8000, "xvaddwev.w.hu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x742f0000, 0xffff8000, "xvaddwev.d.wu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x742f8000, 0xffff8000, "xvaddwev.q.du", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x743e0000, 0xffff8000, "xvaddwev.h.bu.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x743e8000, 0xffff8000, "xvaddwev.w.hu.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x743f0000, 0xffff8000, "xvaddwev.d.wu.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x743f8000, 0xffff8000, "xvaddwev.q.du.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74220000, 0xffff8000, "xvaddwod.h.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74228000, 0xffff8000, "xvaddwod.w.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74230000, 0xffff8000, "xvaddwod.d.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74238000, 0xffff8000, "xvaddwod.q.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74320000, 0xffff8000, "xvaddwod.h.bu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74328000, 0xffff8000, "xvaddwod.w.hu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74330000, 0xffff8000, "xvaddwod.d.wu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74338000, 0xffff8000, "xvaddwod.q.du", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74400000, 0xffff8000, "xvaddwod.h.bu.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74408000, 0xffff8000, "xvaddwod.w.hu.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74410000, 0xffff8000, "xvaddwod.d.wu.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74418000, 0xffff8000, "xvaddwod.q.du.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74ac0000, 0xffff8000, "xvmaddwev.h.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74ac8000, 0xffff8000, "xvmaddwev.w.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74ad0000, 0xffff8000, "xvmaddwev.d.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74ad8000, 0xffff8000, "xvmaddwev.q.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74bc0000, 0xffff8000, "xvmaddwev.h.bu.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74bc8000, 0xffff8000, "xvmaddwev.w.hu.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74bd0000, 0xffff8000, "xvmaddwev.d.wu.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74bd8000, 0xffff8000, "xvmaddwev.q.du.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74b40000, 0xffff8000, "xvmaddwev.h.bu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74b48000, 0xffff8000, "xvmaddwev.w.hu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74b50000, 0xffff8000, "xvmaddwev.d.wu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74b58000, 0xffff8000, "xvmaddwev.q.du", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74ae0000, 0xffff8000, "xvmaddwod.h.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74ae8000, 0xffff8000, "xvmaddwod.w.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74af0000, 0xffff8000, "xvmaddwod.d.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74af8000, 0xffff8000, "xvmaddwod.q.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74b60000, 0xffff8000, "xvmaddwod.h.bu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74b68000, 0xffff8000, "xvmaddwod.w.hu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74b70000, 0xffff8000, "xvmaddwod.d.wu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74b78000, 0xffff8000, "xvmaddwod.q.du", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74be0000, 0xffff8000, "xvmaddwod.h.bu.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74be8000, 0xffff8000, "xvmaddwod.w.hu.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74bf0000, 0xffff8000, "xvmaddwod.d.wu.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74bf8000, 0xffff8000, "xvmaddwod.q.du.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74900000, 0xffff8000, "xvmulwev.h.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74908000, 0xffff8000, "xvmulwev.w.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74910000, 0xffff8000, "xvmulwev.d.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74918000, 0xffff8000, "xvmulwev.q.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74980000, 0xffff8000, "xvmulwev.h.bu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74988000, 0xffff8000, "xvmulwev.w.hu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74990000, 0xffff8000, "xvmulwev.d.wu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74998000, 0xffff8000, "xvmulwev.q.du", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74a00000, 0xffff8000, "xvmulwev.h.bu.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74a08000, 0xffff8000, "xvmulwev.w.hu.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74a10000, 0xffff8000, "xvmulwev.d.wu.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74a18000, 0xffff8000, "xvmulwev.q.du.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74920000, 0xffff8000, "xvmulwod.h.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74928000, 0xffff8000, "xvmulwod.w.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74930000, 0xffff8000, "xvmulwod.d.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74938000, 0xffff8000, "xvmulwod.q.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x749a0000, 0xffff8000, "xvmulwod.h.bu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x749a8000, 0xffff8000, "xvmulwod.w.hu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x749b0000, 0xffff8000, "xvmulwod.d.wu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x749b8000, 0xffff8000, "xvmulwod.q.du", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74a20000, 0xffff8000, "xvmulwod.h.bu.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74a28000, 0xffff8000, "xvmulwod.w.hu.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74a30000, 0xffff8000, "xvmulwod.d.wu.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74a38000, 0xffff8000, "xvmulwod.q.du.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74200000, 0xffff8000, "xvsubwev.h.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74208000, 0xffff8000, "xvsubwev.w.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74210000, 0xffff8000, "xvsubwev.d.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74218000, 0xffff8000, "xvsubwev.q.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74300000, 0xffff8000, "xvsubwev.h.bu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74308000, 0xffff8000, "xvsubwev.w.hu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74310000, 0xffff8000, "xvsubwev.d.wu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74318000, 0xffff8000, "xvsubwev.q.du", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74240000, 0xffff8000, "xvsubwod.h.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74248000, 0xffff8000, "xvsubwod.w.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74250000, 0xffff8000, "xvsubwod.d.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74258000, 0xffff8000, "xvsubwod.q.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74340000, 0xffff8000, "xvsubwod.h.bu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74348000, 0xffff8000, "xvsubwod.w.hu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74350000, 0xffff8000, "xvsubwod.d.wu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74358000, 0xffff8000, "xvsubwod.q.du", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x745c0000, 0xffff8000, "xvadda.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x745c8000, 0xffff8000, "xvadda.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x745d0000, 0xffff8000, "xvadda.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x745d8000, 0xffff8000, "xvadda.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74600000, 0xffff8000, "xvabsd.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74608000, 0xffff8000, "xvabsd.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74610000, 0xffff8000, "xvabsd.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74618000, 0xffff8000, "xvabsd.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74620000, 0xffff8000, "xvabsd.bu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74628000, 0xffff8000, "xvabsd.hu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74630000, 0xffff8000, "xvabsd.wu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74638000, 0xffff8000, "xvabsd.du", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74640000, 0xffff8000, "xvavg.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74648000, 0xffff8000, "xvavg.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74650000, 0xffff8000, "xvavg.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74658000, 0xffff8000, "xvavg.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74660000, 0xffff8000, "xvavg.bu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74668000, 0xffff8000, "xvavg.hu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74670000, 0xffff8000, "xvavg.wu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74678000, 0xffff8000, "xvavg.du", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74680000, 0xffff8000, "xvavgr.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74688000, 0xffff8000, "xvavgr.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74690000, 0xffff8000, "xvavgr.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74698000, 0xffff8000, "xvavgr.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x746a0000, 0xffff8000, "xvavgr.bu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x746a8000, 0xffff8000, "xvavgr.hu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x746b0000, 0xffff8000, "xvavgr.wu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x746b8000, 0xffff8000, "xvavgr.du", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74700000, 0xffff8000, "xvmax.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74708000, 0xffff8000, "xvmax.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74710000, 0xffff8000, "xvmax.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74718000, 0xffff8000, "xvmax.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74720000, 0xffff8000, "xvmin.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74728000, 0xffff8000, "xvmin.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74730000, 0xffff8000, "xvmin.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74738000, 0xffff8000, "xvmin.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74740000, 0xffff8000, "xvmax.bu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74748000, 0xffff8000, "xvmax.hu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74750000, 0xffff8000, "xvmax.wu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74758000, 0xffff8000, "xvmax.du", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74760000, 0xffff8000, "xvmin.bu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74768000, 0xffff8000, "xvmin.hu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74770000, 0xffff8000, "xvmin.wu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74778000, 0xffff8000, "xvmin.du", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74840000, 0xffff8000, "xvmul.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74848000, 0xffff8000, "xvmul.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74850000, 0xffff8000, "xvmul.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74858000, 0xffff8000, "xvmul.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74860000, 0xffff8000, "xvmuh.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74868000, 0xffff8000, "xvmuh.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74870000, 0xffff8000, "xvmuh.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74878000, 0xffff8000, "xvmuh.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74880000, 0xffff8000, "xvmuh.bu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74888000, 0xffff8000, "xvmuh.hu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74890000, 0xffff8000, "xvmuh.wu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74898000, 0xffff8000, "xvmuh.du", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74a80000, 0xffff8000, "xvmadd.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74a88000, 0xffff8000, "xvmadd.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74a90000, 0xffff8000, "xvmadd.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74a98000, 0xffff8000, "xvmadd.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74aa0000, 0xffff8000, "xvmsub.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74aa8000, 0xffff8000, "xvmsub.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74ab0000, 0xffff8000, "xvmsub.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74ab8000, 0xffff8000, "xvmsub.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74e00000, 0xffff8000, "xvdiv.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74e08000, 0xffff8000, "xvdiv.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74e10000, 0xffff8000, "xvdiv.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74e18000, 0xffff8000, "xvdiv.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74e20000, 0xffff8000, "xvmod.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74e28000, 0xffff8000, "xvmod.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74e30000, 0xffff8000, "xvmod.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74e38000, 0xffff8000, "xvmod.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74e40000, 0xffff8000, "xvdiv.bu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74e48000, 0xffff8000, "xvdiv.hu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74e50000, 0xffff8000, "xvdiv.wu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74e58000, 0xffff8000, "xvdiv.du", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74e60000, 0xffff8000, "xvmod.bu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74e68000, 0xffff8000, "xvmod.hu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74e70000, 0xffff8000, "xvmod.wu", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74e78000, 0xffff8000, "xvmod.du", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74e80000, 0xffff8000, "xvsll.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74e88000, 0xffff8000, "xvsll.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74e90000, 0xffff8000, "xvsll.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74e98000, 0xffff8000, "xvsll.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74ea0000, 0xffff8000, "xvsrl.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74ea8000, 0xffff8000, "xvsrl.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74eb0000, 0xffff8000, "xvsrl.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74eb8000, 0xffff8000, "xvsrl.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74ec0000, 0xffff8000, "xvsra.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74ec8000, 0xffff8000, "xvsra.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74ed0000, 0xffff8000, "xvsra.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74ed8000, 0xffff8000, "xvsra.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74ee0000, 0xffff8000, "xvrotr.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74ee8000, 0xffff8000, "xvrotr.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74ef0000, 0xffff8000, "xvrotr.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74ef8000, 0xffff8000, "xvrotr.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74f00000, 0xffff8000, "xvsrlr.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74f08000, 0xffff8000, "xvsrlr.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74f10000, 0xffff8000, "xvsrlr.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74f18000, 0xffff8000, "xvsrlr.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74f20000, 0xffff8000, "xvsrar.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74f28000, 0xffff8000, "xvsrar.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74f30000, 0xffff8000, "xvsrar.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74f38000, 0xffff8000, "xvsrar.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74f48000, 0xffff8000, "xvsrln.b.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74f50000, 0xffff8000, "xvsrln.h.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74f58000, 0xffff8000, "xvsrln.w.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74f68000, 0xffff8000, "xvsran.b.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74f70000, 0xffff8000, "xvsran.h.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74f78000, 0xffff8000, "xvsran.w.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74f88000, 0xffff8000, "xvsrlrn.b.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74f90000, 0xffff8000, "xvsrlrn.h.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74f98000, 0xffff8000, "xvsrlrn.w.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74fa8000, 0xffff8000, "xvsrarn.b.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74fb0000, 0xffff8000, "xvsrarn.h.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74fb8000, 0xffff8000, "xvsrarn.w.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74fc8000, 0xffff8000, "xvssrln.b.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74fd0000, 0xffff8000, "xvssrln.h.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74fd8000, 0xffff8000, "xvssrln.w.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74fe8000, 0xffff8000, "xvssran.b.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74ff0000, 0xffff8000, "xvssran.h.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x74ff8000, 0xffff8000, "xvssran.w.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75008000, 0xffff8000, "xvssrlrn.b.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75010000, 0xffff8000, "xvssrlrn.h.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75018000, 0xffff8000, "xvssrlrn.w.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75028000, 0xffff8000, "xvssrarn.b.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75030000, 0xffff8000, "xvssrarn.h.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75038000, 0xffff8000, "xvssrarn.w.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75048000, 0xffff8000, "xvssrln.bu.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75050000, 0xffff8000, "xvssrln.hu.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75058000, 0xffff8000, "xvssrln.wu.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75068000, 0xffff8000, "xvssran.bu.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75070000, 0xffff8000, "xvssran.hu.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75078000, 0xffff8000, "xvssran.wu.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75088000, 0xffff8000, "xvssrlrn.bu.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75090000, 0xffff8000, "xvssrlrn.hu.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75098000, 0xffff8000, "xvssrlrn.wu.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x750a8000, 0xffff8000, "xvssrarn.bu.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x750b0000, 0xffff8000, "xvssrarn.hu.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x750b8000, 0xffff8000, "xvssrarn.wu.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x750c0000, 0xffff8000, "xvbitclr.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x750c8000, 0xffff8000, "xvbitclr.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x750d0000, 0xffff8000, "xvbitclr.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x750d8000, 0xffff8000, "xvbitclr.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x750e0000, 0xffff8000, "xvbitset.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x750e8000, 0xffff8000, "xvbitset.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x750f0000, 0xffff8000, "xvbitset.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x750f8000, 0xffff8000, "xvbitset.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75100000, 0xffff8000, "xvbitrev.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75108000, 0xffff8000, "xvbitrev.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75110000, 0xffff8000, "xvbitrev.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75118000, 0xffff8000, "xvbitrev.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75160000, 0xffff8000, "xvpackev.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75168000, 0xffff8000, "xvpackev.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75170000, 0xffff8000, "xvpackev.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75178000, 0xffff8000, "xvpackev.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75180000, 0xffff8000, "xvpackod.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75188000, 0xffff8000, "xvpackod.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75190000, 0xffff8000, "xvpackod.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75198000, 0xffff8000, "xvpackod.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x751a0000, 0xffff8000, "xvilvl.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x751a8000, 0xffff8000, "xvilvl.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x751b0000, 0xffff8000, "xvilvl.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x751b8000, 0xffff8000, "xvilvl.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x751c0000, 0xffff8000, "xvilvh.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x751c8000, 0xffff8000, "xvilvh.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x751d0000, 0xffff8000, "xvilvh.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x751d8000, 0xffff8000, "xvilvh.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x751e0000, 0xffff8000, "xvpickev.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x751e8000, 0xffff8000, "xvpickev.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x751f0000, 0xffff8000, "xvpickev.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x751f8000, 0xffff8000, "xvpickev.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75200000, 0xffff8000, "xvpickod.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75208000, 0xffff8000, "xvpickod.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75210000, 0xffff8000, "xvpickod.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75218000, 0xffff8000, "xvpickod.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75220000, 0xffff8000, "xvreplve.b", "x0:5,x5:5,r10:5", 0, 0, 0, 0}, -+ { 0x75228000, 0xffff8000, "xvreplve.h", "x0:5,x5:5,r10:5", 0, 0, 0, 0}, -+ { 0x75230000, 0xffff8000, "xvreplve.w", "x0:5,x5:5,r10:5", 0, 0, 0, 0}, -+ { 0x75238000, 0xffff8000, "xvreplve.d", "x0:5,x5:5,r10:5", 0, 0, 0, 0}, -+ { 0x75260000, 0xffff8000, "xvand.v", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75268000, 0xffff8000, "xvor.v", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75270000, 0xffff8000, "xvxor.v", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75278000, 0xffff8000, "xvnor.v", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75280000, 0xffff8000, "xvandn.v", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75288000, 0xffff8000, "xvorn.v", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x752b0000, 0xffff8000, "xvfrstp.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x752b8000, 0xffff8000, "xvfrstp.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x752d0000, 0xffff8000, "xvadd.q", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x752d8000, 0xffff8000, "xvsub.q", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x752e0000, 0xffff8000, "xvsigncov.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x752e8000, 0xffff8000, "xvsigncov.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x752f0000, 0xffff8000, "xvsigncov.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x752f8000, 0xffff8000, "xvsigncov.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75308000, 0xffff8000, "xvfadd.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75310000, 0xffff8000, "xvfadd.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75328000, 0xffff8000, "xvfsub.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75330000, 0xffff8000, "xvfsub.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75388000, 0xffff8000, "xvfmul.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75390000, 0xffff8000, "xvfmul.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x753a8000, 0xffff8000, "xvfdiv.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x753b0000, 0xffff8000, "xvfdiv.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x753c8000, 0xffff8000, "xvfmax.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x753d0000, 0xffff8000, "xvfmax.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x753e8000, 0xffff8000, "xvfmin.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x753f0000, 0xffff8000, "xvfmin.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75408000, 0xffff8000, "xvfmaxa.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75410000, 0xffff8000, "xvfmaxa.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75428000, 0xffff8000, "xvfmina.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75430000, 0xffff8000, "xvfmina.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75460000, 0xffff8000, "xvfcvt.h.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75468000, 0xffff8000, "xvfcvt.s.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75480000, 0xffff8000, "xvffint.s.l", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x75498000, 0xffff8000, "xvftint.w.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x754a0000, 0xffff8000, "xvftintrm.w.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x754a8000, 0xffff8000, "xvftintrp.w.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x754b0000, 0xffff8000, "xvftintrz.w.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x754b8000, 0xffff8000, "xvftintrne.w.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x757a8000, 0xffff8000, "xvshuf.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x757b0000, 0xffff8000, "xvshuf.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x757b8000, 0xffff8000, "xvshuf.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x757d0000, 0xffff8000, "xvperm.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, -+ { 0x76800000, 0xffff8000, "xvseqi.b", "x0:5,x5:5,s10:5", 0, 0, 0, 0}, -+ { 0x76808000, 0xffff8000, "xvseqi.h", "x0:5,x5:5,s10:5", 0, 0, 0, 0}, -+ { 0x76810000, 0xffff8000, "xvseqi.w", "x0:5,x5:5,s10:5", 0, 0, 0, 0}, -+ { 0x76818000, 0xffff8000, "xvseqi.d", "x0:5,x5:5,s10:5", 0, 0, 0, 0}, -+ { 0x76820000, 0xffff8000, "xvslei.b", "x0:5,x5:5,s10:5", 0, 0, 0, 0}, -+ { 0x76828000, 0xffff8000, "xvslei.h", "x0:5,x5:5,s10:5", 0, 0, 0, 0}, -+ { 0x76830000, 0xffff8000, "xvslei.w", "x0:5,x5:5,s10:5", 0, 0, 0, 0}, -+ { 0x76838000, 0xffff8000, "xvslei.d", "x0:5,x5:5,s10:5", 0, 0, 0, 0}, -+ { 0x76840000, 0xffff8000, "xvslei.bu", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x76848000, 0xffff8000, "xvslei.hu", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x76850000, 0xffff8000, "xvslei.wu", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x76858000, 0xffff8000, "xvslei.du", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x76860000, 0xffff8000, "xvslti.b", "x0:5,x5:5,s10:5", 0, 0, 0, 0}, -+ { 0x76868000, 0xffff8000, "xvslti.h", "x0:5,x5:5,s10:5", 0, 0, 0, 0}, -+ { 0x76870000, 0xffff8000, "xvslti.w", "x0:5,x5:5,s10:5", 0, 0, 0, 0}, -+ { 0x76878000, 0xffff8000, "xvslti.d", "x0:5,x5:5,s10:5", 0, 0, 0, 0}, -+ { 0x76880000, 0xffff8000, "xvslti.bu", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x76888000, 0xffff8000, "xvslti.hu", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x76890000, 0xffff8000, "xvslti.wu", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x76898000, 0xffff8000, "xvslti.du", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x768a0000, 0xffff8000, "xvaddi.bu", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x768a8000, 0xffff8000, "xvaddi.hu", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x768b0000, 0xffff8000, "xvaddi.wu", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x768b8000, 0xffff8000, "xvaddi.du", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x768c0000, 0xffff8000, "xvsubi.bu", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x768c8000, 0xffff8000, "xvsubi.hu", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x768d0000, 0xffff8000, "xvsubi.wu", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x768d8000, 0xffff8000, "xvsubi.du", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x768e0000, 0xffff8000, "xvbsll.v", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x768e8000, 0xffff8000, "xvbsrl.v", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x76900000, 0xffff8000, "xvmaxi.b", "x0:5,x5:5,s10:5", 0, 0, 0, 0}, -+ { 0x76908000, 0xffff8000, "xvmaxi.h", "x0:5,x5:5,s10:5", 0, 0, 0, 0}, -+ { 0x76910000, 0xffff8000, "xvmaxi.w", "x0:5,x5:5,s10:5", 0, 0, 0, 0}, -+ { 0x76918000, 0xffff8000, "xvmaxi.d", "x0:5,x5:5,s10:5", 0, 0, 0, 0}, -+ { 0x76920000, 0xffff8000, "xvmini.b", "x0:5,x5:5,s10:5", 0, 0, 0, 0}, -+ { 0x76928000, 0xffff8000, "xvmini.h", "x0:5,x5:5,s10:5", 0, 0, 0, 0}, -+ { 0x76930000, 0xffff8000, "xvmini.w", "x0:5,x5:5,s10:5", 0, 0, 0, 0}, -+ { 0x76938000, 0xffff8000, "xvmini.d", "x0:5,x5:5,s10:5", 0, 0, 0, 0}, -+ { 0x76940000, 0xffff8000, "xvmaxi.bu", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x76948000, 0xffff8000, "xvmaxi.hu", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x76950000, 0xffff8000, "xvmaxi.wu", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x76958000, 0xffff8000, "xvmaxi.du", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x76960000, 0xffff8000, "xvmini.bu", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x76968000, 0xffff8000, "xvmini.hu", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x76970000, 0xffff8000, "xvmini.wu", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x76978000, 0xffff8000, "xvmini.du", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x769a0000, 0xffff8000, "xvfrstpi.b", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x769a8000, 0xffff8000, "xvfrstpi.h", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x769c0000, 0xfffffc00, "xvclo.b", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769c0400, 0xfffffc00, "xvclo.h", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769c0800, 0xfffffc00, "xvclo.w", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769c0c00, 0xfffffc00, "xvclo.d", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769c1000, 0xfffffc00, "xvclz.b", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769c1400, 0xfffffc00, "xvclz.h", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769c1800, 0xfffffc00, "xvclz.w", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769c1c00, 0xfffffc00, "xvclz.d", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769c2000, 0xfffffc00, "xvpcnt.b", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769c2400, 0xfffffc00, "xvpcnt.h", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769c2800, 0xfffffc00, "xvpcnt.w", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769c2c00, 0xfffffc00, "xvpcnt.d", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769c3000, 0xfffffc00, "xvneg.b", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769c3400, 0xfffffc00, "xvneg.h", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769c3800, 0xfffffc00, "xvneg.w", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769c3c00, 0xfffffc00, "xvneg.d", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769c4000, 0xfffffc00, "xvmskltz.b", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769c4400, 0xfffffc00, "xvmskltz.h", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769c4800, 0xfffffc00, "xvmskltz.w", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769c4c00, 0xfffffc00, "xvmskltz.d", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769c5000, 0xfffffc00, "xvmskgez.b", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769c6000, 0xfffffc00, "xvmsknz.b", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769c9800, 0xfffffc18, "xvseteqz.v", "c0:3,x5:5", 0, 0, 0, 0}, -+ { 0x769c9c00, 0xfffffc18, "xvsetnez.v", "c0:3,x5:5", 0, 0, 0, 0}, -+ { 0x769ca000, 0xfffffc18, "xvsetanyeqz.b", "c0:3,x5:5", 0, 0, 0, 0}, -+ { 0x769ca400, 0xfffffc18, "xvsetanyeqz.h", "c0:3,x5:5", 0, 0, 0, 0}, -+ { 0x769ca800, 0xfffffc18, "xvsetanyeqz.w", "c0:3,x5:5", 0, 0, 0, 0}, -+ { 0x769cac00, 0xfffffc18, "xvsetanyeqz.d", "c0:3,x5:5", 0, 0, 0, 0}, -+ { 0x769cb000, 0xfffffc18, "xvsetallnez.b", "c0:3,x5:5", 0, 0, 0, 0}, -+ { 0x769cb400, 0xfffffc18, "xvsetallnez.h", "c0:3,x5:5", 0, 0, 0, 0}, -+ { 0x769cb800, 0xfffffc18, "xvsetallnez.w", "c0:3,x5:5", 0, 0, 0, 0}, -+ { 0x769cbc00, 0xfffffc18, "xvsetallnez.d", "c0:3,x5:5", 0, 0, 0, 0}, -+ { 0x769cc400, 0xfffffc00, "xvflogb.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769cc800, 0xfffffc00, "xvflogb.d", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769cd400, 0xfffffc00, "xvfclass.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769cd800, 0xfffffc00, "xvfclass.d", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769ce400, 0xfffffc00, "xvfsqrt.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769ce800, 0xfffffc00, "xvfsqrt.d", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769cf400, 0xfffffc00, "xvfrecip.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769cf800, 0xfffffc00, "xvfrecip.d", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769d0400, 0xfffffc00, "xvfrsqrt.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769d0800, 0xfffffc00, "xvfrsqrt.d", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769d3400, 0xfffffc00, "xvfrint.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769d3800, 0xfffffc00, "xvfrint.d", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769d4400, 0xfffffc00, "xvfrintrm.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769d4800, 0xfffffc00, "xvfrintrm.d", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769d5400, 0xfffffc00, "xvfrintrp.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769d5800, 0xfffffc00, "xvfrintrp.d", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769d6400, 0xfffffc00, "xvfrintrz.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769d6800, 0xfffffc00, "xvfrintrz.d", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769d7400, 0xfffffc00, "xvfrintrne.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769d7800, 0xfffffc00, "xvfrintrne.d", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769de800, 0xfffffc00, "xvfcvtl.s.h", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769dec00, 0xfffffc00, "xvfcvth.s.h", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769df000, 0xfffffc00, "xvfcvtl.d.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769df400, 0xfffffc00, "xvfcvth.d.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e0000, 0xfffffc00, "xvffint.s.w", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e0400, 0xfffffc00, "xvffint.s.wu", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e0800, 0xfffffc00, "xvffint.d.l", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e0c00, 0xfffffc00, "xvffint.d.lu", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e1000, 0xfffffc00, "xvffintl.d.w", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e1400, 0xfffffc00, "xvffinth.d.w", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e3000, 0xfffffc00, "xvftint.w.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e3400, 0xfffffc00, "xvftint.l.d", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e3800, 0xfffffc00, "xvftintrm.w.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e3c00, 0xfffffc00, "xvftintrm.l.d", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e4000, 0xfffffc00, "xvftintrp.w.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e4400, 0xfffffc00, "xvftintrp.l.d", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e4800, 0xfffffc00, "xvftintrz.w.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e4c00, 0xfffffc00, "xvftintrz.l.d", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e5000, 0xfffffc00, "xvftintrne.w.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e5400, 0xfffffc00, "xvftintrne.l.d", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e5800, 0xfffffc00, "xvftint.wu.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e5c00, 0xfffffc00, "xvftint.lu.d", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e7000, 0xfffffc00, "xvftintrz.wu.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e7400, 0xfffffc00, "xvftintrz.lu.d", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e8000, 0xfffffc00, "xvftintl.l.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e8400, 0xfffffc00, "xvftinth.l.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e8800, 0xfffffc00, "xvftintrml.l.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e8c00, 0xfffffc00, "xvftintrmh.l.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e9000, 0xfffffc00, "xvftintrpl.l.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e9400, 0xfffffc00, "xvftintrph.l.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e9800, 0xfffffc00, "xvftintrzl.l.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769e9c00, 0xfffffc00, "xvftintrzh.l.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769ea000, 0xfffffc00, "xvftintrnel.l.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769ea400, 0xfffffc00, "xvftintrneh.l.s", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769ee000, 0xfffffc00, "xvexth.h.b", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769ee400, 0xfffffc00, "xvexth.w.h", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769ee800, 0xfffffc00, "xvexth.d.w", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769eec00, 0xfffffc00, "xvexth.q.d", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769ef000, 0xfffffc00, "xvexth.hu.bu", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769ef400, 0xfffffc00, "xvexth.wu.hu", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769ef800, 0xfffffc00, "xvexth.du.wu", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769efc00, 0xfffffc00, "xvexth.qu.du", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769f0000, 0xfffffc00, "xvreplgr2vr.b", "x0:5,r5:5", 0, 0, 0, 0}, -+ { 0x769f0400, 0xfffffc00, "xvreplgr2vr.h", "x0:5,r5:5", 0, 0, 0, 0}, -+ { 0x769f0800, 0xfffffc00, "xvreplgr2vr.w", "x0:5,r5:5", 0, 0, 0, 0}, -+ { 0x769f0c00, 0xfffffc00, "xvreplgr2vr.d", "x0:5,r5:5", 0, 0, 0, 0}, -+ { 0x769f1000, 0xfffffc00, "vext2xv.h.b", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769f1400, 0xfffffc00, "vext2xv.w.b", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769f1800, 0xfffffc00, "vext2xv.d.b", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769f1c00, 0xfffffc00, "vext2xv.w.h", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769f2000, 0xfffffc00, "vext2xv.d.h", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769f2400, 0xfffffc00, "vext2xv.d.w", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769f2800, 0xfffffc00, "vext2xv.hu.bu", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769f2c00, 0xfffffc00, "vext2xv.wu.bu", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769f3000, 0xfffffc00, "vext2xv.du.bu", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769f3400, 0xfffffc00, "vext2xv.wu.hu", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769f3800, 0xfffffc00, "vext2xv.du.hu", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769f3c00, 0xfffffc00, "vext2xv.du.wu", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x769f8000, 0xffff8000, "xvhseli.d", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x76a02000, 0xffffe000, "xvrotri.b", "x0:5,x5:5,u10:3", 0, 0, 0, 0}, -+ { 0x76a04000, 0xffffc000, "xvrotri.h", "x0:5,x5:5,u10:4", 0, 0, 0, 0}, -+ { 0x76a08000, 0xffff8000, "xvrotri.w", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x76a10000, 0xffff0000, "xvrotri.d", "x0:5,x5:5,u10:6", 0, 0, 0, 0}, -+ { 0x76a42000, 0xffffe000, "xvsrlri.b", "x0:5,x5:5,u10:3", 0, 0, 0, 0}, -+ { 0x76a44000, 0xffffc000, "xvsrlri.h", "x0:5,x5:5,u10:4", 0, 0, 0, 0}, -+ { 0x76a48000, 0xffff8000, "xvsrlri.w", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x76a50000, 0xffff0000, "xvsrlri.d", "x0:5,x5:5,u10:6", 0, 0, 0, 0}, -+ { 0x76a82000, 0xffffe000, "xvsrari.b", "x0:5,x5:5,u10:3", 0, 0, 0, 0}, -+ { 0x76a84000, 0xffffc000, "xvsrari.h", "x0:5,x5:5,u10:4", 0, 0, 0, 0}, -+ { 0x76a88000, 0xffff8000, "xvsrari.w", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x76a90000, 0xffff0000, "xvsrari.d", "x0:5,x5:5,u10:6", 0, 0, 0, 0}, -+ { 0x76ebc000, 0xffffe000, "xvinsgr2vr.w", "x0:5,r5:5,u10:3", 0, 0, 0, 0}, -+ { 0x76ebe000, 0xfffff000, "xvinsgr2vr.d", "x0:5,r5:5,u10:2", 0, 0, 0, 0}, -+ { 0x76efc000, 0xffffe000, "xvpickve2gr.w", "r0:5,x5:5,u10:3", 0, 0, 0, 0}, -+ { 0x76efe000, 0xfffff000, "xvpickve2gr.d", "r0:5,x5:5,u10:2", 0, 0, 0, 0}, -+ { 0x76f3c000, 0xffffe000, "xvpickve2gr.wu", "r0:5,x5:5,u10:3", 0, 0, 0, 0}, -+ { 0x76f3e000, 0xfffff000, "xvpickve2gr.du", "r0:5,x5:5,u10:2", 0, 0, 0, 0}, -+ { 0x76f78000, 0xffffc000, "xvrepl128vei.b", "x0:5,x5:5,u10:4", 0, 0, 0, 0}, -+ { 0x76f7c000, 0xffffe000, "xvrepl128vei.h", "x0:5,x5:5,u10:3", 0, 0, 0, 0}, -+ { 0x76f7e000, 0xfffff000, "xvrepl128vei.w", "x0:5,x5:5,u10:2", 0, 0, 0, 0}, -+ { 0x76f7f000, 0xfffff800, "xvrepl128vei.d", "x0:5,x5:5,u10:1", 0, 0, 0, 0}, -+ { 0x76ffc000, 0xffffe000, "xvinsve0.w", "x0:5,x5:5,u10:3", 0, 0, 0, 0}, -+ { 0x76ffe000, 0xfffff000, "xvinsve0.d", "x0:5,x5:5,u10:2", 0, 0, 0, 0}, -+ { 0x7703c000, 0xffffe000, "xvpickve.w", "x0:5,x5:5,u10:3", 0, 0, 0, 0}, -+ { 0x7703e000, 0xfffff000, "xvpickve.d", "x0:5,x5:5,u10:2", 0, 0, 0, 0}, -+ { 0x77070000, 0xfffffc00, "xvreplve0.b", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x77078000, 0xfffffc00, "xvreplve0.h", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x7707c000, 0xfffffc00, "xvreplve0.w", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x7707e000, 0xfffffc00, "xvreplve0.d", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x7707f000, 0xfffffc00, "xvreplve0.q", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x77082000, 0xffffe000, "xvsllwil.h.b", "x0:5,x5:5,u10:3", 0, 0, 0, 0}, -+ { 0x77084000, 0xffffc000, "xvsllwil.w.h", "x0:5,x5:5,u10:4", 0, 0, 0, 0}, -+ { 0x77088000, 0xffff8000, "xvsllwil.d.w", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x77090000, 0xfffffc00, "xvextl.q.d", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x770c2000, 0xffffe000, "xvsllwil.hu.bu", "x0:5,x5:5,u10:3", 0, 0, 0, 0}, -+ { 0x770c4000, 0xffffc000, "xvsllwil.wu.hu", "x0:5,x5:5,u10:4", 0, 0, 0, 0}, -+ { 0x770c8000, 0xffff8000, "xvsllwil.du.wu", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x770d0000, 0xfffffc00, "xvextl.qu.du", "x0:5,x5:5", 0, 0, 0, 0}, -+ { 0x77102000, 0xffffe000, "xvbitclri.b", "x0:5,x5:5,u10:3", 0, 0, 0, 0}, -+ { 0x77104000, 0xffffc000, "xvbitclri.h", "x0:5,x5:5,u10:4", 0, 0, 0, 0}, -+ { 0x77108000, 0xffff8000, "xvbitclri.w", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x77110000, 0xffff0000, "xvbitclri.d", "x0:5,x5:5,u10:6", 0, 0, 0, 0}, -+ { 0x77142000, 0xffffe000, "xvbitseti.b", "x0:5,x5:5,u10:3", 0, 0, 0, 0}, -+ { 0x77144000, 0xffffc000, "xvbitseti.h", "x0:5,x5:5,u10:4", 0, 0, 0, 0}, -+ { 0x77148000, 0xffff8000, "xvbitseti.w", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x77150000, 0xffff0000, "xvbitseti.d", "x0:5,x5:5,u10:6", 0, 0, 0, 0}, -+ { 0x77182000, 0xffffe000, "xvbitrevi.b", "x0:5,x5:5,u10:3", 0, 0, 0, 0}, -+ { 0x77184000, 0xffffc000, "xvbitrevi.h", "x0:5,x5:5,u10:4", 0, 0, 0, 0}, -+ { 0x77188000, 0xffff8000, "xvbitrevi.w", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x77190000, 0xffff0000, "xvbitrevi.d", "x0:5,x5:5,u10:6", 0, 0, 0, 0}, -+ { 0x77242000, 0xffffe000, "xvsat.b", "x0:5,x5:5,u10:3", 0, 0, 0, 0}, -+ { 0x77244000, 0xffffc000, "xvsat.h", "x0:5,x5:5,u10:4", 0, 0, 0, 0}, -+ { 0x77248000, 0xffff8000, "xvsat.w", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x77250000, 0xffff0000, "xvsat.d", "x0:5,x5:5,u10:6", 0, 0, 0, 0}, -+ { 0x77282000, 0xffffe000, "xvsat.bu", "x0:5,x5:5,u10:3", 0, 0, 0, 0}, -+ { 0x77284000, 0xffffc000, "xvsat.hu", "x0:5,x5:5,u10:4", 0, 0, 0, 0}, -+ { 0x77288000, 0xffff8000, "xvsat.wu", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x77290000, 0xffff0000, "xvsat.du", "x0:5,x5:5,u10:6", 0, 0, 0, 0}, -+ { 0x772c2000, 0xffffe000, "xvslli.b", "x0:5,x5:5,u10:3", 0, 0, 0, 0}, -+ { 0x772c4000, 0xffffc000, "xvslli.h", "x0:5,x5:5,u10:4", 0, 0, 0, 0}, -+ { 0x772c8000, 0xffff8000, "xvslli.w", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x772d0000, 0xffff0000, "xvslli.d", "x0:5,x5:5,u10:6", 0, 0, 0, 0}, -+ { 0x77302000, 0xffffe000, "xvsrli.b", "x0:5,x5:5,u10:3", 0, 0, 0, 0}, -+ { 0x77304000, 0xffffc000, "xvsrli.h", "x0:5,x5:5,u10:4", 0, 0, 0, 0}, -+ { 0x77308000, 0xffff8000, "xvsrli.w", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x77310000, 0xffff0000, "xvsrli.d", "x0:5,x5:5,u10:6", 0, 0, 0, 0}, -+ { 0x77342000, 0xffffe000, "xvsrai.b", "x0:5,x5:5,u10:3", 0, 0, 0, 0}, -+ { 0x77344000, 0xffffc000, "xvsrai.h", "x0:5,x5:5,u10:4", 0, 0, 0, 0}, -+ { 0x77348000, 0xffff8000, "xvsrai.w", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x77350000, 0xffff0000, "xvsrai.d", "x0:5,x5:5,u10:6", 0, 0, 0, 0}, -+ { 0x77404000, 0xffffc000, "xvsrlni.b.h", "x0:5,x5:5,u10:4", 0, 0, 0, 0}, -+ { 0x77408000, 0xffff8000, "xvsrlni.h.w", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x77410000, 0xffff0000, "xvsrlni.w.d", "x0:5,x5:5,u10:6", 0, 0, 0, 0}, -+ { 0x77420000, 0xfffe0000, "xvsrlni.d.q", "x0:5,x5:5,u10:7", 0, 0, 0, 0}, -+ { 0x77444000, 0xffffc000, "xvsrlrni.b.h", "x0:5,x5:5,u10:4", 0, 0, 0, 0}, -+ { 0x77448000, 0xffff8000, "xvsrlrni.h.w", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x77450000, 0xffff0000, "xvsrlrni.w.d", "x0:5,x5:5,u10:6", 0, 0, 0, 0}, -+ { 0x77460000, 0xfffe0000, "xvsrlrni.d.q", "x0:5,x5:5,u10:7", 0, 0, 0, 0}, -+ { 0x77484000, 0xffffc000, "xvssrlni.b.h", "x0:5,x5:5,u10:4", 0, 0, 0, 0}, -+ { 0x77488000, 0xffff8000, "xvssrlni.h.w", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x77490000, 0xffff0000, "xvssrlni.w.d", "x0:5,x5:5,u10:6", 0, 0, 0, 0}, -+ { 0x774a0000, 0xfffe0000, "xvssrlni.d.q", "x0:5,x5:5,u10:7", 0, 0, 0, 0}, -+ { 0x774c4000, 0xffffc000, "xvssrlni.bu.h", "x0:5,x5:5,u10:4", 0, 0, 0, 0}, -+ { 0x774c8000, 0xffff8000, "xvssrlni.hu.w", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x774d0000, 0xffff0000, "xvssrlni.wu.d", "x0:5,x5:5,u10:6", 0, 0, 0, 0}, -+ { 0x774e0000, 0xfffe0000, "xvssrlni.du.q", "x0:5,x5:5,u10:7", 0, 0, 0, 0}, -+ { 0x77504000, 0xffffc000, "xvssrlrni.b.h", "x0:5,x5:5,u10:4", 0, 0, 0, 0}, -+ { 0x77508000, 0xffff8000, "xvssrlrni.h.w", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x77510000, 0xffff0000, "xvssrlrni.w.d", "x0:5,x5:5,u10:6", 0, 0, 0, 0}, -+ { 0x77520000, 0xfffe0000, "xvssrlrni.d.q", "x0:5,x5:5,u10:7", 0, 0, 0, 0}, -+ { 0x77544000, 0xffffc000, "xvssrlrni.bu.h", "x0:5,x5:5,u10:4", 0, 0, 0, 0}, -+ { 0x77548000, 0xffff8000, "xvssrlrni.hu.w", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x77550000, 0xffff0000, "xvssrlrni.wu.d", "x0:5,x5:5,u10:6", 0, 0, 0, 0}, -+ { 0x77560000, 0xfffe0000, "xvssrlrni.du.q", "x0:5,x5:5,u10:7", 0, 0, 0, 0}, -+ { 0x77584000, 0xffffc000, "xvsrani.b.h", "x0:5,x5:5,u10:4", 0, 0, 0, 0}, -+ { 0x77588000, 0xffff8000, "xvsrani.h.w", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x77590000, 0xffff0000, "xvsrani.w.d", "x0:5,x5:5,u10:6", 0, 0, 0, 0}, -+ { 0x775a0000, 0xfffe0000, "xvsrani.d.q", "x0:5,x5:5,u10:7", 0, 0, 0, 0}, -+ { 0x775c4000, 0xffffc000, "xvsrarni.b.h", "x0:5,x5:5,u10:4", 0, 0, 0, 0}, -+ { 0x775c8000, 0xffff8000, "xvsrarni.h.w", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x775d0000, 0xffff0000, "xvsrarni.w.d", "x0:5,x5:5,u10:6", 0, 0, 0, 0}, -+ { 0x775e0000, 0xfffe0000, "xvsrarni.d.q", "x0:5,x5:5,u10:7", 0, 0, 0, 0}, -+ { 0x77604000, 0xffffc000, "xvssrani.b.h", "x0:5,x5:5,u10:4", 0, 0, 0, 0}, -+ { 0x77608000, 0xffff8000, "xvssrani.h.w", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x77610000, 0xffff0000, "xvssrani.w.d", "x0:5,x5:5,u10:6", 0, 0, 0, 0}, -+ { 0x77620000, 0xfffe0000, "xvssrani.d.q", "x0:5,x5:5,u10:7", 0, 0, 0, 0}, -+ { 0x77644000, 0xffffc000, "xvssrani.bu.h", "x0:5,x5:5,u10:4", 0, 0, 0, 0}, -+ { 0x77648000, 0xffff8000, "xvssrani.hu.w", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x77650000, 0xffff0000, "xvssrani.wu.d", "x0:5,x5:5,u10:6", 0, 0, 0, 0}, -+ { 0x77660000, 0xfffe0000, "xvssrani.du.q", "x0:5,x5:5,u10:7", 0, 0, 0, 0}, -+ { 0x77684000, 0xffffc000, "xvssrarni.b.h", "x0:5,x5:5,u10:4", 0, 0, 0, 0}, -+ { 0x77688000, 0xffff8000, "xvssrarni.h.w", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x77690000, 0xffff0000, "xvssrarni.w.d", "x0:5,x5:5,u10:6", 0, 0, 0, 0}, -+ { 0x776a0000, 0xfffe0000, "xvssrarni.d.q", "x0:5,x5:5,u10:7", 0, 0, 0, 0}, -+ { 0x776c4000, 0xffffc000, "xvssrarni.bu.h", "x0:5,x5:5,u10:4", 0, 0, 0, 0}, -+ { 0x776c8000, 0xffff8000, "xvssrarni.hu.w", "x0:5,x5:5,u10:5", 0, 0, 0, 0}, -+ { 0x776d0000, 0xffff0000, "xvssrarni.wu.d", "x0:5,x5:5,u10:6", 0, 0, 0, 0}, -+ { 0x776e0000, 0xfffe0000, "xvssrarni.du.q", "x0:5,x5:5,u10:7", 0, 0, 0, 0}, -+ { 0x77800000, 0xfffc0000, "xvextrins.d", "x0:5,x5:5,u10:8", 0, 0, 0, 0}, -+ { 0x77840000, 0xfffc0000, "xvextrins.w", "x0:5,x5:5,u10:8", 0, 0, 0, 0}, -+ { 0x77880000, 0xfffc0000, "xvextrins.h", "x0:5,x5:5,u10:8", 0, 0, 0, 0}, -+ { 0x778c0000, 0xfffc0000, "xvextrins.b", "x0:5,x5:5,u10:8", 0, 0, 0, 0}, -+ { 0x77900000, 0xfffc0000, "xvshuf4i.b", "x0:5,x5:5,u10:8", 0, 0, 0, 0}, -+ { 0x77940000, 0xfffc0000, "xvshuf4i.h", "x0:5,x5:5,u10:8", 0, 0, 0, 0}, -+ { 0x77980000, 0xfffc0000, "xvshuf4i.w", "x0:5,x5:5,u10:8", 0, 0, 0, 0}, -+ { 0x779c0000, 0xfffc0000, "xvshuf4i.d", "x0:5,x5:5,u10:8", 0, 0, 0, 0}, -+ { 0x77c40000, 0xfffc0000, "xvbitseli.b", "x0:5,x5:5,u10:8", 0, 0, 0, 0}, -+ { 0x77d00000, 0xfffc0000, "xvandi.b", "x0:5,x5:5,u10:8", 0, 0, 0, 0}, -+ { 0x77d40000, 0xfffc0000, "xvori.b", "x0:5,x5:5,u10:8", 0, 0, 0, 0}, -+ { 0x77d80000, 0xfffc0000, "xvxori.b", "x0:5,x5:5,u10:8", 0, 0, 0, 0}, -+ { 0x77dc0000, 0xfffc0000, "xvnori.b", "x0:5,x5:5,u10:8", 0, 0, 0, 0}, -+ { 0, 0, "xvrepli.b", "x,s0:10", "xvldi %1,(%2)&0x3ff", 0, 0, 0}, -+ { 0, 0, "xvrepli.d", "x,s0:10", "xvldi %1,((%2)&0x3ff)|0xc00", 0, 0, 0}, -+ { 0, 0, "xvrepli.h", "x,s0:10", "xvldi %1,((%2)&0x3ff)|0x400", 0, 0, 0}, -+ { 0, 0, "xvrepli.w", "x,s0:10", "xvldi %1,((%2)&0x3ff)|0x800", 0, 0, 0}, -+ { 0x77e00000, 0xfffc0000, "xvldi", "x0:5,s5:13", 0, 0, 0, 0}, -+ { 0x77e40000, 0xfffc0000, "xvpermi.w", "x0:5,x5:5,u10:8", 0, 0, 0, 0}, -+ { 0x77e80000, 0xfffc0000, "xvpermi.d", "x0:5,x5:5,u10:8", 0, 0, 0, 0}, -+ { 0x77ec0000, 0xfffc0000, "xvpermi.q", "x0:5,x5:5,u10:8", 0, 0, 0, 0}, -+ { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ -+}; -+ -+static struct loongarch_opcode loongarch_lvz_opcodes[] = -+{ -+ /* match, mask, name, format, macro, include, exclude, pinfo. */ -+ {0x05000000, 0xff0003e0, "gcsrrd", "r0:5,u10:14", 0, 0, 0, 0}, -+ {0x05000020, 0xff0003e0, "gcsrwr", "r0:5,u10:14", 0, 0, 0, 0}, -+ {0x05000000, 0xff000000, "gcsrxchg", "r0:5,r5:5,u10:14", 0, 0, 0, 0}, -+ {0x06482401, 0xffffffff, "gtlbflush", "", 0, 0, 0, 0}, -+ {0x002b8000, 0xffff8000, "hvcl", "u0:15", 0, 0, 0, 0}, -+ { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ -+}; -+ -+static struct loongarch_opcode loongarch_lbt_opcodes[] = -+{ -+ /* match, mask, name, format, macro, include, exclude, pinfo. */ -+ {0x00000800, 0xfffffc1c, "movgr2scr", "cr0:2,r5:5", 0, 0, 0, 0}, -+ {0x00000c00, 0xffffff80, "movscr2gr", "r0:5,cr5:2", 0, 0, 0, 0}, -+ {0x48000200, 0xfc0003e0, "jiscr0", "s0:5|10:16<<2", 0, 0, 0, 0}, -+ {0x48000300, 0xfc0003e0, "jiscr1", "s0:5|10:16<<2", 0, 0, 0, 0}, -+ {0x00290000, 0xffff8000, "addu12i.w", "r0:5,r5:5,s10:5", 0, 0, 0, 0}, -+ {0x00298000, 0xffff8000, "addu12i.d", "r0:5,r5:5,s10:5", 0, 0, 0, 0}, -+ {0x00300000, 0xffff8000, "adc.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0}, -+ {0x00308000, 0xffff8000, "adc.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0}, -+ {0x00310000, 0xffff8000, "adc.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0}, -+ {0x00318000, 0xffff8000, "adc.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0}, -+ {0x00320000, 0xffff8000, "sbc.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0}, -+ {0x00328000, 0xffff8000, "sbc.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0}, -+ {0x00330000, 0xffff8000, "sbc.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0}, -+ {0x00338000, 0xffff8000, "sbc.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0}, -+ {0x001a0000, 0xffff8000, "rotr.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0}, -+ {0x001a8000, 0xffff8000, "rotr.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0}, -+ {0x004c2000, 0xffffe000, "rotri.b", "r0:5,r5:5,u10:3", 0, 0, 0, 0}, -+ {0x004c4000, 0xffffc000, "rotri.h", "r0:5,r5:5,u10:4", 0, 0, 0, 0}, -+ {0x00340000, 0xffff8000, "rcr.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0}, -+ {0x00348000, 0xffff8000, "rcr.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0}, -+ {0x00350000, 0xffff8000, "rcr.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0}, -+ {0x00358000, 0xffff8000, "rcr.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0}, -+ {0x00502000, 0xffffe000, "rcri.b", "r0:5,r5:5,u10:3", 0, 0, 0, 0}, -+ {0x00504000, 0xffffc000, "rcri.h", "r0:5,r5:5,u10:4", 0, 0, 0, 0}, -+ {0x00508000, 0xffff8000, "rcri.w", "r0:5,r5:5,u10:5", 0, 0, 0, 0}, -+ {0x00510000, 0xffff0000, "rcri.d", "r0:5,r5:5,u10:6", 0, 0, 0, 0}, -+ {0x0114e400, 0xfffffc00, "fcvt.ud.d", "f0:5,f5:5", 0, 0, 0, 0}, -+ {0x0114e000, 0xfffffc00, "fcvt.ld.d", "f0:5,f5:5", 0, 0, 0, 0}, -+ {0x01150000, 0xffff8000, "fcvt.d.ld", "f0:5,f5:5,f10:5", 0, 0, 0, 0}, -+ {0x2e800000, 0xffc00000, "ldl.d", "r0:5,r5:5,so10:12", 0, 0, 0, 0}, -+ {0x2e000000, 0xffc00000, "ldl.w", "r0:5,r5:5,so10:12", 0, 0, 0, 0}, -+ {0x2e400000, 0xffc00000, "ldr.w", "r0:5,r5:5,so10:12", 0, 0, 0, 0}, -+ {0x2ec00000, 0xffc00000, "ldr.d", "r0:5,r5:5,so10:12", 0, 0, 0, 0}, -+ {0x2f000000, 0xffc00000, "stl.w", "r0:5,r5:5,so10:12", 0, 0, 0, 0}, -+ {0x2f800000, 0xffc00000, "stl.d", "r0:5,r5:5,so10:12", 0, 0, 0, 0}, -+ {0x2f400000, 0xffc00000, "str.w", "r0:5,r5:5,so10:12", 0, 0, 0, 0}, -+ {0x2fc00000, 0xffc00000, "str.d", "r0:5,r5:5,so10:12", 0, 0, 0, 0}, -+ {0x003f000c, 0xffff801f, "x86adc.b", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f000d, 0xffff801f, "x86adc.h", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f000e, 0xffff801f, "x86adc.w", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f000f, 0xffff801f, "x86adc.d", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f0004, 0xffff801f, "x86add.b", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f0005, 0xffff801f, "x86add.h", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f0006, 0xffff801f, "x86add.w", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f0007, 0xffff801f, "x86add.d", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f0000, 0xffff801f, "x86add.wu", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f0001, 0xffff801f, "x86add.du", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x00008000, 0xfffffc1f, "x86inc.b", "r5:5", 0, 0, 0, 0}, -+ {0x00008001, 0xfffffc1f, "x86inc.h", "r5:5", 0, 0, 0, 0}, -+ {0x00008002, 0xfffffc1f, "x86inc.w", "r5:5", 0, 0, 0, 0}, -+ {0x00008003, 0xfffffc1f, "x86inc.d", "r5:5", 0, 0, 0, 0}, -+ {0x003f0010, 0xffff801f, "x86sbc.b", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f0011, 0xffff801f, "x86sbc.h", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f0012, 0xffff801f, "x86sbc.w", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f0013, 0xffff801f, "x86sbc.d", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f0008, 0xffff801f, "x86sub.b", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f0009, 0xffff801f, "x86sub.h", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f000a, 0xffff801f, "x86sub.w", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f000b, 0xffff801f, "x86sub.d", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f0002, 0xffff801f, "x86sub.wu", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f0003, 0xffff801f, "x86sub.du", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x00008004, 0xfffffc1f, "x86dec.b", "r5:5", 0, 0, 0, 0}, -+ {0x00008005, 0xfffffc1f, "x86dec.h", "r5:5", 0, 0, 0, 0}, -+ {0x00008006, 0xfffffc1f, "x86dec.w", "r5:5", 0, 0, 0, 0}, -+ {0x00008007, 0xfffffc1f, "x86dec.d", "r5:5", 0, 0, 0, 0}, -+ {0x003f8010, 0xffff801f, "x86and.b", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f8011, 0xffff801f, "x86and.h", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f8012, 0xffff801f, "x86and.w", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f8013, 0xffff801f, "x86and.d", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f8014, 0xffff801f, "x86or.b", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f8015, 0xffff801f, "x86or.h", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f8016, 0xffff801f, "x86or.w", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f8017, 0xffff801f, "x86or.d", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f8018, 0xffff801f, "x86xor.b", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f8019, 0xffff801f, "x86xor.h", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f801a, 0xffff801f, "x86xor.w", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f801b, 0xffff801f, "x86xor.d", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003e8000, 0xffff801f, "x86mul.b", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003e8001, 0xffff801f, "x86mul.h", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003e8002, 0xffff801f, "x86mul.w", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003e8003, 0xffff801f, "x86mul.d", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003e8004, 0xffff801f, "x86mul.bu", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003e8005, 0xffff801f, "x86mul.hu", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003e8006, 0xffff801f, "x86mul.wu", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003e8007, 0xffff801f, "x86mul.du", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f800c, 0xffff801f, "x86rcl.b", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f800d, 0xffff801f, "x86rcl.h", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f800e, 0xffff801f, "x86rcl.w", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f800f, 0xffff801f, "x86rcl.d", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x00542018, 0xffffe01f, "x86rcli.b", "r5:5,u10:3", 0, 0, 0, 0}, -+ {0x00544019, 0xffffc01f, "x86rcli.h", "r5:5,u10:4", 0, 0, 0, 0}, -+ {0x0054801a, 0xffff801f, "x86rcli.w", "r5:5,u10:5", 0, 0, 0, 0}, -+ {0x0055001b, 0xffff001f, "x86rcli.d", "r5:5,u10:6", 0, 0, 0, 0}, -+ {0x003f8008, 0xffff801f, "x86rcr.b", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f8009, 0xffff801f, "x86rcr.h", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f800a, 0xffff801f, "x86rcr.w", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f800b, 0xffff801f, "x86rcr.d", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x00542010, 0xffffe01f, "x86rcri.b", "r5:5,u10:3", 0, 0, 0, 0}, -+ {0x00544011, 0xffffc01f, "x86rcri.h", "r5:5,u10:4", 0, 0, 0, 0}, -+ {0x00548012, 0xffff801f, "x86rcri.w", "r5:5,u10:5", 0, 0, 0, 0}, -+ {0x00550013, 0xffff001f, "x86rcri.d", "r5:5,u10:6", 0, 0, 0, 0}, -+ {0x003f8004, 0xffff801f, "x86rotl.b", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f8005, 0xffff801f, "x86rotl.h", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f8006, 0xffff801f, "x86rotl.w", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f8007, 0xffff801f, "x86rotl.d", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x00542014, 0xffffe01f, "x86rotli.b", "r5:5,u10:3", 0, 0, 0, 0}, -+ {0x00544015, 0xffffc01f, "x86rotli.h", "r5:5,u10:4", 0, 0, 0, 0}, -+ {0x00548016, 0xffff801f, "x86rotli.w", "r5:5,u10:5", 0, 0, 0, 0}, -+ {0x00550017, 0xffff001f, "x86rotli.d", "r5:5,u10:6", 0, 0, 0, 0}, -+ {0x003f8000, 0xffff801f, "x86rotr.b", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f8001, 0xffff801f, "x86rotr.h", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f8002, 0xffff801f, "x86rotr.d", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f8003, 0xffff801f, "x86rotr.w", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x0054200c, 0xffffe01f, "x86rotri.b", "r5:5,u10:3", 0, 0, 0, 0}, -+ {0x0054400d, 0xffffc01f, "x86rotri.h", "r5:5,u10:4", 0, 0, 0, 0}, -+ {0x0054800e, 0xffff801f, "x86rotri.w", "r5:5,u10:5", 0, 0, 0, 0}, -+ {0x0055000f, 0xffff001f, "x86rotri.d", "r5:5,u10:6", 0, 0, 0, 0}, -+ {0x003f0014, 0xffff801f, "x86sll.b", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f0015, 0xffff801f, "x86sll.h", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f0016, 0xffff801f, "x86sll.w", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f0017, 0xffff801f, "x86sll.d", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x00542000, 0xffffe01f, "x86slli.b", "r5:5,u10:3", 0, 0, 0, 0}, -+ {0x00544001, 0xffffc01f, "x86slli.h", "r5:5,u10:4", 0, 0, 0, 0}, -+ {0x00548002, 0xffff801f, "x86slli.w", "r5:5,u10:5", 0, 0, 0, 0}, -+ {0x00550003, 0xffff001f, "x86slli.d", "r5:5,u10:6", 0, 0, 0, 0}, -+ {0x003f0018, 0xffff801f, "x86srl.b", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f0019, 0xffff801f, "x86srl.h", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f001a, 0xffff801f, "x86srl.w", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f001b, 0xffff801f, "x86srl.d", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x00542004, 0xffffe01f, "x86srli.b", "r5:5,u10:3", 0, 0, 0, 0}, -+ {0x00544005, 0xffffc01f, "x86srli.h", "r5:5,u10:4", 0, 0, 0, 0}, -+ {0x00548006, 0xffff801f, "x86srli.w", "r5:5,u10:5", 0, 0, 0, 0}, -+ {0x00550007, 0xffff001f, "x86srli.d", "r5:5,u10:6", 0, 0, 0, 0}, -+ {0x003f001c, 0xffff801f, "x86sra.b", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f001d, 0xffff801f, "x86sra.h", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f001e, 0xffff801f, "x86sra.w", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x003f001f, 0xffff801f, "x86sra.d", "r5:5,r10:5", 0, 0, 0, 0}, -+ {0x00542008, 0xffffe01f, "x86srai.b", "r5:5,u10:3", 0, 0, 0, 0}, -+ {0x00544009, 0xffffc01f, "x86srai.h", "r5:5,u10:4", 0, 0, 0, 0}, -+ {0x0054800a, 0xffff801f, "x86srai.w", "r5:5,u10:5", 0, 0, 0, 0}, -+ {0x0055000b, 0xffff001f, "x86srai.d", "r5:5,u10:6", 0, 0, 0, 0}, -+ {0x00368000, 0xffffc3e0, "setx86j", "r0:5,u10:4", 0, 0, 0, 0}, -+ {0x00007800, 0xfffffc00, "setx86loope", "r0:5,r5:5", 0, 0, 0, 0}, -+ {0x00007c00, 0xfffffc00, "setx86loopne", "r0:5,r5:5", 0, 0, 0, 0}, -+ {0x005c0000, 0xfffc03e0, "x86mfflag", "r0:5,u10:8", 0, 0, 0, 0}, -+ {0x005c0020, 0xfffc03e0, "x86mtflag", "r0:5,u10:8", 0, 0, 0, 0}, -+ {0x00007400, 0xffffffe0, "x86mftop", "r0:5", 0, 0, 0, 0}, -+ {0x00007000, 0xffffff1f, "x86mttop", "u5:3", 0, 0, 0, 0}, -+ {0x00008009, 0xffffffff, "x86inctop", "", 0, 0, 0, 0}, -+ {0x00008029, 0xffffffff, "x86dectop", "", 0, 0, 0, 0}, -+ {0x00008008, 0xffffffff, "x86settm", "", 0, 0, 0, 0}, -+ {0x00008028, 0xffffffff, "x86clrtm", "", 0, 0, 0, 0}, -+ {0x00580000, 0xfffc0000, "x86settag", "r0:5,u5:5,u10:8", 0, 0, 0, 0}, -+ {0x00370010, 0xffff8010, "armadd.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0}, -+ {0x00378010, 0xffff8010, "armsub.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0}, -+ {0x00380010, 0xffff8010, "armadc.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0}, -+ {0x00388010, 0xffff8010, "armsbc.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0}, -+ {0x00390010, 0xffff8010, "armand.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0}, -+ {0x00398010, 0xffff8010, "armor.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0}, -+ {0x003a0010, 0xffff8010, "armxor.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0}, -+ {0x003fc01c, 0xffffc01f, "armnot.w", "r5:5,u10:4", 0, 0, 0, 0}, -+ {0x003a8010, 0xffff8010, "armsll.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0}, -+ {0x003b0010, 0xffff8010, "armsrl.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0}, -+ {0x003b8010, 0xffff8010, "armsra.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0}, -+ {0x003c0010, 0xffff8010, "armrotr.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0}, -+ {0x003c8010, 0xffff8010, "armslli.w", "r5:5,u10:5,u0:4", 0, 0, 0, 0}, -+ {0x003d0010, 0xffff8010, "armsrli.w", "r5:5,u10:5,u0:4", 0, 0, 0, 0}, -+ {0x003d8010, 0xffff8010, "armsrai.w", "r5:5,u10:5,u0:4", 0, 0, 0, 0}, -+ {0x003e0010, 0xffff8010, "armrotri.w", "r5:5,u10:5,u0:4", 0, 0, 0, 0}, -+ {0x003fc01f, 0xffffc01f, "armrrx.w", "r5:5,u10:4", 0, 0, 0, 0}, -+ {0x00364000, 0xffffc000, "armmove", "r0:5,r5:5,u10:4", 0, 0, 0, 0}, -+ {0x003fc01d, 0xffffc01f, "armmov.w", "r5:5,u10:4", 0, 0, 0, 0}, -+ {0x003fc01e, 0xffffc01f, "armmov.d", "r5:5,u10:4", 0, 0, 0, 0}, -+ {0x005c0040, 0xfffc03e0, "armmfflag", "r0:5,u10:8", 0, 0, 0, 0}, -+ {0x005c0060, 0xfffc03e0, "armmtflag", "r0:5,u10:8", 0, 0, 0, 0}, -+ {0x0036c000, 0xffffc3e0, "setarmj", "r0:5,u10:4", 0, 0, 0, 0}, -+ { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ - }; - - struct loongarch_ase loongarch_ASEs[] = - { - { &LARCH_opts.ase_ilp32, loongarch_macro_opcodes, 0, 0, { 0 }, 0, 0 }, -+ { &LARCH_opts.ase_ilp32, loongarch_alias_opcodes, 0, 0, { 0 }, 0, 0 }, - { &LARCH_opts.ase_ilp32, loongarch_imm_opcodes, 0, 0, { 0 }, 0, 0 }, - { &LARCH_opts.ase_ilp32, loongarch_privilege_opcodes, 0, 0, { 0 }, 0, 0 }, - { &LARCH_opts.ase_ilp32, loongarch_load_store_opcodes, 0, 0, { 0 }, 0, 0 }, -@@ -860,5 +2548,9 @@ struct loongarch_ase loongarch_ASEs[] = - { &LARCH_opts.ase_df, loongarch_4opt_double_float_opcodes, 0, 0, { 0 }, 0, 0 }, - { &LARCH_opts.ase_sf, loongarch_single_float_load_store_opcodes, 0, 0, { 0 }, 0, 0 }, - { &LARCH_opts.ase_df, loongarch_double_float_load_store_opcodes, 0, 0, { 0 }, 0, 0 }, -- { 0 }, -+ { &LARCH_opts.ase_lsx, loongarch_lsx_opcodes, 0, 0, { 0 }, 0, 0 }, -+ { &LARCH_opts.ase_lasx, loongarch_lasx_opcodes, 0, 0, { 0 }, 0, 0 }, -+ { &LARCH_opts.ase_lvz, loongarch_lvz_opcodes, 0, 0, { 0 }, 0, 0 }, -+ { &LARCH_opts.ase_lbt, loongarch_lbt_opcodes, 0, 0, { 0 }, 0, 0 }, -+ { 0, 0, 0, 0, { 0 }, 0, 0 }, - }; --- -2.33.0 - diff --git a/0023-binutils-aarch64-big-bti-programs.patch b/0023-binutils-aarch64-big-bti-programs.patch new file mode 100644 index 0000000000000000000000000000000000000000..b9e50bdbfd8820113eefbb81908231dfe54d1563 --- /dev/null +++ b/0023-binutils-aarch64-big-bti-programs.patch @@ -0,0 +1,139 @@ +diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c +index 4592bd6da27..4faf642b422 100644 +--- a/bfd/elfnn-aarch64.c ++++ b/bfd/elfnn-aarch64.c +@@ -3675,7 +3675,7 @@ group_sections (struct elf_aarch64_link_hash_table *htab, + /* True if the inserted stub does not break BTI compatibility. */ + + static bool +-aarch64_bti_stub_p (bfd *input_bfd, ++aarch64_bti_stub_p (struct bfd_link_info *info, + struct elf_aarch64_stub_hash_entry *stub_entry) + { + /* Stubs without indirect branch are BTI compatible. */ +@@ -3685,12 +3685,22 @@ aarch64_bti_stub_p (bfd *input_bfd, + + /* Return true if the target instruction is compatible with BR x16. */ + ++ struct elf_aarch64_link_hash_table *globals = elf_aarch64_hash_table (info); + asection *section = stub_entry->target_section; + bfd_byte loc[4]; + file_ptr off = stub_entry->target_value; + bfd_size_type count = sizeof (loc); + +- if (!bfd_get_section_contents (input_bfd, section, loc, off, count)) ++ /* PLT code is not generated yet, so treat it specially. ++ Note: Checking elf_aarch64_obj_tdata.plt_type & PLT_BTI is not ++ enough because it only implies BTI in the PLT0 and tlsdesc PLT ++ entries. Normal PLT entries don't have BTI in a shared library ++ (because such PLT is normally not called indirectly and adding ++ the BTI when a stub targets a PLT would change the PLT layout ++ and it's too late for that here). */ ++ if (section == globals->root.splt) ++ memcpy (loc, globals->plt_entry, count); ++ else if (!bfd_get_section_contents (section->owner, section, loc, off, count)) + return false; + + uint32_t insn = bfd_getl32 (loc); +@@ -4637,11 +4647,24 @@ _bfd_aarch64_add_call_stub_entries (bool *stub_changed, bfd *output_bfd, + + /* A stub with indirect jump may break BTI compatibility, so + insert another stub with direct jump near the target then. */ +- if (need_bti && !aarch64_bti_stub_p (input_bfd, stub_entry)) ++ if (need_bti && !aarch64_bti_stub_p (info, stub_entry)) + { ++ id_sec_bti = htab->stub_group[sym_sec->id].link_sec; ++ ++ /* If the stub with indirect jump and the BTI stub are in ++ the same stub group: change the indirect jump stub into ++ a BTI stub since a direct branch can reach the target. ++ The BTI landing pad is still needed in case another ++ stub indirectly jumps to it. */ ++ if (id_sec_bti == id_sec) ++ { ++ stub_entry->stub_type = aarch64_stub_bti_direct_branch; ++ goto skip_double_stub; ++ } ++ + stub_entry->double_stub = true; + htab->has_double_stub = true; +- id_sec_bti = htab->stub_group[sym_sec->id].link_sec; ++ + stub_name_bti = + elfNN_aarch64_stub_name (id_sec_bti, sym_sec, hash, irela); + if (!stub_name_bti) +@@ -4653,33 +4676,41 @@ _bfd_aarch64_add_call_stub_entries (bool *stub_changed, bfd *output_bfd, + stub_entry_bti = + aarch64_stub_hash_lookup (&htab->stub_hash_table, + stub_name_bti, false, false); +- if (stub_entry_bti == NULL) +- stub_entry_bti = +- _bfd_aarch64_add_stub_entry_in_group (stub_name_bti, +- sym_sec, htab); +- if (stub_entry_bti == NULL) ++ if (stub_entry_bti != NULL) ++ BFD_ASSERT (stub_entry_bti->stub_type ++ == aarch64_stub_bti_direct_branch); ++ else + { +- free (stub_name); +- free (stub_name_bti); +- goto error_ret_free_internal; +- } +- +- stub_entry_bti->target_value = sym_value + irela->r_addend; +- stub_entry_bti->target_section = sym_sec; +- stub_entry_bti->stub_type = aarch64_stub_bti_direct_branch; +- stub_entry_bti->h = hash; +- stub_entry_bti->st_type = st_type; ++ stub_entry_bti = ++ _bfd_aarch64_add_stub_entry_in_group (stub_name_bti, ++ sym_sec, htab); ++ if (stub_entry_bti == NULL) ++ { ++ free (stub_name); ++ free (stub_name_bti); ++ goto error_ret_free_internal; ++ } + +- len = sizeof (BTI_STUB_ENTRY_NAME) + strlen (sym_name); +- stub_entry_bti->output_name = bfd_alloc (htab->stub_bfd, len); +- if (stub_entry_bti->output_name == NULL) +- { +- free (stub_name); +- free (stub_name_bti); +- goto error_ret_free_internal; ++ stub_entry_bti->target_value = ++ sym_value + irela->r_addend; ++ stub_entry_bti->target_section = sym_sec; ++ stub_entry_bti->stub_type = ++ aarch64_stub_bti_direct_branch; ++ stub_entry_bti->h = hash; ++ stub_entry_bti->st_type = st_type; ++ ++ len = sizeof (BTI_STUB_ENTRY_NAME) + strlen (sym_name); ++ stub_entry_bti->output_name = bfd_alloc (htab->stub_bfd, ++ len); ++ if (stub_entry_bti->output_name == NULL) ++ { ++ free (stub_name); ++ free (stub_name_bti); ++ goto error_ret_free_internal; ++ } ++ snprintf (stub_entry_bti->output_name, len, ++ BTI_STUB_ENTRY_NAME, sym_name); + } +- snprintf (stub_entry_bti->output_name, len, +- BTI_STUB_ENTRY_NAME, sym_name); + + /* Update the indirect call stub to target the BTI stub. */ + stub_entry->target_value = 0; +@@ -4688,7 +4719,7 @@ _bfd_aarch64_add_call_stub_entries (bool *stub_changed, bfd *output_bfd, + stub_entry->h = NULL; + stub_entry->st_type = STT_FUNC; + } +- ++skip_double_stub: + *stub_changed = true; + } + diff --git a/binutils-2.40.tar.xz b/binutils-2.41.tar.xz similarity index 69% rename from binutils-2.40.tar.xz rename to binutils-2.41.tar.xz index e9c9f9d4c68c8ff37d85890f0389bba89fd7149d..17cfb0cec609e1771ed867b2d005492329759e39 100644 Binary files a/binutils-2.40.tar.xz and b/binutils-2.41.tar.xz differ diff --git a/binutils.spec b/binutils.spec index 23c35fff37b11c2561801bde2b19e4008a65b692..a2dd48ee809c27cbbef5ddf7562f6edf6c68ff4a 100644 --- a/binutils.spec +++ b/binutils.spec @@ -1,4 +1,4 @@ -%define anolis_release 3 +%define anolis_release 1 # Determine if this is a native build or a cross build. # # For a cross build add --define "binutils_target " to the command @@ -38,7 +38,7 @@ Summary: A GNU collection of binary utilities Name: binutils%{?name_cross}%{?_with_debug:-debug} -Version: 2.40 +Version: 2.41 Release: %{anolis_release}%{?dist} License: GPL-3.0-or-later AND (GPL-3.0-or-later WITH Bison-exception-2.2) AND (LGPL-2.0-or-later WITH GCC-exception-2.0) AND BSD-3-Clause AND GFDL-1.3-or-later AND GPL-2.0-or-later LGPL-2.1-or-later AND LGPL-2.0-or-later URL: https://sourceware.org/binutils @@ -291,10 +291,6 @@ Patch0016: 0016-gcc12-libtool-no-rpath.patch Patch0017: 0017-binutils-update-linker-manual.patch %endif -# Purpose: Speed up objcopy's note merging algorithm. -# Lifetime: Fixed in 2.41 -Patch0018: 0018-binutils-objcopy-note-merge-speedup.patch - # Purpose: Fix testsuite failures due to the patches applied here. # Lifetime: Permanent, but varying with each new rebase. Patch0019: 0019-binutils-testsuite-fixes.patch @@ -304,17 +300,10 @@ Patch0019: 0019-binutils-testsuite-fixes.patch # Lifetime: Fixed in 2.41 Patch0020: 0020-binutils-reloc-symtab.patch -# Purpose: Stop an illegal memory access in the BFD library when loading -# a file with corrupt symbol version information. -# Lifetime: Fixed in 2.41 -Patch0021: 0021-binutils-CVE-2023-1972.patch - # Purpose: Stop an abort when using dwp to process a file with no dwo links. # Lifetime: Fixed in 2.41 (maybe) Patch0022: 0022-binutils-gold-empty-dwp.patch -Patch0023: 0023-LoongArch-Add-lsx-and-lasx-instructions-support.patch - Provides: bundled(libiberty) BuildRequires: autoconf, automake, perl, sed, coreutils, make @@ -737,7 +726,7 @@ export LDFLAGS="$RPM_LD_FLAGS -Wl,--enable-new-dtags" %set_build_flags %make_build -s CFLAGS="-g -fPIC $RPM_OPT_FLAGS" -C libsframe -install -m 644 bfd/libbfd.a %{buildroot}%{_libdir} +install -m 644 bfd/.libs/libbfd.a %{buildroot}%{_libdir} install -m 644 libiberty/libiberty.a %{buildroot}%{_libdir} install -m 644 include/libiberty.h %{buildroot}%{_prefix}/include install -m 644 opcodes/libopcodes.a %{buildroot}%{_libdir} @@ -945,6 +934,9 @@ exit 0 %doc README ChangeLog MAINTAINERS README-maintainer-mode %changelog +* Fri Mar 8 2024 Xiaoping Liu - 2.41-1 +- update to 2.41 + * Thu Oct 19 2023 Peng Fan - 2.40-3 - LoongArch: add lsx and lasx instructions support. - add relaxation support.