From cde5a6897d2263df7736415b1f88e9cd4a6c2e37 Mon Sep 17 00:00:00 2001 From: huangfangrun Date: Thu, 20 Apr 2023 11:41:53 +0800 Subject: [PATCH 1/8] Revert "drivers/coresight: Add Ultrasoc System Memory Buffer driver" kunpeng inclusion category: cleanup bugzilla: https://gitee.com/openeuler/kernel/issues/I6XLGY CVE: NA ---------------------------------------------------------------------- This reverts commit b7525bf18e0850863af9a9f0b69adfe628aed1cb. Signed-off-by: huangfangrun --- drivers/hwtracing/coresight/Kconfig | 11 - drivers/hwtracing/coresight/Makefile | 1 - drivers/hwtracing/coresight/ultrasoc-smb.c | 602 --------------------- drivers/hwtracing/coresight/ultrasoc-smb.h | 100 ---- 4 files changed, 714 deletions(-) delete mode 100644 drivers/hwtracing/coresight/ultrasoc-smb.c delete mode 100644 drivers/hwtracing/coresight/ultrasoc-smb.h diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig index efb439fc0a32..ceaf1f89f45b 100644 --- a/drivers/hwtracing/coresight/Kconfig +++ b/drivers/hwtracing/coresight/Kconfig @@ -188,17 +188,6 @@ config CORESIGHT_TRBE To compile this driver as a module, choose M here: the module will be called coresight-trbe. -config ULTRASOC_SMB - tristate "Ultrasoc system memory buffer drivers" - depends on ARM64 && CORESIGHT_LINKS_AND_SINKS - help - This driver provides support for the Ultrasoc system memory buffer (SMB). - SMB is responsible for receiving the trace data from Coresight ETM devices - and storing them to a system buffer. - - To compile this driver as a module, choose M here: the module will be - called ultrasoc-smb. - endif config ACPI_TRBE diff --git a/drivers/hwtracing/coresight/Makefile b/drivers/hwtracing/coresight/Makefile index c2d6456953ad..d60816509755 100644 --- a/drivers/hwtracing/coresight/Makefile +++ b/drivers/hwtracing/coresight/Makefile @@ -24,4 +24,3 @@ obj-$(CONFIG_CORESIGHT_CTI) += coresight-cti.o obj-$(CONFIG_CORESIGHT_TRBE) += coresight-trbe.o coresight-cti-y := coresight-cti-core.o coresight-cti-platform.o \ coresight-cti-sysfs.o -obj-$(CONFIG_ULTRASOC_SMB) += ultrasoc-smb.o diff --git a/drivers/hwtracing/coresight/ultrasoc-smb.c b/drivers/hwtracing/coresight/ultrasoc-smb.c deleted file mode 100644 index 47adcf8a8d7b..000000000000 --- a/drivers/hwtracing/coresight/ultrasoc-smb.c +++ /dev/null @@ -1,602 +0,0 @@ -// SPDX-License-Identifier: MIT/GPL -/* - * Siemens System Memory Buffer driver. - * Copyright(c) 2021, HiSilicon Limited. - */ - -#include -#include -#include -#include -#include -#include - -#include "ultrasoc-smb.h" - -DEFINE_CORESIGHT_DEVLIST(sink_devs, "smb"); - -static bool smb_buffer_is_empty(struct smb_drv_data *drvdata) -{ - u32 buf_status = readl(drvdata->base + SMB_LB_INT_STS); - - return buf_status & BIT(0) ? false : true; -} - -static bool smb_buffer_cmp_pointer(struct smb_drv_data *drvdata) -{ - u32 wr_offset, rd_offset; - - wr_offset = readl(drvdata->base + SMB_LB_WR_ADDR); - rd_offset = readl(drvdata->base + SMB_LB_RD_ADDR); - return wr_offset == rd_offset; -} - -static void smb_reset_buffer_status(struct smb_drv_data *drvdata) -{ - writel(0xf, drvdata->base + SMB_LB_INT_STS); -} - -/* Purge data remaining in hardware path to SMB. */ -static void smb_purge_data(struct smb_drv_data *drvdata) -{ - writel(0x1, drvdata->base + SMB_LB_PURGE); -} - -static void smb_update_data_size(struct smb_drv_data *drvdata) -{ - struct smb_data_buffer *sdb = &drvdata->sdb; - u32 write_offset; - - smb_purge_data(drvdata); - if (smb_buffer_cmp_pointer(drvdata)) { - if (smb_buffer_is_empty(drvdata)) - sdb->data_size = 0; - else - sdb->data_size = sdb->buf_size; - return; - } - - write_offset = readl(drvdata->base + SMB_LB_WR_ADDR) - sdb->start_addr; - sdb->data_size = CIRC_CNT(write_offset, sdb->rd_offset, sdb->buf_size); -} - -static int smb_open(struct inode *inode, struct file *file) -{ - struct smb_drv_data *drvdata = container_of(file->private_data, - struct smb_drv_data, miscdev); - - if (local_cmpxchg(&drvdata->reading, 0, 1)) - return -EBUSY; - - return 0; -} - -static ssize_t smb_read(struct file *file, char __user *data, size_t len, loff_t *ppos) -{ - struct smb_drv_data *drvdata = container_of(file->private_data, - struct smb_drv_data, miscdev); - struct smb_data_buffer *sdb = &drvdata->sdb; - struct device *dev = &drvdata->csdev->dev; - unsigned long flags; - int to_copy = 0; - - spin_lock_irqsave(&drvdata->spinlock, flags); - - if (!sdb->data_size) { - smb_update_data_size(drvdata); - if (!sdb->data_size) - goto out; - } - - if (atomic_read(drvdata->csdev->refcnt)) { - to_copy = -EBUSY; - goto out; - } - - to_copy = min(sdb->data_size, len); - - /* Copy parts of trace data when the read pointer will wrap around SMB buffer. */ - if (sdb->rd_offset + to_copy > sdb->buf_size) - to_copy = sdb->buf_size - sdb->rd_offset; - - if (copy_to_user(data, (void *)sdb->buf_base + sdb->rd_offset, to_copy)) { - dev_dbg(dev, "Failed to copy data to user.\n"); - to_copy = -EFAULT; - goto out; - } - - *ppos += to_copy; - sdb->data_size -= to_copy; - sdb->rd_offset += to_copy; - sdb->rd_offset %= sdb->buf_size; - writel(sdb->start_addr + sdb->rd_offset, drvdata->base + SMB_LB_RD_ADDR); - dev_dbg(dev, "%d bytes copied.\n", to_copy); -out: - if (!sdb->data_size) - smb_reset_buffer_status(drvdata); - spin_unlock_irqrestore(&drvdata->spinlock, flags); - return to_copy; -} - -static int smb_release(struct inode *inode, struct file *file) -{ - struct smb_drv_data *drvdata = container_of(file->private_data, - struct smb_drv_data, miscdev); - local_set(&drvdata->reading, 0); - return 0; -} - -static const struct file_operations smb_fops = { - .owner = THIS_MODULE, - .open = smb_open, - .read = smb_read, - .release = smb_release, - .llseek = no_llseek, -}; - -smb_reg(read_pos, SMB_LB_RD_ADDR); -smb_reg(write_pos, SMB_LB_WR_ADDR); -smb_reg(buf_status, SMB_LB_INT_STS); - -static ssize_t buf_size_show(struct device *dev, struct device_attribute *attr, char *buf) -{ - struct smb_drv_data *drvdata = dev_get_drvdata(dev->parent); - - return sysfs_emit(buf, "0x%lx\n", drvdata->sdb.buf_size); -} -static DEVICE_ATTR_RO(buf_size); - -static struct attribute *smb_sink_attrs[] = { - &dev_attr_read_pos.attr, - &dev_attr_write_pos.attr, - &dev_attr_buf_status.attr, - &dev_attr_buf_size.attr, - NULL, -}; - -static const struct attribute_group smb_sink_group = { - .attrs = smb_sink_attrs, - .name = "status", -}; - -static const struct attribute_group *smb_sink_groups[] = { - &smb_sink_group, - NULL, -}; - -static int smb_set_perf_buffer(struct perf_output_handle *handle) -{ - struct cs_buffers *buf = etm_perf_sink_config(handle); - u32 head; - - if (!buf) - return -EINVAL; - - /* Wrap head around to the amount of space we have */ - head = handle->head & ((buf->nr_pages << PAGE_SHIFT) - 1); - - /* Find the page to write to and offset within that page */ - buf->cur = head / PAGE_SIZE; - buf->offset = head % PAGE_SIZE; - - local_set(&buf->data_size, 0); - - return 0; -} - -static void smb_enable_hw(struct smb_drv_data *drvdata) -{ - writel(0x1, drvdata->base + SMB_GLOBAL_EN); -} - -static void smb_disable_hw(struct smb_drv_data *drvdata) -{ - writel(0x0, drvdata->base + SMB_GLOBAL_EN); -} - -static int smb_enable_sysfs(struct smb_drv_data *drvdata) -{ - if (drvdata->mode == CS_MODE_PERF) - return -EBUSY; - - if (drvdata->mode == CS_MODE_SYSFS) - return 0; - - smb_enable_hw(drvdata); - drvdata->mode = CS_MODE_SYSFS; - return 0; -} - -static int smb_enable_perf(struct smb_drv_data *drvdata, void *data) -{ - struct device *dev = &drvdata->csdev->dev; - struct perf_output_handle *handle = data; - pid_t pid; - - if (drvdata->mode == CS_MODE_SYSFS) { - dev_err(dev, "Device is already in used by sysfs.\n"); - return -EBUSY; - } - - /* Get a handle on the pid of the target process*/ - pid = task_pid_nr(handle->event->owner); - if (drvdata->pid != -1 && drvdata->pid != pid) { - dev_err(dev, "Device is already in used by other session.\n"); - return -EBUSY; - } - /* The sink is already enabled by this session. */ - if (drvdata->pid == pid) - return 0; - - if (smb_set_perf_buffer(handle)) - return -EINVAL; - - smb_enable_hw(drvdata); - drvdata->pid = pid; - drvdata->mode = CS_MODE_PERF; - - return 0; -} - -static int smb_enable(struct coresight_device *csdev, u32 mode, void *data) -{ - struct smb_drv_data *drvdata = dev_get_drvdata(csdev->dev.parent); - unsigned long flags; - int ret = -EINVAL; - - /* Do nothing if trace data is reading by other interface now. */ - if (local_read(&drvdata->reading)) - return -EBUSY; - - spin_lock_irqsave(&drvdata->spinlock, flags); - - if (mode == CS_MODE_SYSFS) - ret = smb_enable_sysfs(drvdata); - - if (mode == CS_MODE_PERF) - ret = smb_enable_perf(drvdata, data); - - spin_unlock_irqrestore(&drvdata->spinlock, flags); - - if (ret) - return ret; - - atomic_inc(csdev->refcnt); - dev_dbg(&csdev->dev, "Ultrasoc SMB enabled.\n"); - - return 0; -} - -static int smb_disable(struct coresight_device *csdev) -{ - struct smb_drv_data *drvdata = dev_get_drvdata(csdev->dev.parent); - unsigned long flags; - - spin_lock_irqsave(&drvdata->spinlock, flags); - - if (atomic_dec_return(csdev->refcnt)) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); - return -EBUSY; - } - - WARN_ON_ONCE(drvdata->mode == CS_MODE_DISABLED); - smb_disable_hw(drvdata); - - /* - * Data remaining in hardware path will be sent to SMB after purge, so needs to - * synchronize the read pointer to write pointer in perf mode. - */ - smb_purge_data(drvdata); - if (drvdata->mode == CS_MODE_PERF) - writel(readl(drvdata->base + SMB_LB_WR_ADDR), drvdata->base + SMB_LB_RD_ADDR); - - /* Dissociate from the target process. */ - drvdata->pid = -1; - drvdata->mode = CS_MODE_DISABLED; - spin_unlock_irqrestore(&drvdata->spinlock, flags); - - dev_dbg(&csdev->dev, "Ultrasoc SMB disabled.\n"); - return 0; -} - -static void *smb_alloc_buffer(struct coresight_device *csdev, - struct perf_event *event, void **pages, - int nr_pages, bool overwrite) -{ - struct cs_buffers *buf; - int node; - - node = (event->cpu == -1) ? NUMA_NO_NODE : cpu_to_node(event->cpu); - buf = kzalloc_node(sizeof(struct cs_buffers), GFP_KERNEL, node); - if (!buf) - return NULL; - - buf->snapshot = overwrite; - buf->nr_pages = nr_pages; - buf->data_pages = pages; - - return buf; -} - -static void smb_free_buffer(void *config) -{ - struct cs_buffers *buf = config; - - kfree(buf); -} - -static void smb_sync_perf_buffer(struct smb_drv_data *drvdata, - struct cs_buffers *buf, unsigned long data_size) -{ - struct smb_data_buffer *sdb = &drvdata->sdb; - char **dst_pages = (char **)buf->data_pages; - unsigned long buf_offset = buf->offset; - unsigned int cur = buf->cur; - unsigned long to_copy; - - while (data_size) { - /* Copy parts of trace data when the read pointer will wrap around SMB buffer. */ - if (sdb->rd_offset + PAGE_SIZE - buf_offset > sdb->buf_size) - to_copy = sdb->buf_size - sdb->rd_offset; - else - to_copy = min(data_size, PAGE_SIZE - buf_offset); - - memcpy_fromio(dst_pages[cur] + buf_offset, sdb->buf_base + sdb->rd_offset, to_copy); - - buf_offset += to_copy; - if (buf_offset >= PAGE_SIZE) { - buf_offset = 0; - cur++; - cur %= buf->nr_pages; - } - data_size -= to_copy; - /* ensure memcpy finished before update the read pointer */ - sdb->rd_offset += to_copy; - sdb->rd_offset %= sdb->buf_size; - } - - sdb->data_size = 0; - writel(sdb->start_addr + sdb->rd_offset, drvdata->base + SMB_LB_RD_ADDR); - smb_reset_buffer_status(drvdata); -} - -static unsigned long smb_update_buffer(struct coresight_device *csdev, - struct perf_output_handle *handle, - void *sink_config) -{ - struct smb_drv_data *drvdata = dev_get_drvdata(csdev->dev.parent); - struct smb_data_buffer *sdb = &drvdata->sdb; - struct cs_buffers *buf = sink_config; - unsigned long data_size = 0; - unsigned long flags; - bool lost = false; - - if (!buf) - return 0; - - spin_lock_irqsave(&drvdata->spinlock, flags); - - /* Don't do anything if another tracer is using this sink. */ - if (atomic_read(csdev->refcnt) != 1) - goto out; - - smb_update_data_size(drvdata); - data_size = sdb->data_size; - if (data_size > handle->size) { - sdb->rd_offset += data_size - handle->size; - sdb->rd_offset %= sdb->buf_size; - data_size = handle->size; - lost = true; - } - - smb_sync_perf_buffer(drvdata, buf, data_size); - if (!buf->snapshot && lost) - perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED); - -out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); - return data_size; -} - -static const struct coresight_ops_sink smb_cs_ops = { - .enable = smb_enable, - .disable = smb_disable, - .alloc_buffer = smb_alloc_buffer, - .free_buffer = smb_free_buffer, - .update_buffer = smb_update_buffer, -}; - -static const struct coresight_ops cs_ops = { - .sink_ops = &smb_cs_ops, -}; - -static int smb_init_data_buffer(struct platform_device *pdev, struct smb_data_buffer *sdb) -{ - struct resource *res; - void __iomem *base; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 1); - if (IS_ERR(res)) { - dev_err(&pdev->dev, "SMB device failed to get resource.\n"); - return -EINVAL; - } - - sdb->start_addr = res->start & SMB_BASE_LOW_MASK; - sdb->buf_size = resource_size(res); - if (sdb->buf_size == 0) - return -EINVAL; - - base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(base)) - return PTR_ERR(base); - - sdb->buf_base = base; - - return 0; -} - -static void smb_init_hw(struct smb_drv_data *drvdata) -{ - u32 value; - - /* First disable smb and clear the status of SMB buffer */ - smb_reset_buffer_status(drvdata); - smb_disable_hw(drvdata); - smb_purge_data(drvdata); - - /* Using smb in single-end mode, and set other configures default */ - value = SMB_BUF_CFG_STREAMING | SMB_BUF_SINGLE_END | SMB_BUF_EN; - writel(value, drvdata->base + SMB_LB_CFG_LO); - value = SMB_MSG_FILTER(0x0, 0xff); - writel(value, drvdata->base + SMB_LB_CFG_HI); - - writel(SMB_GLOBAL_CFG, drvdata->base + SMB_CFG_REG); - writel(SMB_GLB_INT_CFG, drvdata->base + SMB_GLOBAL_INT); - writel(SMB_BUF_INT_CFG, drvdata->base + SMB_LB_INT_CTRL); -} - -static int smb_register_sink(struct platform_device *pdev, struct smb_drv_data *drvdata) -{ - struct coresight_platform_data *pdata = NULL; - struct coresight_desc desc = { 0 }; - int ret; - - pdata = coresight_get_platform_data(&pdev->dev); - if (IS_ERR(pdata)) - return PTR_ERR(pdata); - - desc.type = CORESIGHT_DEV_TYPE_SINK; - desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER; - desc.ops = &cs_ops; - desc.pdata = pdata; - desc.dev = &pdev->dev; - desc.groups = smb_sink_groups; - desc.name = coresight_alloc_device_name(&sink_devs, &pdev->dev); - if (!desc.name) { - dev_err(&pdev->dev, "Failed to alloc coresight device name."); - return -ENOMEM; - } - - drvdata->csdev = coresight_register(&desc); - if (IS_ERR(drvdata->csdev)) - return PTR_ERR(drvdata->csdev); - - drvdata->miscdev.name = desc.name; - drvdata->miscdev.minor = MISC_DYNAMIC_MINOR; - drvdata->miscdev.fops = &smb_fops; - ret = misc_register(&drvdata->miscdev); - if (ret) { - coresight_unregister(drvdata->csdev); - dev_err(&pdev->dev, "Failed to register misc, ret=%d.\n", ret); - } - - return ret; -} - -static void smb_unregister_sink(struct smb_drv_data *drvdata) -{ - misc_deregister(&drvdata->miscdev); - coresight_unregister(drvdata->csdev); -} - -/* - * Send ultrasoc messge to control hardwares on the tracing path, - * using DSM calls to avoid exposing ultrasoc message format. - */ -static int smb_config_inport(struct device *dev, bool enable) -{ - u32 flag = enable ? 1 : 0; - union acpi_object *obj; - guid_t guid; - - if (guid_parse("82ae1283-7f6a-4cbe-aa06-53e8fb24db18", &guid)) { - dev_err(dev, "Get GUID failed.\n"); - return -EINVAL; - } - - obj = acpi_evaluate_dsm(ACPI_HANDLE(dev), &guid, 0, flag, NULL); - if (!obj) - dev_err(dev, "ACPI handle failed!\n"); - else - ACPI_FREE(obj); - - return 0; -} - -static int smb_probe(struct platform_device *pdev) -{ - struct smb_drv_data *drvdata; - int ret; - - drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL); - if (!drvdata) - return -ENOMEM; - - drvdata->base = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(drvdata->base)) { - dev_err(&pdev->dev, "Failed to ioremap resource.\n"); - return PTR_ERR(drvdata->base); - } - - ret = smb_init_data_buffer(pdev, &drvdata->sdb); - if (ret) { - dev_err(&pdev->dev, "Failed to init buffer, ret = %d.\n", ret); - return ret; - } - - smb_init_hw(drvdata); - spin_lock_init(&drvdata->spinlock); - drvdata->pid = -1; - - ret = smb_register_sink(pdev, drvdata); - if (ret) { - dev_err(&pdev->dev, "Failed to register smb sink.\n"); - return ret; - } - - ret = smb_config_inport(&pdev->dev, true); - if (ret) { - smb_unregister_sink(drvdata); - return ret; - } - - platform_set_drvdata(pdev, drvdata); - return 0; -} - -static int smb_remove(struct platform_device *pdev) -{ - struct smb_drv_data *drvdata = platform_get_drvdata(pdev); - int ret; - - ret = smb_config_inport(&pdev->dev, false); - if (ret) - return ret; - - smb_unregister_sink(drvdata); - return 0; -} - -#ifdef CONFIG_ACPI -static const struct acpi_device_id ultrasoc_smb_acpi_match[] = { - {"HISI03A1", 0}, - {}, -}; -MODULE_DEVICE_TABLE(acpi, ultrasoc_smb_acpi_match); -#endif - -static struct platform_driver smb_driver = { - .driver = { - .name = "ultrasoc-smb", - .acpi_match_table = ACPI_PTR(ultrasoc_smb_acpi_match), - .suppress_bind_attrs = true, - }, - .probe = smb_probe, - .remove = smb_remove, -}; -module_platform_driver(smb_driver); - -MODULE_DESCRIPTION("Ultrasoc smb driver"); -MODULE_LICENSE("Dual MIT/GPL"); -MODULE_AUTHOR("Jonathan Zhou "); -MODULE_AUTHOR("Qi Liu "); diff --git a/drivers/hwtracing/coresight/ultrasoc-smb.h b/drivers/hwtracing/coresight/ultrasoc-smb.h deleted file mode 100644 index 672ba32d642c..000000000000 --- a/drivers/hwtracing/coresight/ultrasoc-smb.h +++ /dev/null @@ -1,100 +0,0 @@ -/* SPDX-License-Identifier: MIT */ -/* - * Siemens System Memory Buffer driver. - * Copyright(c) 2021, HiSilicon Limited. - */ - -#ifndef _ULTRASOC_SMB_H -#define _ULTRASOC_SMB_H - -#include -#include -#include - -#include "coresight-etm-perf.h" -#include "coresight-priv.h" - -/* Offset of SMB logical buffer registers */ -#define SMB_CFG_REG 0X0 -#define SMB_GLOBAL_EN 0X4 -#define SMB_GLOBAL_INT 0X8 -#define SMB_LB_CFG_LO 0X40 -#define SMB_LB_CFG_HI 0X44 -#define SMB_LB_INT_CTRL 0X48 -#define SMB_LB_INT_STS 0X4C -#define SMB_LB_LIMIT 0X58 -#define SMB_LB_RD_ADDR 0X5C -#define SMB_LB_WR_ADDR 0X60 -#define SMB_LB_PURGE 0X64 - -/* Set SMB_CFG_REG register */ -#define SMB_IDLE_PRD(period) (((period - 216) & 0xf) << 12) -#define SMB_MEM_WR(credit, rate) (((credit) << 16) | ((rate) << 18)) -#define SMB_MEM_RD(credit, rate) (((credit) << 22) | ((rate) << 24)) -#define SMB_BURST_LEN(len) ((len - 1) << 4) -#define SMB_GLOBAL_CFG (SMB_IDLE_PRD(231) | SMB_MEM_WR(0x3, 0x0) | \ - SMB_MEM_RD(0x3, 0x6) | SMB_BURST_LEN(16)) - -/* Set SMB_GLOBAL_INT register */ -#define SMB_INT_EN BIT(0) -#define SMB_INT_TYPE_PULSE BIT(1) -#define SMB_INT_POLARITY_HIGH BIT(2) -#define SMB_GLB_INT_CFG (SMB_INT_EN | SMB_INT_TYPE_PULSE | SMB_INT_POLARITY_HIGH) - -/* Set SMB_LB_CFG_LO register */ -#define SMB_BUF_EN BIT(0) -#define SMB_BUF_SINGLE_END BIT(1) -#define SMB_BUF_INIT BIT(8) -#define SMB_BUF_CONTINUOUS BIT(11) -#define SMB_FLOW_MASK GENMASK(19, 16) -#define SMB_BUF_CFG_STREAMING (SMB_BUF_INIT | SMB_BUF_CONTINUOUS | SMB_FLOW_MASK) -#define SMB_BASE_LOW_MASK GENMASK(31, 0) - -/* Set SMB_LB_CFG_HI register */ -#define SMB_MSG_FILTER(lower, upper) ((lower & 0xff) | ((upper & 0xff) << 8)) -#define SMB_BUF_INT_EN BIT(0) -#define SMB_BUF_NOTE_MASK GENMASK(11, 8) -#define SMB_BUF_INT_CFG (SMB_BUF_INT_EN | SMB_BUF_NOTE_MASK) - -/** - * struct smb_data_buffer - Details of the buffer used by SMB - * @buf_base : Memory mapped base address of SMB. - * @start_addr : SMB buffer start Physical address. - * @buf_size : Size of the buffer. - * @data_size : Size of Trace data copy to userspace. - * @rd_offset : Offset of the read pointer in the buffer. - */ -struct smb_data_buffer { - void __iomem *buf_base; - u32 start_addr; - unsigned long buf_size; - unsigned long data_size; - unsigned long rd_offset; -}; - -/** - * struct smb_drv_data - specifics associated to an SMB component - * @base: Memory mapped base address for SMB component. - * @csdev: Component vitals needed by the framework. - * @sdb: Data buffer for SMB. - * @miscdev: Specifics to handle "/dev/xyz.smb" entry. - * @spinlock: Only one at a time pls. - * @reading: Synchronise user space access to SMB buffer. - * @pid: Process ID of the process being monitored by the session - * that is using this component. - * @mode: how this SMB is being used, perf mode or sysfs mode. - */ -struct smb_drv_data { - void __iomem *base; - struct coresight_device *csdev; - struct smb_data_buffer sdb; - struct miscdevice miscdev; - spinlock_t spinlock; - local_t reading; - pid_t pid; - u32 mode; -}; - -#define smb_reg(name, offset) coresight_simple_reg32(struct smb_drv_data, name, offset) - -#endif -- Gitee From a537cf93002f0894bb08f424c579fc09e72b6942 Mon Sep 17 00:00:00 2001 From: James Clark Date: Tue, 30 Aug 2022 18:26:09 +0100 Subject: [PATCH 2/8] coresight: Remove unused function parameter mainline inclusion from mainline-v6.1-rc1 commit 3727f03e2bc63de56fd00acb8846393106318156 category: cleanup bugzilla: https://gitee.com/openeuler/kernel/issues/I6XLGY CVE: NA Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=3727f03e2bc63de56fd00acb8846393106318156 ---------------------------------------------------------------------- The ability to use a custom function in this sysfs show function isn't used so remove it. No functional changes. Signed-off-by: James Clark Reviewed-by: Mike Leach Link: https://lore.kernel.org/r/20220830172614.340962-2-james.clark@arm.com Signed-off-by: Mathieu Poirier Signed-off-by: huangfangrun --- drivers/hwtracing/coresight/coresight-priv.h | 16 ++++------------ 1 file changed, 4 insertions(+), 12 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h index ff1dd2092ac5..f2458b794ef3 100644 --- a/drivers/hwtracing/coresight/coresight-priv.h +++ b/drivers/hwtracing/coresight/coresight-priv.h @@ -40,31 +40,23 @@ #define ETM_MODE_EXCL_KERN BIT(30) #define ETM_MODE_EXCL_USER BIT(31) -typedef u32 (*coresight_read_fn)(const struct device *, u32 offset); -#define __coresight_simple_func(type, func, name, lo_off, hi_off) \ +#define __coresight_simple_show(type, name, lo_off, hi_off) \ static ssize_t name##_show(struct device *_dev, \ struct device_attribute *attr, char *buf) \ { \ type *drvdata = dev_get_drvdata(_dev->parent); \ - coresight_read_fn fn = func; \ u64 val; \ pm_runtime_get_sync(_dev->parent); \ - if (fn) \ - val = (u64)fn(_dev->parent, lo_off); \ - else \ - val = coresight_read_reg_pair(drvdata->base, \ - lo_off, hi_off); \ + val = coresight_read_reg_pair(drvdata->base, lo_off, hi_off); \ pm_runtime_put_sync(_dev->parent); \ return scnprintf(buf, PAGE_SIZE, "0x%llx\n", val); \ } \ static DEVICE_ATTR_RO(name) -#define coresight_simple_func(type, func, name, offset) \ - __coresight_simple_func(type, func, name, offset, -1) #define coresight_simple_reg32(type, name, offset) \ - __coresight_simple_func(type, NULL, name, offset, -1) + __coresight_simple_show(type, name, offset, -1) #define coresight_simple_reg64(type, name, lo_off, hi_off) \ - __coresight_simple_func(type, NULL, name, lo_off, hi_off) + __coresight_simple_show(type, name, lo_off, hi_off) extern const u32 coresight_barrier_pkt[4]; #define CORESIGHT_BARRIER_PKT_SIZE (sizeof(coresight_barrier_pkt)) -- Gitee From a0fc07a2daa816caf4b3246aaf1d103c577ef5a0 Mon Sep 17 00:00:00 2001 From: James Clark Date: Tue, 30 Aug 2022 18:26:10 +0100 Subject: [PATCH 3/8] coresight: Simplify sysfs accessors by using csdev_access abstraction mainline inclusion from mainline-v6.1-rc1 commit b6df1cbb415e543f2908f9c59a8fb20714b86879 category: cleanup bugzilla: https://gitee.com/openeuler/kernel/issues/I6XLGY CVE: NA Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=b6df1cbb415e543f2908f9c59a8fb20714b86879 ---------------------------------------------------------------------- The coresight_device struct is available in the sysfs accessor, and this contains a csdev_access struct which can be used to access registers. Use this instead of passing in the type of each drvdata so that a common function can be shared between all the cs drivers. No functional changes. Signed-off-by: James Clark Reviewed-by: Mike Leach Link: https://lore.kernel.org/r/20220830172614.340962-3-james.clark@arm.com Signed-off-by: Mathieu Poirier Signed-off-by: huangfangrun --- drivers/hwtracing/coresight/coresight-catu.c | 18 +++++----- drivers/hwtracing/coresight/coresight-etb10.c | 19 +++++------ .../coresight/coresight-etm3x-sysfs.c | 23 ++++++------- drivers/hwtracing/coresight/coresight-priv.h | 14 ++++---- .../coresight/coresight-replicator.c | 7 ++-- drivers/hwtracing/coresight/coresight-stm.c | 27 +++++++-------- .../hwtracing/coresight/coresight-tmc-core.c | 33 ++++++++----------- include/linux/coresight.h | 18 ++++++++++ 8 files changed, 79 insertions(+), 80 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-catu.c b/drivers/hwtracing/coresight/coresight-catu.c index e0740c6dbd54..9d89c4054046 100644 --- a/drivers/hwtracing/coresight/coresight-catu.c +++ b/drivers/hwtracing/coresight/coresight-catu.c @@ -365,16 +365,14 @@ static const struct etr_buf_operations etr_catu_buf_ops = { .get_data = catu_get_data_etr_buf, }; -coresight_simple_reg32(struct catu_drvdata, devid, CORESIGHT_DEVID); -coresight_simple_reg32(struct catu_drvdata, control, CATU_CONTROL); -coresight_simple_reg32(struct catu_drvdata, status, CATU_STATUS); -coresight_simple_reg32(struct catu_drvdata, mode, CATU_MODE); -coresight_simple_reg32(struct catu_drvdata, axictrl, CATU_AXICTRL); -coresight_simple_reg32(struct catu_drvdata, irqen, CATU_IRQEN); -coresight_simple_reg64(struct catu_drvdata, sladdr, - CATU_SLADDRLO, CATU_SLADDRHI); -coresight_simple_reg64(struct catu_drvdata, inaddr, - CATU_INADDRLO, CATU_INADDRHI); +coresight_simple_reg32(devid, CORESIGHT_DEVID); +coresight_simple_reg32(control, CATU_CONTROL); +coresight_simple_reg32(status, CATU_STATUS); +coresight_simple_reg32(mode, CATU_MODE); +coresight_simple_reg32(axictrl, CATU_AXICTRL); +coresight_simple_reg32(irqen, CATU_IRQEN); +coresight_simple_reg64(sladdr, CATU_SLADDRLO, CATU_SLADDRHI); +coresight_simple_reg64(inaddr, CATU_INADDRLO, CATU_INADDRHI); static struct attribute *catu_mgmt_attrs[] = { &dev_attr_devid.attr, diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtracing/coresight/coresight-etb10.c index f775cbee12b8..614f54677faf 100644 --- a/drivers/hwtracing/coresight/coresight-etb10.c +++ b/drivers/hwtracing/coresight/coresight-etb10.c @@ -656,17 +656,14 @@ static const struct file_operations etb_fops = { .llseek = no_llseek, }; -#define coresight_etb10_reg(name, offset) \ - coresight_simple_reg32(struct etb_drvdata, name, offset) - -coresight_etb10_reg(rdp, ETB_RAM_DEPTH_REG); -coresight_etb10_reg(sts, ETB_STATUS_REG); -coresight_etb10_reg(rrp, ETB_RAM_READ_POINTER); -coresight_etb10_reg(rwp, ETB_RAM_WRITE_POINTER); -coresight_etb10_reg(trg, ETB_TRG); -coresight_etb10_reg(ctl, ETB_CTL_REG); -coresight_etb10_reg(ffsr, ETB_FFSR); -coresight_etb10_reg(ffcr, ETB_FFCR); +coresight_simple_reg32(rdp, ETB_RAM_DEPTH_REG); +coresight_simple_reg32(sts, ETB_STATUS_REG); +coresight_simple_reg32(rrp, ETB_RAM_READ_POINTER); +coresight_simple_reg32(rwp, ETB_RAM_WRITE_POINTER); +coresight_simple_reg32(trg, ETB_TRG); +coresight_simple_reg32(ctl, ETB_CTL_REG); +coresight_simple_reg32(ffsr, ETB_FFSR); +coresight_simple_reg32(ffcr, ETB_FFCR); static struct attribute *coresight_etb_mgmt_attrs[] = { &dev_attr_rdp.attr, diff --git a/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c index e8c7649f123e..7ff989c0ffe9 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c @@ -1252,19 +1252,16 @@ static struct attribute *coresight_etm_attrs[] = { NULL, }; -#define coresight_etm3x_reg(name, offset) \ - coresight_simple_reg32(struct etm_drvdata, name, offset) - -coresight_etm3x_reg(etmccr, ETMCCR); -coresight_etm3x_reg(etmccer, ETMCCER); -coresight_etm3x_reg(etmscr, ETMSCR); -coresight_etm3x_reg(etmidr, ETMIDR); -coresight_etm3x_reg(etmcr, ETMCR); -coresight_etm3x_reg(etmtraceidr, ETMTRACEIDR); -coresight_etm3x_reg(etmteevr, ETMTEEVR); -coresight_etm3x_reg(etmtssvr, ETMTSSCR); -coresight_etm3x_reg(etmtecr1, ETMTECR1); -coresight_etm3x_reg(etmtecr2, ETMTECR2); +coresight_simple_reg32(etmccr, ETMCCR); +coresight_simple_reg32(etmccer, ETMCCER); +coresight_simple_reg32(etmscr, ETMSCR); +coresight_simple_reg32(etmidr, ETMIDR); +coresight_simple_reg32(etmcr, ETMCR); +coresight_simple_reg32(etmtraceidr, ETMTRACEIDR); +coresight_simple_reg32(etmteevr, ETMTEEVR); +coresight_simple_reg32(etmtssvr, ETMTSSCR); +coresight_simple_reg32(etmtecr1, ETMTECR1); +coresight_simple_reg32(etmtecr2, ETMTECR2); static struct attribute *coresight_etm_mgmt_attrs[] = { &dev_attr_etmccr.attr, diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h index f2458b794ef3..cf8ae768106e 100644 --- a/drivers/hwtracing/coresight/coresight-priv.h +++ b/drivers/hwtracing/coresight/coresight-priv.h @@ -40,23 +40,23 @@ #define ETM_MODE_EXCL_KERN BIT(30) #define ETM_MODE_EXCL_USER BIT(31) -#define __coresight_simple_show(type, name, lo_off, hi_off) \ +#define __coresight_simple_show(name, lo_off, hi_off) \ static ssize_t name##_show(struct device *_dev, \ struct device_attribute *attr, char *buf) \ { \ - type *drvdata = dev_get_drvdata(_dev->parent); \ + struct coresight_device *csdev = container_of(_dev, struct coresight_device, dev); \ u64 val; \ pm_runtime_get_sync(_dev->parent); \ - val = coresight_read_reg_pair(drvdata->base, lo_off, hi_off); \ + val = csdev_access_relaxed_read_pair(&csdev->access, lo_off, hi_off); \ pm_runtime_put_sync(_dev->parent); \ return scnprintf(buf, PAGE_SIZE, "0x%llx\n", val); \ } \ static DEVICE_ATTR_RO(name) -#define coresight_simple_reg32(type, name, offset) \ - __coresight_simple_show(type, name, offset, -1) -#define coresight_simple_reg64(type, name, lo_off, hi_off) \ - __coresight_simple_show(type, name, lo_off, hi_off) +#define coresight_simple_reg32(name, offset) \ + __coresight_simple_show(name, offset, -1) +#define coresight_simple_reg64(name, lo_off, hi_off) \ + __coresight_simple_show(name, lo_off, hi_off) extern const u32 coresight_barrier_pkt[4]; #define CORESIGHT_BARRIER_PKT_SIZE (sizeof(coresight_barrier_pkt)) diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/hwtracing/coresight/coresight-replicator.c index dfff2801d761..d7e4b3be3085 100644 --- a/drivers/hwtracing/coresight/coresight-replicator.c +++ b/drivers/hwtracing/coresight/coresight-replicator.c @@ -196,11 +196,8 @@ static const struct coresight_ops replicator_cs_ops = { .link_ops = &replicator_link_ops, }; -#define coresight_replicator_reg(name, offset) \ - coresight_simple_reg32(struct replicator_drvdata, name, offset) - -coresight_replicator_reg(idfilter0, REPLICATOR_IDFILTER0); -coresight_replicator_reg(idfilter1, REPLICATOR_IDFILTER1); +coresight_simple_reg32(idfilter0, REPLICATOR_IDFILTER0); +coresight_simple_reg32(idfilter1, REPLICATOR_IDFILTER1); static struct attribute *replicator_mgmt_attrs[] = { &dev_attr_idfilter0.attr, diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracing/coresight/coresight-stm.c index ed9a47ce769c..e5b4ae4cb6be 100644 --- a/drivers/hwtracing/coresight/coresight-stm.c +++ b/drivers/hwtracing/coresight/coresight-stm.c @@ -634,21 +634,18 @@ static ssize_t traceid_store(struct device *dev, } static DEVICE_ATTR_RW(traceid); -#define coresight_stm_reg(name, offset) \ - coresight_simple_reg32(struct stm_drvdata, name, offset) - -coresight_stm_reg(tcsr, STMTCSR); -coresight_stm_reg(tsfreqr, STMTSFREQR); -coresight_stm_reg(syncr, STMSYNCR); -coresight_stm_reg(sper, STMSPER); -coresight_stm_reg(spter, STMSPTER); -coresight_stm_reg(privmaskr, STMPRIVMASKR); -coresight_stm_reg(spscr, STMSPSCR); -coresight_stm_reg(spmscr, STMSPMSCR); -coresight_stm_reg(spfeat1r, STMSPFEAT1R); -coresight_stm_reg(spfeat2r, STMSPFEAT2R); -coresight_stm_reg(spfeat3r, STMSPFEAT3R); -coresight_stm_reg(devid, CORESIGHT_DEVID); +coresight_simple_reg32(tcsr, STMTCSR); +coresight_simple_reg32(tsfreqr, STMTSFREQR); +coresight_simple_reg32(syncr, STMSYNCR); +coresight_simple_reg32(sper, STMSPER); +coresight_simple_reg32(spter, STMSPTER); +coresight_simple_reg32(privmaskr, STMPRIVMASKR); +coresight_simple_reg32(spscr, STMSPSCR); +coresight_simple_reg32(spmscr, STMSPMSCR); +coresight_simple_reg32(spfeat1r, STMSPFEAT1R); +coresight_simple_reg32(spfeat2r, STMSPFEAT2R); +coresight_simple_reg32(spfeat3r, STMSPFEAT3R); +coresight_simple_reg32(devid, CORESIGHT_DEVID); static struct attribute *coresight_stm_attrs[] = { &dev_attr_hwevent_enable.attr, diff --git a/drivers/hwtracing/coresight/coresight-tmc-core.c b/drivers/hwtracing/coresight/coresight-tmc-core.c index 74c6323d4d6a..48cbf8724a94 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-core.c +++ b/drivers/hwtracing/coresight/coresight-tmc-core.c @@ -251,25 +251,20 @@ static enum tmc_mem_intf_width tmc_get_memwidth(u32 devid) return memwidth; } -#define coresight_tmc_reg(name, offset) \ - coresight_simple_reg32(struct tmc_drvdata, name, offset) -#define coresight_tmc_reg64(name, lo_off, hi_off) \ - coresight_simple_reg64(struct tmc_drvdata, name, lo_off, hi_off) - -coresight_tmc_reg(rsz, TMC_RSZ); -coresight_tmc_reg(sts, TMC_STS); -coresight_tmc_reg(trg, TMC_TRG); -coresight_tmc_reg(ctl, TMC_CTL); -coresight_tmc_reg(ffsr, TMC_FFSR); -coresight_tmc_reg(ffcr, TMC_FFCR); -coresight_tmc_reg(mode, TMC_MODE); -coresight_tmc_reg(pscr, TMC_PSCR); -coresight_tmc_reg(axictl, TMC_AXICTL); -coresight_tmc_reg(authstatus, TMC_AUTHSTATUS); -coresight_tmc_reg(devid, CORESIGHT_DEVID); -coresight_tmc_reg64(rrp, TMC_RRP, TMC_RRPHI); -coresight_tmc_reg64(rwp, TMC_RWP, TMC_RWPHI); -coresight_tmc_reg64(dba, TMC_DBALO, TMC_DBAHI); +coresight_simple_reg32(rsz, TMC_RSZ); +coresight_simple_reg32(sts, TMC_STS); +coresight_simple_reg32(trg, TMC_TRG); +coresight_simple_reg32(ctl, TMC_CTL); +coresight_simple_reg32(ffsr, TMC_FFSR); +coresight_simple_reg32(ffcr, TMC_FFCR); +coresight_simple_reg32(mode, TMC_MODE); +coresight_simple_reg32(pscr, TMC_PSCR); +coresight_simple_reg32(axictl, TMC_AXICTL); +coresight_simple_reg32(authstatus, TMC_AUTHSTATUS); +coresight_simple_reg32(devid, CORESIGHT_DEVID); +coresight_simple_reg64(rrp, TMC_RRP, TMC_RRPHI); +coresight_simple_reg64(rwp, TMC_RWP, TMC_RWPHI); +coresight_simple_reg64(dba, TMC_DBALO, TMC_DBAHI); static struct attribute *coresight_tmc_mgmt_attrs[] = { &dev_attr_rsz.attr, diff --git a/include/linux/coresight.h b/include/linux/coresight.h index fdd2cdaaf898..2ce21cb16e72 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -370,6 +370,24 @@ static inline u32 csdev_access_relaxed_read32(struct csdev_access *csa, return csa->read(offset, true, false); } +static inline u64 csdev_access_relaxed_read_pair(struct csdev_access *csa, + s32 lo_offset, s32 hi_offset) +{ + u64 val; + + if (likely(csa->io_mem)) { + val = readl_relaxed(csa->base + lo_offset); + val |= (hi_offset < 0) ? 0 : + (u64)readl_relaxed(csa->base + hi_offset) << 32; + return val; + } + + val = csa->read(lo_offset, true, false); + val |= (hi_offset < 0) ? 0 : + (u64)csa->read(hi_offset, true, false) << 32; + return val; +} + static inline u32 csdev_access_read32(struct csdev_access *csa, u32 offset) { if (likely(csa->io_mem)) -- Gitee From 38a74776697df5305af46d0af10005dd482d44c9 Mon Sep 17 00:00:00 2001 From: James Clark Date: Tue, 30 Aug 2022 18:26:11 +0100 Subject: [PATCH 4/8] coresight: Re-use same function for similar sysfs register accessors mainline inclusion from mainline-v6.1-rc1 commit 08e9fa5f3663eaab20ea3430023d1dfbf60d29f5 category: cleanup bugzilla: https://gitee.com/openeuler/kernel/issues/I6XLGY CVE: NA Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=08e9fa5f3663eaab20ea3430023d1dfbf60d29f5 ---------------------------------------------------------------------- Currently each accessor macro creates an identical function which wastes space in the text area and pollutes the ftrace function names. Change it so that the same function is used, but the register to access is passed in as parameter rather than baked into each function. Signed-off-by: James Clark Reviewed-by: Mike Leach Link: https://lore.kernel.org/r/20220830172614.340962-4-james.clark@arm.com Signed-off-by: Mathieu Poirier Signed-off-by: huangfangrun --- drivers/hwtracing/coresight/coresight-catu.c | 25 ++++------- drivers/hwtracing/coresight/coresight-core.c | 14 ++++++ drivers/hwtracing/coresight/coresight-etb10.c | 25 ++++------- .../coresight/coresight-etm3x-sysfs.c | 31 +++++-------- drivers/hwtracing/coresight/coresight-priv.h | 40 +++++++++-------- .../coresight/coresight-replicator.c | 7 +-- drivers/hwtracing/coresight/coresight-stm.c | 37 ++++++---------- .../hwtracing/coresight/coresight-tmc-core.c | 43 ++++++------------- 8 files changed, 91 insertions(+), 131 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-catu.c b/drivers/hwtracing/coresight/coresight-catu.c index 9d89c4054046..bc90a03f478f 100644 --- a/drivers/hwtracing/coresight/coresight-catu.c +++ b/drivers/hwtracing/coresight/coresight-catu.c @@ -365,24 +365,15 @@ static const struct etr_buf_operations etr_catu_buf_ops = { .get_data = catu_get_data_etr_buf, }; -coresight_simple_reg32(devid, CORESIGHT_DEVID); -coresight_simple_reg32(control, CATU_CONTROL); -coresight_simple_reg32(status, CATU_STATUS); -coresight_simple_reg32(mode, CATU_MODE); -coresight_simple_reg32(axictrl, CATU_AXICTRL); -coresight_simple_reg32(irqen, CATU_IRQEN); -coresight_simple_reg64(sladdr, CATU_SLADDRLO, CATU_SLADDRHI); -coresight_simple_reg64(inaddr, CATU_INADDRLO, CATU_INADDRHI); - static struct attribute *catu_mgmt_attrs[] = { - &dev_attr_devid.attr, - &dev_attr_control.attr, - &dev_attr_status.attr, - &dev_attr_mode.attr, - &dev_attr_axictrl.attr, - &dev_attr_irqen.attr, - &dev_attr_sladdr.attr, - &dev_attr_inaddr.attr, + coresight_simple_reg32(devid, CORESIGHT_DEVID), + coresight_simple_reg32(control, CATU_CONTROL), + coresight_simple_reg32(status, CATU_STATUS), + coresight_simple_reg32(mode, CATU_MODE), + coresight_simple_reg32(axictrl, CATU_AXICTRL), + coresight_simple_reg32(irqen, CATU_IRQEN), + coresight_simple_reg64(sladdr, CATU_SLADDRLO, CATU_SLADDRHI), + coresight_simple_reg64(inaddr, CATU_INADDRLO, CATU_INADDRHI), NULL, }; diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c index f6b33c681b42..8053479dadf2 100644 --- a/drivers/hwtracing/coresight/coresight-core.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -59,6 +59,20 @@ EXPORT_SYMBOL_GPL(coresight_barrier_pkt); static const struct cti_assoc_op *cti_assoc_ops; +ssize_t coresight_simple_show(struct device *_dev, + struct device_attribute *attr, char *buf) +{ + struct coresight_device *csdev = container_of(_dev, struct coresight_device, dev); + struct cs_pair_attribute *cs_attr = container_of(attr, struct cs_pair_attribute, attr); + u64 val; + + pm_runtime_get_sync(_dev->parent); + val = csdev_access_relaxed_read_pair(&csdev->access, cs_attr->lo_off, cs_attr->hi_off); + pm_runtime_put_sync(_dev->parent); + return sysfs_emit(buf, "0x%llx\n", val); +} +EXPORT_SYMBOL_GPL(coresight_simple_show); + void coresight_set_cti_ops(const struct cti_assoc_op *cti_op) { cti_assoc_ops = cti_op; diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtracing/coresight/coresight-etb10.c index 614f54677faf..b6bfbca017eb 100644 --- a/drivers/hwtracing/coresight/coresight-etb10.c +++ b/drivers/hwtracing/coresight/coresight-etb10.c @@ -656,24 +656,15 @@ static const struct file_operations etb_fops = { .llseek = no_llseek, }; -coresight_simple_reg32(rdp, ETB_RAM_DEPTH_REG); -coresight_simple_reg32(sts, ETB_STATUS_REG); -coresight_simple_reg32(rrp, ETB_RAM_READ_POINTER); -coresight_simple_reg32(rwp, ETB_RAM_WRITE_POINTER); -coresight_simple_reg32(trg, ETB_TRG); -coresight_simple_reg32(ctl, ETB_CTL_REG); -coresight_simple_reg32(ffsr, ETB_FFSR); -coresight_simple_reg32(ffcr, ETB_FFCR); - static struct attribute *coresight_etb_mgmt_attrs[] = { - &dev_attr_rdp.attr, - &dev_attr_sts.attr, - &dev_attr_rrp.attr, - &dev_attr_rwp.attr, - &dev_attr_trg.attr, - &dev_attr_ctl.attr, - &dev_attr_ffsr.attr, - &dev_attr_ffcr.attr, + coresight_simple_reg32(rdp, ETB_RAM_DEPTH_REG), + coresight_simple_reg32(sts, ETB_STATUS_REG), + coresight_simple_reg32(rrp, ETB_RAM_READ_POINTER), + coresight_simple_reg32(rwp, ETB_RAM_WRITE_POINTER), + coresight_simple_reg32(trg, ETB_TRG), + coresight_simple_reg32(ctl, ETB_CTL_REG), + coresight_simple_reg32(ffsr, ETB_FFSR), + coresight_simple_reg32(ffcr, ETB_FFCR), NULL, }; diff --git a/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c index 7ff989c0ffe9..8125dafe3928 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c @@ -1252,28 +1252,17 @@ static struct attribute *coresight_etm_attrs[] = { NULL, }; -coresight_simple_reg32(etmccr, ETMCCR); -coresight_simple_reg32(etmccer, ETMCCER); -coresight_simple_reg32(etmscr, ETMSCR); -coresight_simple_reg32(etmidr, ETMIDR); -coresight_simple_reg32(etmcr, ETMCR); -coresight_simple_reg32(etmtraceidr, ETMTRACEIDR); -coresight_simple_reg32(etmteevr, ETMTEEVR); -coresight_simple_reg32(etmtssvr, ETMTSSCR); -coresight_simple_reg32(etmtecr1, ETMTECR1); -coresight_simple_reg32(etmtecr2, ETMTECR2); - static struct attribute *coresight_etm_mgmt_attrs[] = { - &dev_attr_etmccr.attr, - &dev_attr_etmccer.attr, - &dev_attr_etmscr.attr, - &dev_attr_etmidr.attr, - &dev_attr_etmcr.attr, - &dev_attr_etmtraceidr.attr, - &dev_attr_etmteevr.attr, - &dev_attr_etmtssvr.attr, - &dev_attr_etmtecr1.attr, - &dev_attr_etmtecr2.attr, + coresight_simple_reg32(etmccr, ETMCCR), + coresight_simple_reg32(etmccer, ETMCCER), + coresight_simple_reg32(etmscr, ETMSCR), + coresight_simple_reg32(etmidr, ETMIDR), + coresight_simple_reg32(etmcr, ETMCR), + coresight_simple_reg32(etmtraceidr, ETMTRACEIDR), + coresight_simple_reg32(etmteevr, ETMTEEVR), + coresight_simple_reg32(etmtssvr, ETMTSSCR), + coresight_simple_reg32(etmtecr1, ETMTECR1), + coresight_simple_reg32(etmtecr2, ETMTECR2), NULL, }; diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h index cf8ae768106e..07b392bfdbcd 100644 --- a/drivers/hwtracing/coresight/coresight-priv.h +++ b/drivers/hwtracing/coresight/coresight-priv.h @@ -39,24 +39,30 @@ #define ETM_MODE_EXCL_KERN BIT(30) #define ETM_MODE_EXCL_USER BIT(31) +struct cs_pair_attribute { + struct device_attribute attr; + s32 lo_off; + s32 hi_off; +}; -#define __coresight_simple_show(name, lo_off, hi_off) \ -static ssize_t name##_show(struct device *_dev, \ - struct device_attribute *attr, char *buf) \ -{ \ - struct coresight_device *csdev = container_of(_dev, struct coresight_device, dev); \ - u64 val; \ - pm_runtime_get_sync(_dev->parent); \ - val = csdev_access_relaxed_read_pair(&csdev->access, lo_off, hi_off); \ - pm_runtime_put_sync(_dev->parent); \ - return scnprintf(buf, PAGE_SIZE, "0x%llx\n", val); \ -} \ -static DEVICE_ATTR_RO(name) - -#define coresight_simple_reg32(name, offset) \ - __coresight_simple_show(name, offset, -1) -#define coresight_simple_reg64(name, lo_off, hi_off) \ - __coresight_simple_show(name, lo_off, hi_off) +extern ssize_t coresight_simple_show(struct device *_dev, + struct device_attribute *attr, char *buf); + +#define coresight_simple_reg32(name, offset) \ + (&((struct cs_pair_attribute[]) { \ + { \ + __ATTR(name, 0444, coresight_simple_show, NULL), \ + offset, -1 \ + } \ + })[0].attr.attr) + +#define coresight_simple_reg64(name, lo_off, hi_off) \ + (&((struct cs_pair_attribute[]) { \ + { \ + __ATTR(name, 0444, coresight_simple_show, NULL), \ + lo_off, hi_off \ + } \ + })[0].attr.attr) extern const u32 coresight_barrier_pkt[4]; #define CORESIGHT_BARRIER_PKT_SIZE (sizeof(coresight_barrier_pkt)) diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/hwtracing/coresight/coresight-replicator.c index d7e4b3be3085..0f47fea4688f 100644 --- a/drivers/hwtracing/coresight/coresight-replicator.c +++ b/drivers/hwtracing/coresight/coresight-replicator.c @@ -196,12 +196,9 @@ static const struct coresight_ops replicator_cs_ops = { .link_ops = &replicator_link_ops, }; -coresight_simple_reg32(idfilter0, REPLICATOR_IDFILTER0); -coresight_simple_reg32(idfilter1, REPLICATOR_IDFILTER1); - static struct attribute *replicator_mgmt_attrs[] = { - &dev_attr_idfilter0.attr, - &dev_attr_idfilter1.attr, + coresight_simple_reg32(idfilter0, REPLICATOR_IDFILTER0), + coresight_simple_reg32(idfilter1, REPLICATOR_IDFILTER1), NULL, }; diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracing/coresight/coresight-stm.c index e5b4ae4cb6be..be473655ac86 100644 --- a/drivers/hwtracing/coresight/coresight-stm.c +++ b/drivers/hwtracing/coresight/coresight-stm.c @@ -634,19 +634,6 @@ static ssize_t traceid_store(struct device *dev, } static DEVICE_ATTR_RW(traceid); -coresight_simple_reg32(tcsr, STMTCSR); -coresight_simple_reg32(tsfreqr, STMTSFREQR); -coresight_simple_reg32(syncr, STMSYNCR); -coresight_simple_reg32(sper, STMSPER); -coresight_simple_reg32(spter, STMSPTER); -coresight_simple_reg32(privmaskr, STMPRIVMASKR); -coresight_simple_reg32(spscr, STMSPSCR); -coresight_simple_reg32(spmscr, STMSPMSCR); -coresight_simple_reg32(spfeat1r, STMSPFEAT1R); -coresight_simple_reg32(spfeat2r, STMSPFEAT2R); -coresight_simple_reg32(spfeat3r, STMSPFEAT3R); -coresight_simple_reg32(devid, CORESIGHT_DEVID); - static struct attribute *coresight_stm_attrs[] = { &dev_attr_hwevent_enable.attr, &dev_attr_hwevent_select.attr, @@ -657,18 +644,18 @@ static struct attribute *coresight_stm_attrs[] = { }; static struct attribute *coresight_stm_mgmt_attrs[] = { - &dev_attr_tcsr.attr, - &dev_attr_tsfreqr.attr, - &dev_attr_syncr.attr, - &dev_attr_sper.attr, - &dev_attr_spter.attr, - &dev_attr_privmaskr.attr, - &dev_attr_spscr.attr, - &dev_attr_spmscr.attr, - &dev_attr_spfeat1r.attr, - &dev_attr_spfeat2r.attr, - &dev_attr_spfeat3r.attr, - &dev_attr_devid.attr, + coresight_simple_reg32(tcsr, STMTCSR), + coresight_simple_reg32(tsfreqr, STMTSFREQR), + coresight_simple_reg32(syncr, STMSYNCR), + coresight_simple_reg32(sper, STMSPER), + coresight_simple_reg32(spter, STMSPTER), + coresight_simple_reg32(privmaskr, STMPRIVMASKR), + coresight_simple_reg32(spscr, STMSPSCR), + coresight_simple_reg32(spmscr, STMSPMSCR), + coresight_simple_reg32(spfeat1r, STMSPFEAT1R), + coresight_simple_reg32(spfeat2r, STMSPFEAT2R), + coresight_simple_reg32(spfeat3r, STMSPFEAT3R), + coresight_simple_reg32(devid, CORESIGHT_DEVID), NULL, }; diff --git a/drivers/hwtracing/coresight/coresight-tmc-core.c b/drivers/hwtracing/coresight/coresight-tmc-core.c index 48cbf8724a94..6cd92cd394af 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-core.c +++ b/drivers/hwtracing/coresight/coresight-tmc-core.c @@ -251,36 +251,21 @@ static enum tmc_mem_intf_width tmc_get_memwidth(u32 devid) return memwidth; } -coresight_simple_reg32(rsz, TMC_RSZ); -coresight_simple_reg32(sts, TMC_STS); -coresight_simple_reg32(trg, TMC_TRG); -coresight_simple_reg32(ctl, TMC_CTL); -coresight_simple_reg32(ffsr, TMC_FFSR); -coresight_simple_reg32(ffcr, TMC_FFCR); -coresight_simple_reg32(mode, TMC_MODE); -coresight_simple_reg32(pscr, TMC_PSCR); -coresight_simple_reg32(axictl, TMC_AXICTL); -coresight_simple_reg32(authstatus, TMC_AUTHSTATUS); -coresight_simple_reg32(devid, CORESIGHT_DEVID); -coresight_simple_reg64(rrp, TMC_RRP, TMC_RRPHI); -coresight_simple_reg64(rwp, TMC_RWP, TMC_RWPHI); -coresight_simple_reg64(dba, TMC_DBALO, TMC_DBAHI); - static struct attribute *coresight_tmc_mgmt_attrs[] = { - &dev_attr_rsz.attr, - &dev_attr_sts.attr, - &dev_attr_rrp.attr, - &dev_attr_rwp.attr, - &dev_attr_trg.attr, - &dev_attr_ctl.attr, - &dev_attr_ffsr.attr, - &dev_attr_ffcr.attr, - &dev_attr_mode.attr, - &dev_attr_pscr.attr, - &dev_attr_devid.attr, - &dev_attr_dba.attr, - &dev_attr_axictl.attr, - &dev_attr_authstatus.attr, + coresight_simple_reg32(rsz, TMC_RSZ), + coresight_simple_reg32(sts, TMC_STS), + coresight_simple_reg64(rrp, TMC_RRP, TMC_RRPHI), + coresight_simple_reg64(rwp, TMC_RWP, TMC_RWPHI), + coresight_simple_reg32(trg, TMC_TRG), + coresight_simple_reg32(ctl, TMC_CTL), + coresight_simple_reg32(ffsr, TMC_FFSR), + coresight_simple_reg32(ffcr, TMC_FFCR), + coresight_simple_reg32(mode, TMC_MODE), + coresight_simple_reg32(pscr, TMC_PSCR), + coresight_simple_reg32(devid, CORESIGHT_DEVID), + coresight_simple_reg64(dba, TMC_DBALO, TMC_DBAHI), + coresight_simple_reg32(axictl, TMC_AXICTL), + coresight_simple_reg32(authstatus, TMC_AUTHSTATUS), NULL, }; -- Gitee From 70df4d75bb394106e9b94a45b2dd0042016d7670 Mon Sep 17 00:00:00 2001 From: James Clark Date: Tue, 30 Aug 2022 18:26:12 +0100 Subject: [PATCH 5/8] coresight: cti-sysfs: Re-use same functions for similar sysfs register accessors mainline inclusion from mainline-v6.1-rc1 commit fbca79e55429fe0f73b2d2d190fd86bfda52c41b category: cleanup bugzilla: https://gitee.com/openeuler/kernel/issues/I6XLGY CVE: NA Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=fbca79e55429fe0f73b2d2d190fd86bfda52c41b ---------------------------------------------------------------------- Currently each accessor macro creates an identical function which wastes space in the text area and pollutes the ftrace function name list. Change it so that the same function is used, but the register to access is passed in as parameter rather than baked into each function. Note that only the single accessor is used here and not csdev_access_relaxed_read_pair() like in the previous commit, so so a single unsigned offset value is stored instead. Signed-off-by: James Clark Reviewed-by: Mike Leach Link: https://lore.kernel.org/r/20220830172614.340962-5-james.clark@arm.com Signed-off-by: Mathieu Poirier Signed-off-by: huangfangrun --- .../hwtracing/coresight/coresight-cti-sysfs.c | 213 +++++++----------- drivers/hwtracing/coresight/coresight-priv.h | 5 + 2 files changed, 91 insertions(+), 127 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-cti-sysfs.c b/drivers/hwtracing/coresight/coresight-cti-sysfs.c index 7ff7e7780bbf..478b8d38b744 100644 --- a/drivers/hwtracing/coresight/coresight-cti-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-cti-sysfs.c @@ -163,48 +163,82 @@ static struct attribute *coresight_cti_attrs[] = { /* register based attributes */ -/* macro to access RO registers with power check only (no enable check). */ -#define coresight_cti_reg(name, offset) \ -static ssize_t name##_show(struct device *dev, \ - struct device_attribute *attr, char *buf) \ -{ \ - struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); \ - u32 val = 0; \ - pm_runtime_get_sync(dev->parent); \ - spin_lock(&drvdata->spinlock); \ - if (drvdata->config.hw_powered) \ - val = readl_relaxed(drvdata->base + offset); \ - spin_unlock(&drvdata->spinlock); \ - pm_runtime_put_sync(dev->parent); \ - return sprintf(buf, "0x%x\n", val); \ -} \ -static DEVICE_ATTR_RO(name) +/* Read registers with power check only (no enable check). */ +static ssize_t coresight_cti_reg_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); + struct cs_off_attribute *cti_attr = container_of(attr, struct cs_off_attribute, attr); + u32 val = 0; -/* coresight management registers */ -coresight_cti_reg(devaff0, CTIDEVAFF0); -coresight_cti_reg(devaff1, CTIDEVAFF1); -coresight_cti_reg(authstatus, CORESIGHT_AUTHSTATUS); -coresight_cti_reg(devarch, CORESIGHT_DEVARCH); -coresight_cti_reg(devid, CORESIGHT_DEVID); -coresight_cti_reg(devtype, CORESIGHT_DEVTYPE); -coresight_cti_reg(pidr0, CORESIGHT_PERIPHIDR0); -coresight_cti_reg(pidr1, CORESIGHT_PERIPHIDR1); -coresight_cti_reg(pidr2, CORESIGHT_PERIPHIDR2); -coresight_cti_reg(pidr3, CORESIGHT_PERIPHIDR3); -coresight_cti_reg(pidr4, CORESIGHT_PERIPHIDR4); + pm_runtime_get_sync(dev->parent); + spin_lock(&drvdata->spinlock); + if (drvdata->config.hw_powered) + val = readl_relaxed(drvdata->base + cti_attr->off); + spin_unlock(&drvdata->spinlock); + pm_runtime_put_sync(dev->parent); + return sysfs_emit(buf, "0x%x\n", val); +} + +/* Write registers with power check only (no enable check). */ +static ssize_t coresight_cti_reg_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); + struct cs_off_attribute *cti_attr = container_of(attr, struct cs_off_attribute, attr); + unsigned long val = 0; + + if (kstrtoul(buf, 0, &val)) + return -EINVAL; + pm_runtime_get_sync(dev->parent); + spin_lock(&drvdata->spinlock); + if (drvdata->config.hw_powered) + cti_write_single_reg(drvdata, cti_attr->off, val); + spin_unlock(&drvdata->spinlock); + pm_runtime_put_sync(dev->parent); + return size; +} + +#define coresight_cti_reg(name, offset) \ + (&((struct cs_off_attribute[]) { \ + { \ + __ATTR(name, 0444, coresight_cti_reg_show, NULL), \ + offset \ + } \ + })[0].attr.attr) + +#define coresight_cti_reg_rw(name, offset) \ + (&((struct cs_off_attribute[]) { \ + { \ + __ATTR(name, 0644, coresight_cti_reg_show, \ + coresight_cti_reg_store), \ + offset \ + } \ + })[0].attr.attr) + +#define coresight_cti_reg_wo(name, offset) \ + (&((struct cs_off_attribute[]) { \ + { \ + __ATTR(name, 0200, NULL, coresight_cti_reg_store), \ + offset \ + } \ + })[0].attr.attr) + +/* coresight management registers */ static struct attribute *coresight_cti_mgmt_attrs[] = { - &dev_attr_devaff0.attr, - &dev_attr_devaff1.attr, - &dev_attr_authstatus.attr, - &dev_attr_devarch.attr, - &dev_attr_devid.attr, - &dev_attr_devtype.attr, - &dev_attr_pidr0.attr, - &dev_attr_pidr1.attr, - &dev_attr_pidr2.attr, - &dev_attr_pidr3.attr, - &dev_attr_pidr4.attr, + coresight_cti_reg(devaff0, CTIDEVAFF0), + coresight_cti_reg(devaff1, CTIDEVAFF1), + coresight_cti_reg(authstatus, CORESIGHT_AUTHSTATUS), + coresight_cti_reg(devarch, CORESIGHT_DEVARCH), + coresight_cti_reg(devid, CORESIGHT_DEVID), + coresight_cti_reg(devtype, CORESIGHT_DEVTYPE), + coresight_cti_reg(pidr0, CORESIGHT_PERIPHIDR0), + coresight_cti_reg(pidr1, CORESIGHT_PERIPHIDR1), + coresight_cti_reg(pidr2, CORESIGHT_PERIPHIDR2), + coresight_cti_reg(pidr3, CORESIGHT_PERIPHIDR3), + coresight_cti_reg(pidr4, CORESIGHT_PERIPHIDR4), NULL, }; @@ -454,86 +488,11 @@ static ssize_t apppulse_store(struct device *dev, } static DEVICE_ATTR_WO(apppulse); -coresight_cti_reg(triginstatus, CTITRIGINSTATUS); -coresight_cti_reg(trigoutstatus, CTITRIGOUTSTATUS); -coresight_cti_reg(chinstatus, CTICHINSTATUS); -coresight_cti_reg(choutstatus, CTICHOUTSTATUS); - /* * Define CONFIG_CORESIGHT_CTI_INTEGRATION_REGS to enable the access to the * integration control registers. Normally only used to investigate connection * data. */ -#ifdef CONFIG_CORESIGHT_CTI_INTEGRATION_REGS - -/* macro to access RW registers with power check only (no enable check). */ -#define coresight_cti_reg_rw(name, offset) \ -static ssize_t name##_show(struct device *dev, \ - struct device_attribute *attr, char *buf) \ -{ \ - struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); \ - u32 val = 0; \ - pm_runtime_get_sync(dev->parent); \ - spin_lock(&drvdata->spinlock); \ - if (drvdata->config.hw_powered) \ - val = readl_relaxed(drvdata->base + offset); \ - spin_unlock(&drvdata->spinlock); \ - pm_runtime_put_sync(dev->parent); \ - return sprintf(buf, "0x%x\n", val); \ -} \ - \ -static ssize_t name##_store(struct device *dev, \ - struct device_attribute *attr, \ - const char *buf, size_t size) \ -{ \ - struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); \ - unsigned long val = 0; \ - if (kstrtoul(buf, 0, &val)) \ - return -EINVAL; \ - \ - pm_runtime_get_sync(dev->parent); \ - spin_lock(&drvdata->spinlock); \ - if (drvdata->config.hw_powered) \ - cti_write_single_reg(drvdata, offset, val); \ - spin_unlock(&drvdata->spinlock); \ - pm_runtime_put_sync(dev->parent); \ - return size; \ -} \ -static DEVICE_ATTR_RW(name) - -/* macro to access WO registers with power check only (no enable check). */ -#define coresight_cti_reg_wo(name, offset) \ -static ssize_t name##_store(struct device *dev, \ - struct device_attribute *attr, \ - const char *buf, size_t size) \ -{ \ - struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); \ - unsigned long val = 0; \ - if (kstrtoul(buf, 0, &val)) \ - return -EINVAL; \ - \ - pm_runtime_get_sync(dev->parent); \ - spin_lock(&drvdata->spinlock); \ - if (drvdata->config.hw_powered) \ - cti_write_single_reg(drvdata, offset, val); \ - spin_unlock(&drvdata->spinlock); \ - pm_runtime_put_sync(dev->parent); \ - return size; \ -} \ -static DEVICE_ATTR_WO(name) - -coresight_cti_reg_rw(itchout, ITCHOUT); -coresight_cti_reg_rw(ittrigout, ITTRIGOUT); -coresight_cti_reg_rw(itctrl, CORESIGHT_ITCTRL); -coresight_cti_reg_wo(itchinack, ITCHINACK); -coresight_cti_reg_wo(ittriginack, ITTRIGINACK); -coresight_cti_reg(ittrigin, ITTRIGIN); -coresight_cti_reg(itchin, ITCHIN); -coresight_cti_reg(itchoutack, ITCHOUTACK); -coresight_cti_reg(ittrigoutack, ITTRIGOUTACK); - -#endif /* CORESIGHT_CTI_INTEGRATION_REGS */ - static struct attribute *coresight_cti_regs_attrs[] = { &dev_attr_inout_sel.attr, &dev_attr_inen.attr, @@ -544,20 +503,20 @@ static struct attribute *coresight_cti_regs_attrs[] = { &dev_attr_appset.attr, &dev_attr_appclear.attr, &dev_attr_apppulse.attr, - &dev_attr_triginstatus.attr, - &dev_attr_trigoutstatus.attr, - &dev_attr_chinstatus.attr, - &dev_attr_choutstatus.attr, + coresight_cti_reg(triginstatus, CTITRIGINSTATUS), + coresight_cti_reg(trigoutstatus, CTITRIGOUTSTATUS), + coresight_cti_reg(chinstatus, CTICHINSTATUS), + coresight_cti_reg(choutstatus, CTICHOUTSTATUS), #ifdef CONFIG_CORESIGHT_CTI_INTEGRATION_REGS - &dev_attr_itctrl.attr, - &dev_attr_ittrigin.attr, - &dev_attr_itchin.attr, - &dev_attr_ittrigout.attr, - &dev_attr_itchout.attr, - &dev_attr_itchoutack.attr, - &dev_attr_ittrigoutack.attr, - &dev_attr_ittriginack.attr, - &dev_attr_itchinack.attr, + coresight_cti_reg_rw(itctrl, CORESIGHT_ITCTRL), + coresight_cti_reg(ittrigin, ITTRIGIN), + coresight_cti_reg(itchin, ITCHIN), + coresight_cti_reg_rw(ittrigout, ITTRIGOUT), + coresight_cti_reg_rw(itchout, ITCHOUT), + coresight_cti_reg(itchoutack, ITCHOUTACK), + coresight_cti_reg(ittrigoutack, ITTRIGOUTACK), + coresight_cti_reg_wo(ittriginack, ITTRIGINACK), + coresight_cti_reg_wo(itchinack, ITCHINACK), #endif NULL, }; diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h index 07b392bfdbcd..c211979deca5 100644 --- a/drivers/hwtracing/coresight/coresight-priv.h +++ b/drivers/hwtracing/coresight/coresight-priv.h @@ -45,6 +45,11 @@ struct cs_pair_attribute { s32 hi_off; }; +struct cs_off_attribute { + struct device_attribute attr; + u32 off; +}; + extern ssize_t coresight_simple_show(struct device *_dev, struct device_attribute *attr, char *buf); -- Gitee From 4db8a9d4b6ee9a75b3b5bec876bbf483d7520855 Mon Sep 17 00:00:00 2001 From: James Clark Date: Tue, 30 Aug 2022 18:26:13 +0100 Subject: [PATCH 6/8] coresight: Make new csdev_access offsets unsigned mainline inclusion from mainline-v6.1-rc1 commit 0a98181f805058773961c5ab3172ecf1bf1ed0e1 category: cleanup bugzilla: https://gitee.com/openeuler/kernel/issues/I6XLGY CVE: NA Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=0a98181f805058773961c5ab3172ecf1bf1ed0e1 ---------------------------------------------------------------------- New csdev_access functions were added as part of the previous refactor. In order to make them more consistent with the existing ones, change any signed offset types to be unsigned. Now that they are unsigned, stop using hi_off = -1 to signify a single 32bit access. Instead just call the existing 32bit accessors. This is also applied to other parts of the codebase, and the coresight_{read,write}_reg_pair() functions can be deleted. Signed-off-by: James Clark Reviewed-by: Mike Leach Link: https://lore.kernel.org/r/20220830172614.340962-6-james.clark@arm.com Signed-off-by: Mathieu Poirier Signed-off-by: huangfangrun --- drivers/hwtracing/coresight/coresight-catu.h | 8 ++--- drivers/hwtracing/coresight/coresight-core.c | 18 ++++++++-- drivers/hwtracing/coresight/coresight-priv.h | 35 +++++--------------- drivers/hwtracing/coresight/coresight-tmc.h | 4 +-- include/linux/coresight.h | 27 +++++++++------ 5 files changed, 47 insertions(+), 45 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-catu.h b/drivers/hwtracing/coresight/coresight-catu.h index 6160c2d75a56..442e034bbfba 100644 --- a/drivers/hwtracing/coresight/coresight-catu.h +++ b/drivers/hwtracing/coresight/coresight-catu.h @@ -70,24 +70,24 @@ struct catu_drvdata { static inline u32 \ catu_read_##name(struct catu_drvdata *drvdata) \ { \ - return coresight_read_reg_pair(drvdata->base, offset, -1); \ + return csdev_access_relaxed_read32(&drvdata->csdev->access, offset); \ } \ static inline void \ catu_write_##name(struct catu_drvdata *drvdata, u32 val) \ { \ - coresight_write_reg_pair(drvdata->base, val, offset, -1); \ + csdev_access_relaxed_write32(&drvdata->csdev->access, val, offset); \ } #define CATU_REG_PAIR(name, lo_off, hi_off) \ static inline u64 \ catu_read_##name(struct catu_drvdata *drvdata) \ { \ - return coresight_read_reg_pair(drvdata->base, lo_off, hi_off); \ + return csdev_access_relaxed_read_pair(&drvdata->csdev->access, lo_off, hi_off); \ } \ static inline void \ catu_write_##name(struct catu_drvdata *drvdata, u64 val) \ { \ - coresight_write_reg_pair(drvdata->base, val, lo_off, hi_off); \ + csdev_access_relaxed_write_pair(&drvdata->csdev->access, val, lo_off, hi_off); \ } CATU_REG32(control, CATU_CONTROL); diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c index 8053479dadf2..ee7b5cfcf786 100644 --- a/drivers/hwtracing/coresight/coresight-core.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -59,7 +59,7 @@ EXPORT_SYMBOL_GPL(coresight_barrier_pkt); static const struct cti_assoc_op *cti_assoc_ops; -ssize_t coresight_simple_show(struct device *_dev, +ssize_t coresight_simple_show_pair(struct device *_dev, struct device_attribute *attr, char *buf) { struct coresight_device *csdev = container_of(_dev, struct coresight_device, dev); @@ -71,7 +71,21 @@ ssize_t coresight_simple_show(struct device *_dev, pm_runtime_put_sync(_dev->parent); return sysfs_emit(buf, "0x%llx\n", val); } -EXPORT_SYMBOL_GPL(coresight_simple_show); +EXPORT_SYMBOL_GPL(coresight_simple_show_pair); + +ssize_t coresight_simple_show32(struct device *_dev, + struct device_attribute *attr, char *buf) +{ + struct coresight_device *csdev = container_of(_dev, struct coresight_device, dev); + struct cs_off_attribute *cs_attr = container_of(attr, struct cs_off_attribute, attr); + u64 val; + + pm_runtime_get_sync(_dev->parent); + val = csdev_access_relaxed_read32(&csdev->access, cs_attr->off); + pm_runtime_put_sync(_dev->parent); + return sysfs_emit(buf, "0x%llx\n", val); +} +EXPORT_SYMBOL_GPL(coresight_simple_show32); void coresight_set_cti_ops(const struct cti_assoc_op *cti_op) { diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h index c211979deca5..595ce5862056 100644 --- a/drivers/hwtracing/coresight/coresight-priv.h +++ b/drivers/hwtracing/coresight/coresight-priv.h @@ -41,8 +41,8 @@ #define ETM_MODE_EXCL_USER BIT(31) struct cs_pair_attribute { struct device_attribute attr; - s32 lo_off; - s32 hi_off; + u32 lo_off; + u32 hi_off; }; struct cs_off_attribute { @@ -50,21 +50,23 @@ struct cs_off_attribute { u32 off; }; -extern ssize_t coresight_simple_show(struct device *_dev, +extern ssize_t coresight_simple_show32(struct device *_dev, + struct device_attribute *attr, char *buf); +extern ssize_t coresight_simple_show_pair(struct device *_dev, struct device_attribute *attr, char *buf); #define coresight_simple_reg32(name, offset) \ - (&((struct cs_pair_attribute[]) { \ + (&((struct cs_off_attribute[]) { \ { \ - __ATTR(name, 0444, coresight_simple_show, NULL), \ - offset, -1 \ + __ATTR(name, 0444, coresight_simple_show32, NULL), \ + offset \ } \ })[0].attr.attr) #define coresight_simple_reg64(name, lo_off, hi_off) \ (&((struct cs_pair_attribute[]) { \ { \ - __ATTR(name, 0444, coresight_simple_show, NULL), \ + __ATTR(name, 0444, coresight_simple_show_pair, NULL), \ lo_off, hi_off \ } \ })[0].attr.attr) @@ -130,25 +132,6 @@ static inline void CS_UNLOCK(void __iomem *addr) } while (0); } -static inline u64 -coresight_read_reg_pair(void __iomem *addr, s32 lo_offset, s32 hi_offset) -{ - u64 val; - - val = readl_relaxed(addr + lo_offset); - val |= (hi_offset < 0) ? 0 : - (u64)readl_relaxed(addr + hi_offset) << 32; - return val; -} - -static inline void coresight_write_reg_pair(void __iomem *addr, u64 val, - s32 lo_offset, s32 hi_offset) -{ - writel_relaxed((u32)val, addr + lo_offset); - if (hi_offset >= 0) - writel_relaxed((u32)(val >> 32), addr + hi_offset); -} - void coresight_disable_path(struct list_head *path); int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data); struct coresight_device *coresight_get_sink(struct list_head *path); diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h index b91ec7dde7bc..3557af14933a 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.h +++ b/drivers/hwtracing/coresight/coresight-tmc.h @@ -278,12 +278,12 @@ ssize_t tmc_etr_get_sysfs_trace(struct tmc_drvdata *drvdata, static inline u64 \ tmc_read_##name(struct tmc_drvdata *drvdata) \ { \ - return coresight_read_reg_pair(drvdata->base, lo_off, hi_off); \ + return csdev_access_relaxed_read_pair(&drvdata->csdev->access, lo_off, hi_off); \ } \ static inline void \ tmc_write_##name(struct tmc_drvdata *drvdata, u64 val) \ { \ - coresight_write_reg_pair(drvdata->base, val, lo_off, hi_off); \ + csdev_access_relaxed_write_pair(&drvdata->csdev->access, val, lo_off, hi_off); \ } TMC_REG_PAIR(rrp, TMC_RRP, TMC_RRPHI) diff --git a/include/linux/coresight.h b/include/linux/coresight.h index 2ce21cb16e72..36e6913e50fd 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -371,21 +371,26 @@ static inline u32 csdev_access_relaxed_read32(struct csdev_access *csa, } static inline u64 csdev_access_relaxed_read_pair(struct csdev_access *csa, - s32 lo_offset, s32 hi_offset) + u32 lo_offset, u32 hi_offset) { - u64 val; - if (likely(csa->io_mem)) { - val = readl_relaxed(csa->base + lo_offset); - val |= (hi_offset < 0) ? 0 : - (u64)readl_relaxed(csa->base + hi_offset) << 32; - return val; + return readl_relaxed(csa->base + lo_offset) | + ((u64)readl_relaxed(csa->base + hi_offset) << 32); } - val = csa->read(lo_offset, true, false); - val |= (hi_offset < 0) ? 0 : - (u64)csa->read(hi_offset, true, false) << 32; - return val; + return csa->read(lo_offset, true, false) | (csa->read(hi_offset, true, false) << 32); +} + +static inline void csdev_access_relaxed_write_pair(struct csdev_access *csa, u64 val, + u32 lo_offset, u32 hi_offset) +{ + if (likely(csa->io_mem)) { + writel_relaxed((u32)val, csa->base + lo_offset); + writel_relaxed((u32)(val >> 32), csa->base + hi_offset); + } else { + csa->write((u32)val, lo_offset, true, false); + csa->write((u32)(val >> 32), hi_offset, true, false); + } } static inline u32 csdev_access_read32(struct csdev_access *csa, u32 offset) -- Gitee From 4501b0dce526e088d2802c0c89ac6a6d5c2ebd30 Mon Sep 17 00:00:00 2001 From: Nathan Chancellor Date: Thu, 1 Sep 2022 12:50:55 -0700 Subject: [PATCH 7/8] coresight: cti-sysfs: Mark coresight_cti_reg_store() as __maybe_unused mainline inclusion from mainline-v6.1-rc1 commit 269e633dad16c951449c99cc3bfce46110f5029e category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I6XLGY CVE: NA Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=269e633dad16c951449c99cc3bfce46110f5029e ---------------------------------------------------------------------- When building without CONFIG_CORESIGHT_CTI_INTEGRATION_REGS, there is a warning about coresight_cti_reg_store() being unused in the file: drivers/hwtracing/coresight/coresight-cti-sysfs.c:184:16: warning: 'coresight_cti_reg_store' defined but not used [-Wunused-function] 184 | static ssize_t coresight_cti_reg_store(struct device *dev, | ^~~~~~~~~~~~~~~~~~~~~~~ This is expected as coresight_cti_reg_store() is only used in the coresight_cti_reg_rw macro, which is only used in a block guarded by CONFIG_CORESIGHT_CTI_INTEGRATION_REGS. Mark coresight_cti_reg_store() as __maybe_unused to clearly indicate that the function may be unused depending on the configuration. Fixes: fbca79e55429 ("coresight: cti-sysfs: Re-use same functions for similar sysfs register accessors") Signed-off-by: Nathan Chancellor Reviewed-by: James Clark Link: https://lore.kernel.org/r/20220901195055.1932340-1-nathan@kernel.org Signed-off-by: Mathieu Poirier Signed-off-by: huangfangrun --- drivers/hwtracing/coresight/coresight-cti-sysfs.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-cti-sysfs.c b/drivers/hwtracing/coresight/coresight-cti-sysfs.c index 478b8d38b744..6d59c815ecf5 100644 --- a/drivers/hwtracing/coresight/coresight-cti-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-cti-sysfs.c @@ -181,9 +181,9 @@ static ssize_t coresight_cti_reg_show(struct device *dev, } /* Write registers with power check only (no enable check). */ -static ssize_t coresight_cti_reg_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) +static __maybe_unused ssize_t coresight_cti_reg_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) { struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); struct cs_off_attribute *cti_attr = container_of(attr, struct cs_off_attribute, attr); -- Gitee From a6511ea480226576c8cd350618768457cc6a81fc Mon Sep 17 00:00:00 2001 From: Qi Liu Date: Sat, 14 Jan 2023 18:13:01 +0800 Subject: [PATCH 8/8] drivers/coresight: Add UltraSoc System Memory Buffer driver mainline inclusion from mainline-v6.3-rc1 commit 06f5c2926aaa0fba7f99678da6ef77cbbbda1441 category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I6XELZ CVE: NA Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=06f5c2926aaa0fba7f99678da6ef77cbbbda1441 ---------------------------------------------------------------------- Add driver for UltraSoc SMB(System Memory Buffer) device. SMB provides a way to buffer messages from ETM, and store these "CPU instructions trace" in system memory. The SMB device is identifier as ACPI HID "HISI03A1". Device system memory address resources are allocated using the _CRS method and buffer modes is the circular buffer mode. SMB is developed by UltraSoc technology, which is acquired by Siemens, and we still use "UltraSoc" to name driver. Signed-off-by: Qi Liu Signed-off-by: Junhao He Tested-by: JunHao He Reviewed-by: Jonathan Cameron Signed-off-by: Suzuki K Poulose Link: https://lore.kernel.org/r/20230114101302.62320-2-hejunhao3@huawei.com Signed-off-by: huangfangrun --- drivers/hwtracing/coresight/Kconfig | 12 + drivers/hwtracing/coresight/Makefile | 1 + drivers/hwtracing/coresight/ultrasoc-smb.c | 648 +++++++++++++++++++++ drivers/hwtracing/coresight/ultrasoc-smb.h | 125 ++++ 4 files changed, 786 insertions(+) create mode 100644 drivers/hwtracing/coresight/ultrasoc-smb.c create mode 100644 drivers/hwtracing/coresight/ultrasoc-smb.h diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig index ceaf1f89f45b..70f289112a0b 100644 --- a/drivers/hwtracing/coresight/Kconfig +++ b/drivers/hwtracing/coresight/Kconfig @@ -188,6 +188,18 @@ config CORESIGHT_TRBE To compile this driver as a module, choose M here: the module will be called coresight-trbe. +config ULTRASOC_SMB + tristate "Ultrasoc system memory buffer drivers" + depends on ACPI || COMPILE_TEST + depends on ARM64 && CORESIGHT_LINKS_AND_SINKS + help + This driver provides support for the Ultrasoc system memory buffer (SMB). + SMB is responsible for receiving the trace data from Coresight ETM devices + and storing them to a system buffer. + + To compile this driver as a module, choose M here: the module will be + called ultrasoc-smb. + endif config ACPI_TRBE diff --git a/drivers/hwtracing/coresight/Makefile b/drivers/hwtracing/coresight/Makefile index d60816509755..c2d6456953ad 100644 --- a/drivers/hwtracing/coresight/Makefile +++ b/drivers/hwtracing/coresight/Makefile @@ -24,3 +24,4 @@ obj-$(CONFIG_CORESIGHT_CTI) += coresight-cti.o obj-$(CONFIG_CORESIGHT_TRBE) += coresight-trbe.o coresight-cti-y := coresight-cti-core.o coresight-cti-platform.o \ coresight-cti-sysfs.o +obj-$(CONFIG_ULTRASOC_SMB) += ultrasoc-smb.o diff --git a/drivers/hwtracing/coresight/ultrasoc-smb.c b/drivers/hwtracing/coresight/ultrasoc-smb.c new file mode 100644 index 000000000000..2560fdbb8ebf --- /dev/null +++ b/drivers/hwtracing/coresight/ultrasoc-smb.c @@ -0,0 +1,648 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Siemens System Memory Buffer driver. + * Copyright(c) 2022, HiSilicon Limited. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "coresight-etm-perf.h" +#include "coresight-priv.h" +#include "ultrasoc-smb.h" + +DEFINE_CORESIGHT_DEVLIST(sink_devs, "ultra_smb"); + +#define ULTRASOC_SMB_DSM_UUID "82ae1283-7f6a-4cbe-aa06-53e8fb24db18" + +static bool smb_buffer_not_empty(struct smb_drv_data *drvdata) +{ + u32 buf_status = readl(drvdata->base + SMB_LB_INT_STS_REG); + + return FIELD_GET(SMB_LB_INT_STS_NOT_EMPTY_MSK, buf_status); +} + +static void smb_update_data_size(struct smb_drv_data *drvdata) +{ + struct smb_data_buffer *sdb = &drvdata->sdb; + u32 buf_wrptr; + + buf_wrptr = readl(drvdata->base + SMB_LB_WR_ADDR_REG) - + sdb->buf_hw_base; + + /* Buffer is full */ + if (buf_wrptr == sdb->buf_rdptr && smb_buffer_not_empty(drvdata)) { + sdb->data_size = sdb->buf_size; + return; + } + + /* The buffer mode is circular buffer mode */ + sdb->data_size = CIRC_CNT(buf_wrptr, sdb->buf_rdptr, + sdb->buf_size); +} + +/* + * The read pointer adds @nbytes bytes (may round up to the beginning) + * after the data is read or discarded, while needing to update the + * available data size. + */ +static void smb_update_read_ptr(struct smb_drv_data *drvdata, u32 nbytes) +{ + struct smb_data_buffer *sdb = &drvdata->sdb; + + sdb->buf_rdptr += nbytes; + sdb->buf_rdptr %= sdb->buf_size; + writel(sdb->buf_hw_base + sdb->buf_rdptr, + drvdata->base + SMB_LB_RD_ADDR_REG); + + sdb->data_size -= nbytes; +} + +static void smb_reset_buffer(struct smb_drv_data *drvdata) +{ + struct smb_data_buffer *sdb = &drvdata->sdb; + u32 write_ptr; + + /* + * We must flush and discard any data left in hardware path + * to avoid corrupting the next session. + * Note: The write pointer will never exceed the read pointer. + */ + writel(SMB_LB_PURGE_PURGED, drvdata->base + SMB_LB_PURGE_REG); + + /* Reset SMB logical buffer status flags */ + writel(SMB_LB_INT_STS_RESET, drvdata->base + SMB_LB_INT_STS_REG); + + write_ptr = readl(drvdata->base + SMB_LB_WR_ADDR_REG); + + /* Do nothing, not data left in hardware path */ + if (!write_ptr || write_ptr == sdb->buf_rdptr + sdb->buf_hw_base) + return; + + /* + * The SMB_LB_WR_ADDR_REG register is read-only, + * Synchronize the read pointer to write pointer. + */ + writel(write_ptr, drvdata->base + SMB_LB_RD_ADDR_REG); + sdb->buf_rdptr = write_ptr - sdb->buf_hw_base; +} + +static int smb_open(struct inode *inode, struct file *file) +{ + struct smb_drv_data *drvdata = container_of(file->private_data, + struct smb_drv_data, miscdev); + int ret = 0; + + mutex_lock(&drvdata->mutex); + + if (drvdata->reading) { + ret = -EBUSY; + goto out; + } + + if (atomic_read(drvdata->csdev->refcnt)) { + ret = -EBUSY; + goto out; + } + + smb_update_data_size(drvdata); + + drvdata->reading = true; +out: + mutex_unlock(&drvdata->mutex); + + return ret; +} + +static ssize_t smb_read(struct file *file, char __user *data, size_t len, + loff_t *ppos) +{ + struct smb_drv_data *drvdata = container_of(file->private_data, + struct smb_drv_data, miscdev); + struct smb_data_buffer *sdb = &drvdata->sdb; + struct device *dev = &drvdata->csdev->dev; + ssize_t to_copy = 0; + + if (!len) + return 0; + + mutex_lock(&drvdata->mutex); + + if (!sdb->data_size) + goto out; + + to_copy = min(sdb->data_size, len); + + /* Copy parts of trace data when read pointer wrap around SMB buffer */ + if (sdb->buf_rdptr + to_copy > sdb->buf_size) + to_copy = sdb->buf_size - sdb->buf_rdptr; + + if (copy_to_user(data, sdb->buf_base + sdb->buf_rdptr, to_copy)) { + dev_dbg(dev, "Failed to copy data to user\n"); + to_copy = -EFAULT; + goto out; + } + + *ppos += to_copy; + + smb_update_read_ptr(drvdata, to_copy); + + dev_dbg(dev, "%zu bytes copied\n", to_copy); +out: + if (!sdb->data_size) + smb_reset_buffer(drvdata); + mutex_unlock(&drvdata->mutex); + + return to_copy; +} + +static int smb_release(struct inode *inode, struct file *file) +{ + struct smb_drv_data *drvdata = container_of(file->private_data, + struct smb_drv_data, miscdev); + + mutex_lock(&drvdata->mutex); + drvdata->reading = false; + mutex_unlock(&drvdata->mutex); + + return 0; +} + +static const struct file_operations smb_fops = { + .owner = THIS_MODULE, + .open = smb_open, + .read = smb_read, + .release = smb_release, + .llseek = no_llseek, +}; + +static ssize_t buf_size_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct smb_drv_data *drvdata = dev_get_drvdata(dev->parent); + + return sysfs_emit(buf, "0x%lx\n", drvdata->sdb.buf_size); +} +static DEVICE_ATTR_RO(buf_size); + +static struct attribute *smb_sink_attrs[] = { + coresight_simple_reg32(read_pos, SMB_LB_RD_ADDR_REG), + coresight_simple_reg32(write_pos, SMB_LB_WR_ADDR_REG), + coresight_simple_reg32(buf_status, SMB_LB_INT_STS_REG), + &dev_attr_buf_size.attr, + NULL +}; + +static const struct attribute_group smb_sink_group = { + .attrs = smb_sink_attrs, + .name = "mgmt", +}; + +static const struct attribute_group *smb_sink_groups[] = { + &smb_sink_group, + NULL +}; + +static void smb_enable_hw(struct smb_drv_data *drvdata) +{ + writel(SMB_GLB_EN_HW_ENABLE, drvdata->base + SMB_GLB_EN_REG); +} + +static void smb_disable_hw(struct smb_drv_data *drvdata) +{ + writel(0x0, drvdata->base + SMB_GLB_EN_REG); +} + +static void smb_enable_sysfs(struct coresight_device *csdev) +{ + struct smb_drv_data *drvdata = dev_get_drvdata(csdev->dev.parent); + + if (drvdata->mode != CS_MODE_DISABLED) + return; + + smb_enable_hw(drvdata); + drvdata->mode = CS_MODE_SYSFS; +} + +static int smb_enable_perf(struct coresight_device *csdev, void *data) +{ + struct smb_drv_data *drvdata = dev_get_drvdata(csdev->dev.parent); + struct perf_output_handle *handle = data; + struct cs_buffers *buf = etm_perf_sink_config(handle); + pid_t pid; + + if (!buf) + return -EINVAL; + + /* Get a handle on the pid of the target process */ + pid = buf->pid; + + /* Device is already in used by other session */ + if (drvdata->pid != -1 && drvdata->pid != pid) + return -EBUSY; + + if (drvdata->pid == -1) { + smb_enable_hw(drvdata); + drvdata->pid = pid; + drvdata->mode = CS_MODE_PERF; + } + + return 0; +} + +static int smb_enable(struct coresight_device *csdev, u32 mode, void *data) +{ + struct smb_drv_data *drvdata = dev_get_drvdata(csdev->dev.parent); + int ret = 0; + + mutex_lock(&drvdata->mutex); + + /* Do nothing, the trace data is reading by other interface now */ + if (drvdata->reading) { + ret = -EBUSY; + goto out; + } + + /* Do nothing, the SMB is already enabled as other mode */ + if (drvdata->mode != CS_MODE_DISABLED && drvdata->mode != mode) { + ret = -EBUSY; + goto out; + } + + switch (mode) { + case CS_MODE_SYSFS: + smb_enable_sysfs(csdev); + break; + case CS_MODE_PERF: + ret = smb_enable_perf(csdev, data); + break; + default: + ret = -EINVAL; + } + + if (ret) + goto out; + + atomic_inc(csdev->refcnt); + + dev_dbg(&csdev->dev, "Ultrasoc SMB enabled\n"); +out: + mutex_unlock(&drvdata->mutex); + + return ret; +} + +static int smb_disable(struct coresight_device *csdev) +{ + struct smb_drv_data *drvdata = dev_get_drvdata(csdev->dev.parent); + int ret = 0; + + mutex_lock(&drvdata->mutex); + + if (drvdata->reading) { + ret = -EBUSY; + goto out; + } + + if (atomic_dec_return(csdev->refcnt)) { + ret = -EBUSY; + goto out; + } + + /* Complain if we (somehow) got out of sync */ + WARN_ON_ONCE(drvdata->mode == CS_MODE_DISABLED); + + smb_disable_hw(drvdata); + + /* Dissociate from the target process. */ + drvdata->pid = -1; + drvdata->mode = CS_MODE_DISABLED; + + dev_dbg(&csdev->dev, "Ultrasoc SMB disabled\n"); +out: + mutex_unlock(&drvdata->mutex); + + return ret; +} + +static void *smb_alloc_buffer(struct coresight_device *csdev, + struct perf_event *event, void **pages, + int nr_pages, bool overwrite) +{ + struct cs_buffers *buf; + int node; + + node = (event->cpu == -1) ? NUMA_NO_NODE : cpu_to_node(event->cpu); + buf = kzalloc_node(sizeof(struct cs_buffers), GFP_KERNEL, node); + if (!buf) + return NULL; + + buf->snapshot = overwrite; + buf->nr_pages = nr_pages; + buf->data_pages = pages; + buf->pid = task_pid_nr(event->owner); + + return buf; +} + +static void smb_free_buffer(void *config) +{ + struct cs_buffers *buf = config; + + kfree(buf); +} + +static void smb_sync_perf_buffer(struct smb_drv_data *drvdata, + struct cs_buffers *buf, + unsigned long head) +{ + struct smb_data_buffer *sdb = &drvdata->sdb; + char **dst_pages = (char **)buf->data_pages; + unsigned long to_copy; + long pg_idx, pg_offset; + + pg_idx = head >> PAGE_SHIFT; + pg_offset = head & (PAGE_SIZE - 1); + + while (sdb->data_size) { + unsigned long pg_space = PAGE_SIZE - pg_offset; + + to_copy = min(sdb->data_size, pg_space); + + /* Copy parts of trace data when read pointer wrap around */ + if (sdb->buf_rdptr + to_copy > sdb->buf_size) + to_copy = sdb->buf_size - sdb->buf_rdptr; + + memcpy(dst_pages[pg_idx] + pg_offset, + sdb->buf_base + sdb->buf_rdptr, to_copy); + + pg_offset += to_copy; + if (pg_offset >= PAGE_SIZE) { + pg_offset = 0; + pg_idx++; + pg_idx %= buf->nr_pages; + } + smb_update_read_ptr(drvdata, to_copy); + } + + smb_reset_buffer(drvdata); +} + +static unsigned long smb_update_buffer(struct coresight_device *csdev, + struct perf_output_handle *handle, + void *sink_config) +{ + struct smb_drv_data *drvdata = dev_get_drvdata(csdev->dev.parent); + struct smb_data_buffer *sdb = &drvdata->sdb; + struct cs_buffers *buf = sink_config; + unsigned long data_size = 0; + bool lost = false; + + if (!buf) + return 0; + + mutex_lock(&drvdata->mutex); + + /* Don't do anything if another tracer is using this sink. */ + if (atomic_read(csdev->refcnt) != 1) + goto out; + + smb_disable_hw(drvdata); + smb_update_data_size(drvdata); + + /* + * The SMB buffer may be bigger than the space available in the + * perf ring buffer (handle->size). If so advance the offset so + * that we get the latest trace data. + */ + if (sdb->data_size > handle->size) { + smb_update_read_ptr(drvdata, sdb->data_size - handle->size); + lost = true; + } + + data_size = sdb->data_size; + smb_sync_perf_buffer(drvdata, buf, handle->head); + if (!buf->snapshot && lost) + perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED); +out: + mutex_unlock(&drvdata->mutex); + + return data_size; +} + +static const struct coresight_ops_sink smb_cs_ops = { + .enable = smb_enable, + .disable = smb_disable, + .alloc_buffer = smb_alloc_buffer, + .free_buffer = smb_free_buffer, + .update_buffer = smb_update_buffer, +}; + +static const struct coresight_ops cs_ops = { + .sink_ops = &smb_cs_ops, +}; + +static int smb_init_data_buffer(struct platform_device *pdev, + struct smb_data_buffer *sdb) +{ + struct resource *res; + void *base; + + res = platform_get_resource(pdev, IORESOURCE_MEM, SMB_BUF_ADDR_RES); + if (IS_ERR(res)) { + dev_err(&pdev->dev, "SMB device failed to get resource\n"); + return -EINVAL; + } + + sdb->buf_rdptr = 0; + sdb->buf_hw_base = FIELD_GET(SMB_BUF_ADDR_LO_MSK, res->start); + sdb->buf_size = resource_size(res); + if (sdb->buf_size == 0) + return -EINVAL; + + /* + * This is a chunk of memory, use classic mapping with better + * performance. + */ + base = devm_memremap(&pdev->dev, sdb->buf_hw_base, sdb->buf_size, + MEMREMAP_WB); + if (IS_ERR(base)) + return PTR_ERR(base); + + sdb->buf_base = base; + + return 0; +} + +static void smb_init_hw(struct smb_drv_data *drvdata) +{ + smb_disable_hw(drvdata); + smb_reset_buffer(drvdata); + + writel(SMB_LB_CFG_LO_DEFAULT, drvdata->base + SMB_LB_CFG_LO_REG); + writel(SMB_LB_CFG_HI_DEFAULT, drvdata->base + SMB_LB_CFG_HI_REG); + writel(SMB_GLB_CFG_DEFAULT, drvdata->base + SMB_GLB_CFG_REG); + writel(SMB_GLB_INT_CFG, drvdata->base + SMB_GLB_INT_REG); + writel(SMB_LB_INT_CTRL_CFG, drvdata->base + SMB_LB_INT_CTRL_REG); +} + +static int smb_register_sink(struct platform_device *pdev, + struct smb_drv_data *drvdata) +{ + struct coresight_platform_data *pdata = NULL; + struct coresight_desc desc = { 0 }; + int ret; + + pdata = coresight_get_platform_data(&pdev->dev); + if (IS_ERR(pdata)) + return PTR_ERR(pdata); + + desc.type = CORESIGHT_DEV_TYPE_SINK; + desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER; + desc.ops = &cs_ops; + desc.pdata = pdata; + desc.dev = &pdev->dev; + desc.groups = smb_sink_groups; + desc.name = coresight_alloc_device_name(&sink_devs, &pdev->dev); + if (!desc.name) { + dev_err(&pdev->dev, "Failed to alloc coresight device name"); + return -ENOMEM; + } + desc.access = CSDEV_ACCESS_IOMEM(drvdata->base); + + drvdata->csdev = coresight_register(&desc); + if (IS_ERR(drvdata->csdev)) + return PTR_ERR(drvdata->csdev); + + drvdata->miscdev.name = desc.name; + drvdata->miscdev.minor = MISC_DYNAMIC_MINOR; + drvdata->miscdev.fops = &smb_fops; + ret = misc_register(&drvdata->miscdev); + if (ret) { + coresight_unregister(drvdata->csdev); + dev_err(&pdev->dev, "Failed to register misc, ret=%d\n", ret); + } + + return ret; +} + +static void smb_unregister_sink(struct smb_drv_data *drvdata) +{ + misc_deregister(&drvdata->miscdev); + coresight_unregister(drvdata->csdev); +} + +static int smb_config_inport(struct device *dev, bool enable) +{ + u64 func = enable ? 1 : 0; + union acpi_object *obj; + guid_t guid; + u64 rev = 0; + + /* + * Using DSM calls to enable/disable ultrasoc hardwares on + * tracing path, to prevent ultrasoc packet format being exposed. + */ + if (guid_parse(ULTRASOC_SMB_DSM_UUID, &guid)) { + dev_err(dev, "Get GUID failed\n"); + return -EINVAL; + } + + obj = acpi_evaluate_dsm(ACPI_HANDLE(dev), &guid, rev, func, NULL); + if (!obj) { + dev_err(dev, "ACPI handle failed\n"); + return -ENODEV; + } + + ACPI_FREE(obj); + + return 0; +} + +static int smb_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct smb_drv_data *drvdata; + int ret; + + drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + drvdata->base = devm_platform_ioremap_resource(pdev, SMB_REG_ADDR_RES); + if (IS_ERR(drvdata->base)) { + dev_err(dev, "Failed to ioremap resource\n"); + return PTR_ERR(drvdata->base); + } + + smb_init_hw(drvdata); + + ret = smb_init_data_buffer(pdev, &drvdata->sdb); + if (ret) { + dev_err(dev, "Failed to init buffer, ret = %d\n", ret); + return ret; + } + + mutex_init(&drvdata->mutex); + drvdata->pid = -1; + + ret = smb_register_sink(pdev, drvdata); + if (ret) { + dev_err(dev, "Failed to register SMB sink\n"); + return ret; + } + + ret = smb_config_inport(dev, true); + if (ret) { + smb_unregister_sink(drvdata); + return ret; + } + + platform_set_drvdata(pdev, drvdata); + + return 0; +} + +static int smb_remove(struct platform_device *pdev) +{ + struct smb_drv_data *drvdata = platform_get_drvdata(pdev); + int ret; + + ret = smb_config_inport(&pdev->dev, false); + if (ret) + return ret; + + smb_unregister_sink(drvdata); + + return 0; +} + +#ifdef CONFIG_ACPI +static const struct acpi_device_id ultrasoc_smb_acpi_match[] = { + {"HISI03A1", 0}, + {} +}; +MODULE_DEVICE_TABLE(acpi, ultrasoc_smb_acpi_match); +#endif + +static struct platform_driver smb_driver = { + .driver = { + .name = "ultrasoc-smb", + .acpi_match_table = ACPI_PTR(ultrasoc_smb_acpi_match), + .suppress_bind_attrs = true, + }, + .probe = smb_probe, + .remove = smb_remove, +}; +module_platform_driver(smb_driver); + +MODULE_DESCRIPTION("UltraSoc SMB CoreSight driver"); +MODULE_LICENSE("Dual MIT/GPL"); +MODULE_AUTHOR("Jonathan Zhou "); +MODULE_AUTHOR("Qi Liu "); diff --git a/drivers/hwtracing/coresight/ultrasoc-smb.h b/drivers/hwtracing/coresight/ultrasoc-smb.h new file mode 100644 index 000000000000..7dfbe42e37a0 --- /dev/null +++ b/drivers/hwtracing/coresight/ultrasoc-smb.h @@ -0,0 +1,125 @@ +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ +/* + * Siemens System Memory Buffer driver. + * Copyright(c) 2022, HiSilicon Limited. + */ + +#ifndef _ULTRASOC_SMB_H +#define _ULTRASOC_SMB_H + +#include +#include + +/* Offset of SMB global registers */ +#define SMB_GLB_CFG_REG 0x00 +#define SMB_GLB_EN_REG 0x04 +#define SMB_GLB_INT_REG 0x08 + +/* Offset of SMB logical buffer registers */ +#define SMB_LB_CFG_LO_REG 0x40 +#define SMB_LB_CFG_HI_REG 0x44 +#define SMB_LB_INT_CTRL_REG 0x48 +#define SMB_LB_INT_STS_REG 0x4c +#define SMB_LB_RD_ADDR_REG 0x5c +#define SMB_LB_WR_ADDR_REG 0x60 +#define SMB_LB_PURGE_REG 0x64 + +/* Set global config register */ +#define SMB_GLB_CFG_BURST_LEN_MSK GENMASK(11, 4) +#define SMB_GLB_CFG_IDLE_PRD_MSK GENMASK(15, 12) +#define SMB_GLB_CFG_MEM_WR_MSK GENMASK(21, 16) +#define SMB_GLB_CFG_MEM_RD_MSK GENMASK(27, 22) +#define SMB_GLB_CFG_DEFAULT (FIELD_PREP(SMB_GLB_CFG_BURST_LEN_MSK, 0xf) | \ + FIELD_PREP(SMB_GLB_CFG_IDLE_PRD_MSK, 0xf) | \ + FIELD_PREP(SMB_GLB_CFG_MEM_WR_MSK, 0x3) | \ + FIELD_PREP(SMB_GLB_CFG_MEM_RD_MSK, 0x1b)) + +#define SMB_GLB_EN_HW_ENABLE BIT(0) + +/* Set global interrupt control register */ +#define SMB_GLB_INT_EN BIT(0) +#define SMB_GLB_INT_PULSE BIT(1) /* Interrupt type: 1 - Pulse */ +#define SMB_GLB_INT_ACT_H BIT(2) /* Interrupt polarity: 1 - Active high */ +#define SMB_GLB_INT_CFG (SMB_GLB_INT_EN | SMB_GLB_INT_PULSE | \ + SMB_GLB_INT_ACT_H) + +/* Set logical buffer config register lower 32 bits */ +#define SMB_LB_CFG_LO_EN BIT(0) +#define SMB_LB_CFG_LO_SINGLE_END BIT(1) +#define SMB_LB_CFG_LO_INIT BIT(8) +#define SMB_LB_CFG_LO_CONT BIT(11) +#define SMB_LB_CFG_LO_FLOW_MSK GENMASK(19, 16) +#define SMB_LB_CFG_LO_DEFAULT (SMB_LB_CFG_LO_EN | SMB_LB_CFG_LO_SINGLE_END | \ + SMB_LB_CFG_LO_INIT | SMB_LB_CFG_LO_CONT | \ + FIELD_PREP(SMB_LB_CFG_LO_FLOW_MSK, 0xf)) + +/* Set logical buffer config register upper 32 bits */ +#define SMB_LB_CFG_HI_RANGE_UP_MSK GENMASK(15, 8) +#define SMB_LB_CFG_HI_DEFAULT FIELD_PREP(SMB_LB_CFG_HI_RANGE_UP_MSK, 0xff) + +/* + * Set logical buffer interrupt control register. + * The register control the validity of both real-time events and + * interrupts. When logical buffer status changes causes to issue + * an interrupt at the same time as it issues a real-time event. + * Real-time events are used in SMB driver, which needs to get the buffer + * status. Interrupts are used in debugger mode. + * SMB_LB_INT_CTRL_BUF_NOTE_MASK control which events flags or interrupts + * are valid. + */ +#define SMB_LB_INT_CTRL_EN BIT(0) +#define SMB_LB_INT_CTRL_BUF_NOTE_MSK GENMASK(11, 8) +#define SMB_LB_INT_CTRL_CFG (SMB_LB_INT_CTRL_EN | \ + FIELD_PREP(SMB_LB_INT_CTRL_BUF_NOTE_MSK, 0xf)) + +/* Set logical buffer interrupt status register */ +#define SMB_LB_INT_STS_NOT_EMPTY_MSK BIT(0) +#define SMB_LB_INT_STS_BUF_RESET_MSK GENMASK(3, 0) +#define SMB_LB_INT_STS_RESET FIELD_PREP(SMB_LB_INT_STS_BUF_RESET_MSK, 0xf) + +#define SMB_LB_PURGE_PURGED BIT(0) + +#define SMB_REG_ADDR_RES 0 +#define SMB_BUF_ADDR_RES 1 +#define SMB_BUF_ADDR_LO_MSK GENMASK(31, 0) + +/** + * struct smb_data_buffer - Details of the buffer used by SMB + * @buf_base: Memory mapped base address of SMB. + * @buf_hw_base: SMB buffer start Physical base address, only used 32bits. + * @buf_size: Size of the buffer. + * @data_size: Size of the available trace data for SMB. + * @buf_rdptr: Current read position (index) within the buffer. + */ +struct smb_data_buffer { + void *buf_base; + u32 buf_hw_base; + unsigned long buf_size; + unsigned long data_size; + unsigned long buf_rdptr; +}; + +/** + * struct smb_drv_data - specifics associated to an SMB component + * @base: Memory mapped base address for SMB component. + * @csdev: Component vitals needed by the framework. + * @sdb: Data buffer for SMB. + * @miscdev: Specifics to handle "/dev/xyz.smb" entry. + * @mutex: Control data access to one at a time. + * @reading: Synchronise user space access to SMB buffer. + * @pid: Process ID of the process being monitored by the + * session that is using this component. + * @mode: How this SMB is being used, perf mode or sysfs mode. + */ +struct smb_drv_data { + void __iomem *base; + struct coresight_device *csdev; + struct smb_data_buffer sdb; + struct miscdevice miscdev; + struct mutex mutex; + bool reading; + pid_t pid; + u32 mode; +}; + +#endif -- Gitee