From 1410fd92e951c87701cb33aec43ce42136f4597e Mon Sep 17 00:00:00 2001 From: fuhao Date: Mon, 3 Mar 2025 16:51:20 +0800 Subject: [PATCH 01/10] x86/amd_nb: Add support for Hygon family 18h model 7h Add Hygon family 18h model 7h processor support for amd_nb. Signed-off-by: fuhao --- arch/x86/kernel/amd_nb.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c index 4fe5d30397ec..c91f96431c10 100644 --- a/arch/x86/kernel/amd_nb.c +++ b/arch/x86/kernel/amd_nb.c @@ -279,6 +279,7 @@ static int get_df_register(struct pci_dev *misc, u8 func, int offset, u32 *value device = PCI_DEVICE_ID_HYGON_18H_M04H_DF_F1; break; case 0x6: + case 0x7: device = PCI_DEVICE_ID_HYGON_18H_M05H_DF_F1; break; default: @@ -287,6 +288,7 @@ static int get_df_register(struct pci_dev *misc, u8 func, int offset, u32 *value } else if (func == 5) { switch (boot_cpu_data.x86_model) { case 0x6: + case 0x7: device = PCI_DEVICE_ID_HYGON_18H_M06H_DF_F5; break; default: -- Gitee From 5d5f18ad080a5aa327a650fbf11afc6103b0c342 Mon Sep 17 00:00:00 2001 From: fuhao Date: Mon, 3 Mar 2025 16:53:34 +0800 Subject: [PATCH 02/10] EDAC/amd64: Add support for Hygon family 18h model 7h Add Hygon family 18h model 7h processor support for amd64_edac. Signed-off-by: fuhao --- drivers/edac/amd64_edac.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 0b6b6625d306..9f184b5dac2b 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -3563,6 +3563,11 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt) fam_type = &family_types[F18_M06H_CPUS]; pvt->ops = &family_types[F18_M06H_CPUS].ops; break; + } else if (pvt->model == 0x7) { + fam_type = &family_types[F18_M06H_CPUS]; + pvt->ops = &family_types[F18_M06H_CPUS].ops; + family_types[F18_M06H_CPUS].ctl_name = "F18h_M07h"; + break; } fam_type = &family_types[F17_CPUS]; pvt->ops = &family_types[F17_CPUS].ops; -- Gitee From a754e69492ab993c2d6aad3bc62bf11cb1e3f66a Mon Sep 17 00:00:00 2001 From: fuhao Date: Mon, 3 Mar 2025 17:00:07 +0800 Subject: [PATCH 03/10] perf/x86/uncore: Add L3 PMU support for Hygon family 18h model 7h From model 7h, Hygon processors can use the same L3 PMU slicemask and threadmask. Signed-off-by: fuhao --- arch/x86/events/amd/uncore.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c index 0db618ccf9a4..f2f5601745ee 100644 --- a/arch/x86/events/amd/uncore.c +++ b/arch/x86/events/amd/uncore.c @@ -193,7 +193,7 @@ static u64 l3_thread_slice_mask(u64 config) if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON && boot_cpu_data.x86 == 0x18) { - if (boot_cpu_data.x86_model == 0x6) + if (boot_cpu_data.x86_model >= 0x6 && boot_cpu_data.x86_model <= 0xf) return ((config & HYGON_L3_SLICE_MASK) ? : HYGON_L3_SLICE_MASK) | ((config & HYGON_L3_THREAD_MASK) ? : HYGON_L3_THREAD_MASK); else -- Gitee From 7aeb53bda34ed34ea99a6bd1401a098ed3b30178 Mon Sep 17 00:00:00 2001 From: fuhao Date: Mon, 3 Mar 2025 17:01:03 +0800 Subject: [PATCH 04/10] x86/cpu: Get LLC ID for Hygon family 18h model 10h Get LLC ID from ApicId[3]. Signed-off-by: fuhao --- arch/x86/kernel/cpu/cacheinfo.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/cacheinfo.c b/arch/x86/kernel/cpu/cacheinfo.c index f467b9d18c52..c2d9f007fd37 100644 --- a/arch/x86/kernel/cpu/cacheinfo.c +++ b/arch/x86/kernel/cpu/cacheinfo.c @@ -693,7 +693,8 @@ void cacheinfo_hygon_init_llc_id(struct cpuinfo_x86 *c, int cpu) if (!cpuid_edx(0x80000006)) return; - if (c->x86_model < 0x5) { + if (c->x86_model < 0x5 || + (c->x86_model >= 0x10 && c->x86_model <= 0x1f)) { /* * LLC is at the core complex level. * Core complex ID is ApicId[3] for these processors. -- Gitee From 7124afcfc933ea501ab6e53b73944eaf91357fed Mon Sep 17 00:00:00 2001 From: fuhao Date: Mon, 3 Mar 2025 17:02:51 +0800 Subject: [PATCH 05/10] x86/amd_nb: Add support for Hygon family 18h model 10h Add root and DF F1/F3/F4 device IDs for Hygon family 18h model 10h processors. Signed-off-by: fuhao --- arch/x86/kernel/amd_nb.c | 5 +++++ include/linux/pci_ids.h | 1 + 2 files changed, 6 insertions(+) diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c index c91f96431c10..a459ae8b9f7c 100644 --- a/arch/x86/kernel/amd_nb.c +++ b/arch/x86/kernel/amd_nb.c @@ -29,9 +29,11 @@ #define PCI_DEVICE_ID_AMD_19H_M10H_DF_F4 0x14b1 #define PCI_DEVICE_ID_HYGON_18H_M05H_ROOT 0x14a0 +#define PCI_DEVICE_ID_HYGON_18H_M10H_ROOT 0x14c0 #define PCI_DEVICE_ID_HYGON_18H_M04H_DF_F1 0x1491 #define PCI_DEVICE_ID_HYGON_18H_M05H_DF_F1 0x14b1 #define PCI_DEVICE_ID_HYGON_18H_M05H_DF_F4 0x14b4 +#define PCI_DEVICE_ID_HYGON_18H_M10H_DF_F4 0x14d4 #define PCI_DEVICE_ID_HYGON_18H_M06H_DF_F5 0x14b5 /* Protect the PCI config register pairs used for SMN and DF indirect access. */ @@ -93,6 +95,7 @@ static const struct pci_device_id hygon_root_ids[] = { { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_AMD_17H_ROOT) }, { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_AMD_17H_M30H_ROOT) }, { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_HYGON_18H_M05H_ROOT) }, + { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_HYGON_18H_M10H_ROOT) }, {} }; @@ -100,6 +103,7 @@ static const struct pci_device_id hygon_nb_misc_ids[] = { { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_AMD_17H_DF_F3) }, { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_AMD_17H_M30H_DF_F3) }, { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_HYGON_18H_M05H_DF_F3) }, + { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_HYGON_18H_M10H_DF_F3) }, {} }; @@ -107,6 +111,7 @@ static const struct pci_device_id hygon_nb_link_ids[] = { { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_AMD_17H_DF_F4) }, { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_AMD_17H_M30H_DF_F4) }, { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_HYGON_18H_M05H_DF_F4) }, + { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_HYGON_18H_M10H_DF_F4) }, {} }; diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index b3dce4e63208..8b8b65e4034e 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -2601,6 +2601,7 @@ #define PCI_VENDOR_ID_HYGON 0x1d94 #define PCI_DEVICE_ID_HYGON_18H_M05H_HDA 0x14a9 #define PCI_DEVICE_ID_HYGON_18H_M05H_DF_F3 0x14b3 +#define PCI_DEVICE_ID_HYGON_18H_M10H_DF_F3 0x14d3 #define PCI_VENDOR_ID_HXT 0x1dbf -- Gitee From 1937e0ab406c798e507ac4939f8c9af5c8dd8555 Mon Sep 17 00:00:00 2001 From: fuhao Date: Mon, 3 Mar 2025 17:06:11 +0800 Subject: [PATCH 06/10] EDAC/amd64: Add support for Hygon family 18h model 10h Add Hygon family 18h model 10h processor support for amd64_edac. Signed-off-by: fuhao --- drivers/edac/amd64_edac.c | 14 ++++++++++++++ drivers/edac/amd64_edac.h | 3 +++ 2 files changed, 17 insertions(+) diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 9f184b5dac2b..ed9a0a2d7c55 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -2457,6 +2457,16 @@ static struct amd64_family_type family_types[] = { .dbam_to_cs = f17_addr_mask_to_cs_size, } }, + [F18_M10H_CPUS] = { + .ctl_name = "F18h_M10h", + .f0_id = PCI_DEVICE_ID_HYGON_18H_M10H_DF_F0, + .f6_id = PCI_DEVICE_ID_HYGON_18H_M10H_DF_F6, + .max_mcs = 2, + .ops = { + .early_channel_count = f17_early_channel_count, + .dbam_to_cs = f17_addr_mask_to_cs_size, + } + }, [F19_CPUS] = { .ctl_name = "F19h", .f0_id = PCI_DEVICE_ID_AMD_19H_DF_F0, @@ -3568,6 +3578,10 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt) pvt->ops = &family_types[F18_M06H_CPUS].ops; family_types[F18_M06H_CPUS].ctl_name = "F18h_M07h"; break; + } else if (pvt->model == 0x10) { + fam_type = &family_types[F18_M10H_CPUS]; + pvt->ops = &family_types[F18_M10H_CPUS].ops; + break; } fam_type = &family_types[F17_CPUS]; pvt->ops = &family_types[F17_CPUS].ops; diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h index 3c82cedc4eec..ac2d939fb984 100644 --- a/drivers/edac/amd64_edac.h +++ b/drivers/edac/amd64_edac.h @@ -131,6 +131,8 @@ #define PCI_DEVICE_ID_HYGON_18H_M06H_DF_F0 0x14b0 #define PCI_DEVICE_ID_HYGON_18H_M06H_DF_F6 0x14b6 +#define PCI_DEVICE_ID_HYGON_18H_M10H_DF_F0 0x14d0 +#define PCI_DEVICE_ID_HYGON_18H_M10H_DF_F6 0x14d6 /* * Function 1 - Address Map @@ -306,6 +308,7 @@ enum amd_families { F17_M60H_CPUS, F17_M70H_CPUS, F18_M06H_CPUS, + F18_M10H_CPUS, F19_CPUS, F19_M10H_CPUS, NUM_FAMILIES, -- Gitee From 5409c38259b0ae629ee683792ac699dff0bed96b Mon Sep 17 00:00:00 2001 From: fuhao Date: Mon, 3 Mar 2025 17:07:24 +0800 Subject: [PATCH 07/10] hwmon/k10temp: Add support for Hygon family 18h model 10h Add 18H_M10H DF F3 device ID to get the temperature for Hygon family 18h model 10h processor. Signed-off-by: fuhao --- drivers/hwmon/k10temp.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c index 7121f44ae1fb..e08bb92d3451 100644 --- a/drivers/hwmon/k10temp.c +++ b/drivers/hwmon/k10temp.c @@ -555,6 +555,7 @@ static const struct pci_device_id k10temp_id_table[] = { { PCI_VDEVICE(HYGON, PCI_DEVICE_ID_AMD_17H_DF_F3) }, { PCI_VDEVICE(HYGON, PCI_DEVICE_ID_AMD_17H_M30H_DF_F3) }, { PCI_VDEVICE(HYGON, PCI_DEVICE_ID_HYGON_18H_M05H_DF_F3) }, + { PCI_VDEVICE(HYGON, PCI_DEVICE_ID_HYGON_18H_M10H_DF_F3) }, {} }; MODULE_DEVICE_TABLE(pci, k10temp_id_table); -- Gitee From fe07433ae37f041f1cf30042e14c630db11ac03d Mon Sep 17 00:00:00 2001 From: fuhao Date: Mon, 3 Mar 2025 17:31:04 +0800 Subject: [PATCH 08/10] ALSA: hda: Add support for Hygon family 18h model 10h HD-Audio Add the new PCI ID 0x1d94 0x14c9 for Hygon family 18h model 10h HDA controller. Signed-off-by: fuhao --- include/linux/pci_ids.h | 1 + sound/pci/hda/hda_intel.c | 8 ++++---- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 8b8b65e4034e..2a87de3c0b3e 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -2600,6 +2600,7 @@ #define PCI_VENDOR_ID_HYGON 0x1d94 #define PCI_DEVICE_ID_HYGON_18H_M05H_HDA 0x14a9 +#define PCI_DEVICE_ID_HYGON_18H_M10H_HDA 0x14c9 #define PCI_DEVICE_ID_HYGON_18H_M05H_DF_F3 0x14b3 #define PCI_DEVICE_ID_HYGON_18H_M10H_DF_F3 0x14d3 diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 620ce3e2f442..6723ad4bfc4d 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -2821,10 +2821,10 @@ static const struct pci_device_id azx_ids[] = { .driver_data = AZX_DRIVER_ZXHDMI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_NO_MSI | AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_NO_64BIT }, /* Hygon HDAudio */ - { PCI_DEVICE(0x1d94, 0x14a9), - .driver_data = AZX_DRIVER_HYGON | AZX_DCAPS_POSFIX_LPIB | - AZX_DCAPS_NO_MSI }, - + { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_HYGON_18H_M05H_HDA), + .driver_data = AZX_DRIVER_HYGON | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_NO_MSI }, + { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_HYGON_18H_M10H_HDA), + .driver_data = AZX_DRIVER_HYGON }, { 0, } }; MODULE_DEVICE_TABLE(pci, azx_ids); -- Gitee From 573c86340751725894066ae5b51d75216c6078f6 Mon Sep 17 00:00:00 2001 From: fuhao Date: Mon, 3 Mar 2025 20:32:16 +0800 Subject: [PATCH 09/10] EDAC/amd64: Add model10h name support for edac family type Signed-off-by: fuhao --- drivers/edac/amd64_edac.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index ed9a0a2d7c55..552962971712 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -3581,6 +3581,7 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt) } else if (pvt->model == 0x10) { fam_type = &family_types[F18_M10H_CPUS]; pvt->ops = &family_types[F18_M10H_CPUS].ops; + family_types[F18_M10H_CPUS].ctl_name = "F18h_M10h"; break; } fam_type = &family_types[F17_CPUS]; -- Gitee From 0e31f8bb2cadd959fc532daf038b9087f913cea2 Mon Sep 17 00:00:00 2001 From: fuhao Date: Tue, 4 Mar 2025 17:47:32 +0800 Subject: [PATCH 10/10] perf/x86/uncore: Refine the L3 PMU code for model6h backport patch Fix the backport commit "anolis: perf/x86/uncore: Add L3 PMU support for Hygon family 18h model 6h". (https://gitee.com/anolis/cloud-kernel/commit/6fd3d84642b32b717885023b4984e73e0db35621) Signed-off-by: fuhao --- arch/x86/events/amd/uncore.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c index f2f5601745ee..dd2f869c33cd 100644 --- a/arch/x86/events/amd/uncore.c +++ b/arch/x86/events/amd/uncore.c @@ -274,8 +274,9 @@ static int amd_uncore_event_init(struct perf_event *event) static umode_t hygon_f18h_m6h_uncore_is_visible(struct kobject *kobj, struct attribute *attr, int i) { - return boot_cpu_data.x86 == 0x18 && boot_cpu_data.x86_model == 0x6 ? - attr->mode : 0; + return boot_cpu_data.x86 == 0x18 && + boot_cpu_data.x86_model >= 0x6 && boot_cpu_data.x86_model <= 0xf ? + attr->mode : 0; } static ssize_t amd_uncore_attr_show_cpumask(struct device *dev, @@ -685,11 +686,11 @@ static int __init amd_uncore_init(void) boot_cpu_data.x86 == 0x18) { *l3_attr++ = &format_attr_event8.attr; *l3_attr++ = &format_attr_umask.attr; - *l3_attr++ = &format_attr_slicemask.attr; - if (boot_cpu_data.x86_model == 0x6) { + if (boot_cpu_data.x86_model >= 0x6 && boot_cpu_data.x86_model <= 0xf) { *l3_attr++ = &format_attr_threadmask32.attr; amd_llc_pmu.attr_update = hygon_uncore_l3_attr_update; } else { + *l3_attr++ = &format_attr_slicemask.attr; *l3_attr++ = &format_attr_threadmask8.attr; } } -- Gitee